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* 85xx: Remove redudant PLATFORM_CPPFLAGSKumar Gala2009-08-28-4/+0
| | | | | | | | | | | | | For historic reasons we had defined some additional PLATFORM_CPPFLAGS like: PLATFORM_CPPFLAGS += -DCONFIG_E500=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC85xx=1 PLATFORM_CPPFLAGS += -DCONFIG_MPC8548=1 However these are all captured in the config.h and thus redudant. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold fsl_pci_setup_inbound_windows into fsl_pci_initKumar Gala2009-08-28-3/+0
| | | | | | | | Every platform that calls fsl_pci_init calls fsl_pci_setup_inbound_windows before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* pci/fsl_pci_init: Fold pci_setup_indirect into fsl_pci_initKumar Gala2009-08-28-3/+1
| | | | | | | | Every platform that calls fsl_pci_init calls pci_setup_indirect before it calls fsl_pci_init. There isn't any reason to just call it from fsl_pci_init and simplify things a bit. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-3/+3
| | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* 85xx: Add RMII support for MPC8569MDSHaiying Wang2009-06-12-3/+110
| | | | | | | | | This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC3 and UEC4 support for MPC8569MDSHaiying Wang2009-06-12-0/+34
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UART1 support for MPC8569MDSHaiying Wang2009-06-12-0/+6
| | | | | | | | MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define those pins before using UART1. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix the wrong BCSR address of 8569MDSDave Liu2009-06-09-1/+1
| | | | | | | | | The BCSR17[7] = 1 will unlock the write protect of FLASH. The WP# pin only controls the write protect of top/bottom sector, That is why we can save env, but we can't write the first sector before the patch. Signed-off-by: Dave Liu <daveliu@freescale.com>
* 85xx: Fix the clock adjust of mpc8569mds boardDave Liu2009-06-09-1/+1
| | | | | | | | Currently the clk_adj is 6 (3/4 cycle), The settings will cause the DDR controller hang at the data init. Change the clk_adj from 6 to 4 (1/2 cycle), make the memory system stable. Signed-off-by: Dave Liu <daveliu@freescale.com>
* fsl_pci: Move prototypes into fsl_pci.h and remove explicit externsKumar Gala2009-04-04-6/+0
| | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* fsl_pci: Renamed immap_fsl_pci.h to fsl_pci.hKumar Gala2009-04-04-1/+1
| | | | | | | Rename the pci header for FSL HW so we can move some prototypes in there and stop doing explicit externs Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC85xx: Add MPC8569MDS board supportHaiying Wang2009-03-30-0/+934
This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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