summaryrefslogtreecommitdiff
path: root/board/freescale/mpc8569mds/bcsr.c
Commit message (Collapse)AuthorAgeLines
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* powerpc/mpc85xx: sparse fixesKim Phillips2012-11-04-4/+4
| | | | | | | | | | | | | | | | | fsl_corenet_serdes.c:485:6: warning: symbol '__soc_serdes_init' was not declared. Should it be static? cpu_init.c:185:6: warning: symbol 'invalidate_cpc' was not declared. Should it be static? bcsr.c:28:27: warning: non-ANSI function declaration of function 'enable_8568mds_duart' bcsr.c:39:33: warning: non-ANSI function declaration of function 'enable_8568mds_flash_write' bcsr.c:46:34: warning: non-ANSI function declaration of function 'disable_8568mds_flash_write' bcsr.c:53:29: warning: non-ANSI function declaration of function 'enable_8568mds_qe_mdio' bcsr.c:28:33: warning: non-ANSI function declaration of function 'enable_8569mds_flash_write' bcsr.c:33:34: warning: non-ANSI function declaration of function 'disable_8569mds_flash_write' bcsr.c:38:28: warning: non-ANSI function declaration of function 'enable_8569mds_qe_uec' bcsr.c:63:47: warning: non-ANSI function declaration of function 'disable_8569mds_brd_eeprom_write_protect' ngpixis.c:245:1: error: directive in argument list ngpixis.c:247:1: error: directive in argument list Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Update Freescale copyrights to remove "All Rights Reserved"Kumar Gala2009-07-29-1/+1
| | | | | | "All Rights Reserved" conflicts with the GPL. Signed-off-by: Kumar Gala <kumar.gala@freescale.com>
* 85xx: Add RMII support for MPC8569MDSHaiying Wang2009-06-12-1/+14
| | | | | | | | | This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Add UEC3 and UEC4 support for MPC8569MDSHaiying Wang2009-06-12-0/+4
| | | | | Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx: Fix the wrong BCSR address of 8569MDSDave Liu2009-06-09-1/+1
| | | | | | | | | The BCSR17[7] = 1 will unlock the write protect of FLASH. The WP# pin only controls the write protect of top/bottom sector, That is why we can save env, but we can't write the first sector before the patch. Signed-off-by: Dave Liu <daveliu@freescale.com>
* MPC85xx: Add MPC8569MDS board supportHaiying Wang2009-03-30-0/+49
This patch adds MPC8569MDS board support. The UART, QE UEC1 and UEC2, BRD EEPROM on I2C2 bus, PCI express and DDR3 SPD are supported in this patch. Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Hillel Avni <Hillel.Avni@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
generated by cgit v1.1 at 2024-11-07 06:32:31 +0000