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* MLK-14421 imx: Add pfuze pmic common init for DM pmic driverYe Li2017-03-14-2/+97
| | | | | | | Since the DM pmic driver has changed the driver API, add a new file pfuze_dm.c for common pfuze100 init. Signed-off-by: Ye Li <ye.li@nxp.com>
* Freescale/NXP: Migrate CONFIG_FSL_CAAM to defconfigsTom Rini2017-03-09-0/+1
| | | | | | | | | | | | | | | | | | | | | | In some cases this is absolutely required, so select this for some secure features. This also requires migration of RSA_FREESCALE_EXP Cc: Ruchika Gupta <ruchika.gupta@nxp.com> Cc: Poonam Aggrwal <poonam.aggrwal@freescale.com> Cc: Naveen Burmi <NaveenBurmi@freescale.com> Cc: Po Liu <po.liu@freescale.com> Cc: Shengzhou Liu <Shengzhou.Liu@freescale.com> Cc: Priyanka Jain <Priyanka.Jain@freescale.com> Cc: Sumit Garg <sumit.garg@nxp.com> Cc: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Chunhe Lan <Chunhe.Lan@freescale.com> Cc: Feng Li <feng.li_2@nxp.com> Cc: Alison Wang <alison.wang@freescale.com> Cc: Mingkai Hu <Mingkai.Hu@freescale.com> Cc: York Sun <york.sun@nxp.com> Cc: Saksham Jain <saksham.jain@nxp.freescale.com> Cc: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
* NXP: Introduce board/freescale/common/Kconfig and migrate CHAIN_OF_TRUSTTom Rini2017-01-24-0/+4
| | | | | | | | | Introduce board/freescale/common/Kconfig so that we have a single place for CONFIG options that are shared between ARM and PowerPC NXP platforms. Cc: York Sun <york.sun@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2017-01-19-0/+96
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| * pmic: pmic_mc34vr500: Add APIs to set/get SWx voltHou Zhiqiang2017-01-18-0/+96
| | | | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | SPL: Adjust more debug prints for ulong entry_pointTom Rini2017-01-11-1/+1
|/ | | | | | | | With entry_point now being an unsigned long we need to adapt the last two debug prints to use %lX not %X. Fixes: 11e1479b9e67 ("SPL: make struct spl_image 64-bit safe") Signed-off-by: Tom Rini <trini@konsulko.com>
* powerpc: MPC8641HPCN: Remove macro CONFIG_MPC8641HPCNYork Sun2016-11-23-1/+1
| | | | | | Use TARGET_MPC8641HPCN from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8610HPCD: Remove macro CONFIG_MPC8610HPCDYork Sun2016-11-23-1/+1
| | | | | | Use TARGET_MPC8610HPCD from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P5040DS: Remove macro CONFIG_P5040DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_P5040DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P5020DS: Remove macro CONFIG_P5020DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_P5020DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P4080DS: Remove macro CONFIG_P4080DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_P4080DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P3041DS: Remove macro CONFIG_P3041DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_P3041DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P2041RDB: Remove macro CONFIG_P2041RDBYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_P2041RDB instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: P1022DS: Remove macro CONFIG_P1022DSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_P1022DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8572DS: Remove macro CONFIG_MPC8572DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_MPC8572DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8569MDS: Remove macro CONFIG_MPC8569MDSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_MPC8569MDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8555CDS: Remove macro CONFIG_MPC8555CDSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_MPC8555CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8541CDS: Remove macro CONFIG_MPC8541CDSYork Sun2016-11-23-1/+1
| | | | | | Replace with CONFIG_TARGET_MPC8541CDS from Kconfig. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8536DS: Remove macro CONFIG_MPC8536DSYork Sun2016-11-23-2/+2
| | | | | | Use CONFIG_TARGET_MPC8536DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8544DS: Remove macro CONFIG_MPC8544DSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_MPC8544DS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* powerpc: MPC8548CDS: Remove macro CONFIG_MPC8548CDSYork Sun2016-11-23-1/+1
| | | | | | Use CONFIG_TARGET_MPC8548CDS instead. Signed-off-by: York Sun <york.sun@nxp.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-10-12-38/+14
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1021aqds.h include/configs/ls1021atwr.h
| * fsl_sec_mon: Update driver for Security MonitorSumit Garg2016-10-06-38/+14
| | | | | | | | | | | | | | | | | | | | | | Update the API's for transition of Security Monitor states. Instead of providing both initial and final states for transition, just provide final state for transition as Security Monitor driver will take care of it internally. Signed-off-by: Sumit Garg <sumit.garg@nxp.com> [York Sun: Reformatted commit message slightly] Reviewed-by: York Sun <york.sun@nxp.com>
* | spi: Move freescale-specific code into a private headerSimon Glass2016-10-06-0/+13
|/ | | | | | | | | | | | | | At present there are two SPI functions only used by freescale which are defined in the spi_flash.h header. One function name matches an existing generic SPL function. Move these into a private header to avoid confusion. Arcturus looks like it does not actually support SPI, so drop the SPI code from that board. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com>
* Merge git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-09-26-19/+86
|\ | | | | | | | | | | | | trini: Drop local memset() from examples/standalone/mem_to_mem_idma2intr.c Signed-off-by: Tom Rini <trini@konsulko.com>
| * armv8: ls1046aqds: Add LS1046AQDS board supportShaohui Xie2016-09-14-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | LS1046AQDS Specification: ------------------------- Memory subsystem: * 8GByte DDR4 SDRAM (64bit bus) * 128 Mbyte NOR flash single-chip memory * 512 Mbyte NAND flash * 64 Mbyte high-speed SPI flash * SD connector to interface with the SD memory card Ethernet: * Two XFI 10G ports * Two SGMII ports * Two RGMII ports PCIe: supports Gen 1 and Gen 2 SATA 3.0: one SATA 3.0 port USB 3.0: two micro AB connector and one type A connector UART: supports two UARTs up to 115200 bps for console Signed-off-by: Shaohui Xie <Shaohui.Xie@nxp.com> Signed-off-by: Mingkai Hu <mingkai.hu@nxp.com> Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * nxp: ls102xa: add LS1 PSCI system suspendHongbo Zhang2016-09-14-1/+34
| | | | | | | | | | | | | | | | The deep sleep function of LS1 platform, is mapped into PSCI system suspend function, this patch adds implementation of it. Signed-off-by: Hongbo Zhang <hongbo.zhang@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: csu: add an API to set R/W permission to PCIeHou Zhiqiang2016-09-14-0/+28
| | | | | | | | | | Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * fsl: csu: add an API to set individual device access permissionHou Zhiqiang2016-09-14-14/+20
| | | | | | | | | | | | | | | | Add this API to make the individual device is able to be set to the specified permission. Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* | arch, board: squash lines for immediate returnMasahiro Yamada2016-09-23-3/+1
|/ | | | | | | | Remove unneeded variables and assignments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Minkyu Kang <mk7.kang@samsung.com> Reviewed-by: Angelo Dureghello <angelo@sysam.it>
* SECURE_BOOT: Enable chain of trust in SPL frameworkSumit Garg2016-07-26-1/+33
| | | | | | | | | | | Override jump_to_image_no_args function to include validation of u-boot image using spl_validate_uboot before jumping to u-boot image. Also define macros in SPL framework to enable crypto operations. Reviewed-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* powerpc/mpc85xx: SECURE BOOT- Enable chain of trust in SPLSumit Garg2016-07-21-0/+56
| | | | | | | | | | | | | | | | As part of Chain of Trust for Secure boot, the SPL U-Boot will validate the next level U-boot image. Add a new function spl_validate_uboot to perform the validation. Enable hardware crypto operations in SPL using SEC block. In case of Secure Boot, PAMU is not bypassed. For allowing SEC block access to CPC configured as SRAM, configure PAMU. Reviewed-by: Ruchika Gupta <ruchika.gupta@nxp.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Sumit Garg <sumit.garg@nxp.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
* board: freescale: common: Add flag for LBMAP brdcfg reg offsetAbhimanyu Saini2016-06-03-2/+9
| | | | | | | | | | | Add QIXIS_LBMAP_BRDCFG_REG to the save offset of LBMAP configuration register instead of hardcoding it in set_lbmap() function. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* board: freescale: common: Conditionally compile IFC QXIS funcAbhimanyu Saini2016-06-03-0/+2
| | | | | | | | | | Check if qixis supports memory-mapped read/write before compiling IFC based qixis read/write functions. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* board: ls102xa: Fix ICID setupVincent Siles2016-06-03-2/+5
| | | | | | | LS102A ref manual dictates that ICID have to be written to the MSB of the ICID register, not to the LSB. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com>
* arm: uniform usage of u32 in ls102x caam configVincent Siles2016-05-18-1/+1
| | | | | | | Mix usage of uint32_t and u32 fixed in favor of u32. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
* arm: Fix SCFG ICID reg addressesVincent Siles2016-05-18-2/+2
| | | | | | | | | | | | | On the LS102x boards, in order to initialize the ICID values of masters, the dev_stream_id array holds absolute offsets from the base of SCFG. In ls102xa_config_ssmu_stream_id, the base pointer is cast to uint32_t * before adding the offset, leading to an invalid address. Casting it to void * solves the issue. Signed-off-by: Vincent Siles <vincent.siles@provenrun.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Fix various typos, scattered over the code.Robert P. J. Day2016-05-05-2/+2
| | | | | | | | | | | | | Spelling corrections for (among other things): * environment * override * variable * ftd (should be "fdt", for flattened device tree) * embedded * FTDI * emulation * controller
* armv8/ls2080ardb: Enable VID supportRai Harninder2016-03-29-1/+14
| | | | | | | | This patch enable VID support for ls2080ardb platform. It uses the common VID driver. Signed-off-by: Rai Harninder <harninder.rai@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* SECURE BOOT: Change fsl_secboot_validate func to pass image addrSaksham Jain2016-03-29-12/+26
| | | | | | | | | Use a pointer to pass image address to fsl_secboot_validate(), instead of using environmental variable "img_addr". Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* SECURE BOOT: Halt execution when secure boot failSaksham Jain2016-03-29-1/+6
| | | | | | | | | | | | In case of fatal failure during secure boot execution (e.g. header not found), reset is asserted to stop execution. If the RESET_REQ is not tied to HRESET, this allows the execution to continue. Add esbh_halt() after the reset to make sure execution stops. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* armv8: fsl-lsch3: Add new header for secure bootSaksham Jain2016-03-29-5/+30
| | | | | | | | | | | | | | For secure boot, a header is used to identify key table, signature and image address. A new header structure is added for lsch3. Currently key extension (IE) feature is not supported. Single key feature is not supported. Keys must be in table format. Hence, SRK (key table) must be present. Max key number has increase from 4 to 8. The 8th key is irrevocable. A new barker Code is used. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Signed-off-by: Saksham Jain <saksham.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* freescale: vid: Return i2c mux to default channelWenbin Song2016-03-21-3/+9
| | | | | | | | IR chip is on one of the channels on multiplexed I2C-bus. Reset to default channel after accessing. Signed-off-by: Wenbin Song <wenbin.song@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* qe: move drivers/qe/qe.h to include/fsl_qe.hQianyu Gong2016-02-24-2/+2
| | | | | | | | As the QE firmware struct is shared with Fman, move the header file out of drivers/qe/. Signed-off-by: Gong Qianyu <Qianyu.Gong@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
* Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-01-27-142/+316
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| * secure_boot: change error handler for esbc_validateAneesh Bansal2016-01-27-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | In case of error while executing esbc_validate command, SNVS transition and issue of reset is required only for secure-boot. If boot mode is non-secure, this is not required. Similarly, esbc_halt command which puts the core in Spin Loop is applicable only for Secure Boot. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * secure_boot: enable chain of trust for ARM platformsAneesh Bansal2016-01-27-0/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Chain of Trust is enabled for ARM platforms (LS1021 and LS1043). In board_late_init(), fsl_setenv_chain_of_trust() is called which will perform the following: - If boot mode is non-secure, return (No Change) - If boot mode is secure, set the following environmet variables: bootdelay = 0 (To disable Boot Prompt) bootcmd = CONFIG_CHAIN_BOOT_CMD (Validate and execute Boot script) Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * secure_boot: create function to determine boot modeAneesh Bansal2016-01-27-0/+53
| | | | | | | | | | | | | | | | | | A function is created to detrmine if the boot mode is secure or non-secure for differnt SoC's. Signed-off-by: Aneesh Bansal <aneesh.bansal@nxp.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: support for validation of dynamic imageAneesh Bansal2016-01-25-16/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some images to be validated are relocated to a dynamic address at run time. So, these addresses cannot be known befor hand while signing the images and creating the header offline. So, support is required to pass the image address to the validate function as an argument. If an address is provided to the function, the address field in Header is not read and is treated as a reserved field. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * SECURE BOOT: separate function created for signatureAneesh Bansal2016-01-25-44/+54
| | | | | | | | | | | | | | | | | | | | | | The code for image hash calculation, hash calculation from RSA signature and comparison of hashes has been mobed to a separate function. Signed-off-by: Saksham Jain <saksham@freescale.com> Signed-off-by: Aneesh Bansal <aneesh.bansal@freescale.com> Acked-by: Ruchika Gupta <ruchika.gupta@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-07 19:48:49 +0000