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* common: Add get_effective_memsize() to memsize.cYork Sun2014-02-21-1/+1
| | | | | | | | | This function has been around for powerpc. It is used for systems with memory more than CONFIG_MAX_MEM_MAPPED. In case of non-contiguous memory, this feature can limit U-boot to one block without going over the limit. Signed-off-by: York Sun <yorksun@freescale.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* powerpc/mpc85xx:Increase binary size for P, B & T series boards.Prabhakar Kushwaha2014-01-21-6/+6
| | | | | | | | | | | u-boot binary size for Freescale mpc85xx platforms is 512KB. This has been reached to upper limit for some of the platforms causig linker error. So, Increase the u-boot binary size to 768KB. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* powerpc/c29xpcie: 8k page size NAND boot support base on TPL/SPLPo Liu2014-01-21-2/+168
| | | | | | | | | | | | Using the TPL/SPL method to booting from 8k page NAND flash. - Add 256kB size SRAM tlb for second step booting; - Add spl.c for TPL image boot; - Add spl_minimal.c for minimal SPL image; - Add C29XPCIE_NAND configure; - Modify C29XPCIE.h for nand config and enviroment; Signed-off-by: Po Liu <Po.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* powerpc/c29xpcie: Getting DDR SPD image from 16-bit sub-address EEPROMPo Liu2013-12-04-0/+13
| | | | | | | | | | Currently, there is only one EEPROM on c29xpcie board which is AT24C1024. We program the SPD data at beginning of the AT24C1024.But the AT24C1024 has a 16-bit sub-address mode. This patch is tomake it work when getting SPD in a 16-bit sub-address EEPROM. Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* Driver/IFC: Move Freescale IFC driver to a common driverYork Sun2013-11-25-1/+1
| | | | | | | | Freescale IFC controller has been used for mpc8xxx. It will be used for ARM-based SoC as well. This patch moves the driver to driver/misc and fix the header file includes. Signed-off-by: York Sun <yorksun@freescale.com>
* Driver/DDR: Moving Freescale DDR driver to a common driverYork Sun2013-11-25-2/+2
| | | | | | | Freescale DDR driver has been used for mpc83xx, mpc85xx, mpc86xx SoCs. The similar DDR controllers will be used for ARM-based SoCs. Signed-off-by: York Sun <yorksun@freescale.com>
* board: powerpc: convert makefiles to Kbuild styleMasahiro Yamada2013-11-01-25/+5
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: York Sun <yorksun@freescale.com> Cc: Stefan Roese <sr@denx.de>
* powerpc/c29xpcie: add DDR ECC on off config settingPo Liu2013-10-24-0/+8
| | | | | | | | | | c29xpcie REV_A board DDR ECC chip has bad impedance in hardware, force that kind of board to be DDR ECC off when booting. Other version board config ECC on/off by hwconfig=fsl_ddr:ecc=on in uboot enviroment. Signed-off-by: Po Liu <Po.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* boards/c29xpcie: Update TLB and LAW size for IFC NAND, CPLDPrabhakar Kushwaha2013-10-16-4/+4
| | | | | | | | NAND,CPLD AMASK register is programmed for 64K size. so Update TLB & LAW size accordingly. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* powerpc: Fix CamelCase warnings in DDR related codePriyanka Jain2013-10-16-13/+13
| | | | | | | | | | | Some DDR related structures present in fsl_ddr_dimm_params.h, fsl_ddr_sdram.h, ddr_spd.h has various parameters with embedded acronyms capitalized that trigger the CamelCase warning in checkpatch.pl Convert those variable names to smallcase naming convention and modify all files which are using these structures with modified structures. Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com>
* powerpc/c29xpcie: modify DDR parameter to make DDR more stablePo Liu2013-10-16-1/+1
| | | | | | | | DDR parameters clk_adjust were changed. This can make the DDR run more stable. The new value were gotten by the DDR testing tool. Signed-off-by: Po Liu <Po.Liu@freescale.com>
* powerpc/c29xpcie: add readme document for c29xpciePo Liu2013-08-14-0/+100
| | | | Signed-off-by: Po Liu <Po.Liu@freescale.com>
* powerpc/mpc85xx: Cleanup license header in source filesYork Sun2013-08-12-29/+7
| | | | | | | | | | | | Fix the license header introduced by the following patches Add TWR-P10xx board support Add T4240EMU target IDT8T49N222A configuration code Add C29x SoC support Add support for C29XPCIE board Signed-off-by: York Sun <yorksun@freescale.com>
* powerpc/c29xpcie: add support for C29XPCIE boardMingkai Hu2013-08-09-0/+552
C29XPCIE board is a series of Freescale PCIe add-in cards to perform as public key crypto accelerator or secure key management module. It includes C293PCIE board, C293PCIE board and C291PCIE board. - 512KB platform SRAM in addition to 512K L2 Cache/SRAM - 512MB soldered DDR3 32bit memory - CPLD System Logic - 64MB x16 NOR flash and 4GB x8 NAND flash - 16MB SPI flash Signed-off-by: Mingkai Hu <Mingkai.Hu@freescale.com> Singed-off-by: Po Liu <Po.Liu@freescale.com> [yorksun: Fixup include/configs/C29XPCIE.h] Signed-off-by: York Sun <yorksun@freescale.com>
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