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* * CVS add missing fileswdenk2004-02-23-1/+1
* * The PS/2 mux on the BMS2003 board needs 450 ms after power onwdenk2004-01-20-16/+16
* * Patches by Xianghua Xiao, 15 Oct 2003:wdenk2003-10-15-161/+161
* PMC405 update.stroese2003-09-12-104/+1361
* PCI405 update.stroese2003-09-12-746/+751
* CPCI405(AB) update.stroese2003-09-12-1093/+1437
* ASH405 update.stroese2003-09-12-2466/+2497
* Xilinx jtag tool added.stroese2003-09-12-0/+2402
* Board VOH405 added.stroese2003-09-12-0/+1776
* Board PLU405 added.stroese2003-09-12-0/+1752
* Board HUB405 added.stroese2003-09-12-0/+488
* Board DP405 added.stroese2003-09-12-0/+2279
* * Patch by Gary Jennejohn, 11 Sep 2003:wdenk2003-09-11-7/+3
* - Fixed interrupt polarity.stroese2003-07-11-1/+1
* - FPGA updated.stroese2003-07-11-2467/+2469
* - BSP command added.stroese2003-07-11-1/+88
* Patch by Kenneth Johansson, 30 Jun 2003:wdenk2003-07-01-2/+2
* * Code cleanup:wdenk2003-06-27-458/+517
* * Header file cleanup for ARMwdenk2003-06-25-0/+12
* - Update NAND FLASH support.stroese2003-06-24-2/+7
* - Update new fpga file.stroese2003-06-24-2513/+2462
* * Fix CONFIG_NET_MULTI support in include/net.hwdenk2003-06-15-2462/+2513
* - Update new fpga file.stroese2003-06-06-2513/+2462
* * Get (mostly) rid of CFG_MONITOR_LEN definition; compute real lengthwdenk2003-05-30-20/+20
* PMC405 board added.stroese2003-05-23-0/+1241
* Code cleanup.stroese2003-05-23-121/+2
* New FPGA image with 527 support.stroese2003-05-23-749/+746
* Local Bus Timeout increased.stroese2003-05-23-1/+6
* Code reworked for PPC405EP support.stroese2003-05-23-24/+19
* CPCI405AB (special version of esd CPCI405) board added.stroese2003-05-23-10/+1121
* ASH405 board added (PPC405EP based).stroese2003-05-23-0/+3077
* Changed CPCI405 to use CTS instead of DSR on PPC405 UART1.stroese2003-04-04-1/+7
* Make compile clean, fix the usual small problems.wdenk2003-03-26-1/+0
* esd PCI405 updated.stroese2003-03-26-0/+32
* esd PCI405 updated.stroese2003-03-25-782/+1015
* CPCI4052 update (support for revision 3).stroese2003-03-20-816/+888
* Add "pcidelay" environment variable (in ms, enabled via CONFIG_PCI_BOOTDELAY).stroese2003-02-14-1/+1
* Initial revisionwdenk2002-11-03-0/+953
* Initial revisionwdenk2002-11-03-0/+475
* Initial revisionwdenk2002-11-03-0/+1405
* Initial revisionwdenk2002-09-20-0/+738
* Initial revisionwdenk2002-09-18-0/+774
* Initial revisionwdenk2002-08-30-0/+586
* Initial revisionwdenk2002-08-26-0/+448
* Initial revisionwdenk2002-08-17-0/+1612
* Initial revisionwdenk2002-08-14-0/+156
* Initial revisionwdenk2002-08-06-0/+240
* Initial revisionwdenk2002-07-20-0/+426
* Initial revisionwdenk2002-07-18-0/+32
* Initial revisionwdenk2002-07-07-0/+138