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* avr32: Add simple paging supportHaavard Skinnemoen2010-09-03-0/+15
| | | | | | | | | | | | | | | | | | Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver. The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced. This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use uncached() macro to get an address for SDRAM initHaavard Skinnemoen2010-09-03-3/+1
| | | | | | | | | | | | | | The paging system which is required to set up caching properties has not yet been initialized when the SDRAM is initialized. So when the map_physmem() function is converted to return the physical address unchanged, the SDRAM initialization will break on some boards. The avr32-specific uncached() macro will return an address which will always cause uncached accessed to be made. Since this happens in the board code, using avr32-specific features should be ok, and will allow the SDRAM initialization to keep working. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: fix linking of atstk100x and favr32 boardsAndreas Bießmann2010-06-29-1/+1
| | | | | | | When building some avr32 boards out of tree (e.g. O=..) the linker script could not be found. This patch references the linker script in source tree. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
* Merge branch 'mimc200'Haavard Skinnemoen2009-03-23-7/+8
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| * AVR32: Make cacheflush cpu-dependentOlav Morken2009-02-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | The AT32UC3A series of processors doesn't contain any cache, and issuing cache control instructions on those will cause an exception. This commit makes cacheflush.h arch-dependent in preparation for the AT32UC3A-support. Signed-off-by: Gunnar Rangoy <gunnar@rangoy.com> Signed-off-by: Paul Driveklepp <pauldriveklepp@gmail.com> Signed-off-by: Olav Morken <olavmrk@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * Merge branch 'fixes' into cleanupsHaavard Skinnemoen2008-12-17-5/+4
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
| * | avr32: use board_early_init_r instead of board_init_infoHaavard Skinnemoen2008-09-01-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific board_init_info hook by the standard board_early_init_r hook and make it optional. board_early_init_r() runs somewhat earlier than board_init_info used to do, but this isn't a problem for any of the in-tree boards. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* | | Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-2/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* | rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-3/+3
| | | | | | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* | Introduce netdev.h header file and remove externsBen Warren2008-09-02-2/+1
|/ | | | | | | This addresses all drivers whose initializers have already been moved to board_eth_init()/cpu_eth_init(). Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* favr-32-ezkit: Fix printf format warningsHaavard Skinnemoen2008-08-20-2/+2
| | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: add support for EarthLCD Favr-32 boardHans-Christian Egtvedt2008-08-06-0/+443
This patch adds support for the Favr-32 board made by EarthLCD. This kit, which is also called ezLCD-101 when running with EarthLCD firmware, has a 10.4" touch screen LCD panel, 16 MB 32-bit SDRAM, 8 MB parallel flash, Ethernet, audio out, USB device, SD-card slot, USART and various other connectors for cennecting stuff to SPI, I2C, GPIO, etc. Signed-off-by: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
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