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* ARM: tegra: enable 8-bit SD slots in board filesStephen Warren2012-11-19-3/+2
| | | | | | | | | | | | | | | | | | | | Harmony contains an SD slot with all 8 bits routed. This allows plugging in an eMMC-chip-in-SD-form-factor. Seaboard/Springbank/Ventana/AC100 all have an eMMC chip with all 8 bits hooked up. Now that the U-Boot eMMC code fully supports 8-bit operation, initialize those ports as 8-bit instead of 4-bit to improve performance. Whistler was already registering its ports as 8-bit. TrimSlice doesn't have any 8-bit ports. I don't have any Avionic Design boards nor the Colibri board to test with. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: move common features to a common makefileMarc Dietrich2012-10-29-2/+4
| | | | | | | | | | | | | | | | | | | For Non-Nvidia boards to include newly added features (like emc clock scaling) it would be necessary to add each feature to their own board Makefile. This is because currently the top Makefile automaticly includes these features only for Nvidia boards. This patch adds a simple Makefile include so all new features become available for non-Nvidia board vendors. Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Lucas Stach <dev@lynxeye.de> Signed-off-by: Marc Dietrich <marvin24@gmx.de> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rework UART GPIO handlingLucas Stach2012-10-15-7/+0
| | | | | | | | | | | | | | | | | | | | Rename board provided gpio_config_uart() to gpio_early_init_uart() as it does the same thing as the equally called function provided by the uart-switch code. This allows to simply call this function in early board init whether or not we are building with CONFIG_UART_SWITCH defined. Also provide a weak symbol for this function, to avoid the need to provide this function for boards that don't need any fixup. This patch supersedes the earlier posted "tegra: convert gpio_config_uart to weak symbol". Build tested with MAKEALL -s tegra20 Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra20: Move some include files to arch-tegra for sharing with Tegra30Tom Warren2012-10-15-2/+2
| | | | | | | | | | | The move is pretty straight-forward. ap20.h and tegra20.h were renamed to ap.h and tegra.h. Some files remain in arch-tegra20 but 'include' a file in 'arch-tegra' with #defines & structs that will be common between T20 and T30 HW. HW-specific #defines, etc. stay in the 'arch-tegra20' 'root' file. All boards build OK w/MAKEALL -s tegra20. Checkpatch.pl runs clean. Seaboard works OK. Signed-off-by: Tom Warren <twarren@nvidia.com>
* Tegra: Change Tegra20 to Tegra in common code, prep for T30Tom Warren2012-09-10-2/+2
| | | | | | | | | | Convert TEGRA20_ defines to either TEGRA_ or NV_PA_ where appropriate. Convert tegra20_ source file and function names to tegra_, also. Upcoming Tegra30 port will use common code/defines/names where possible. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com>
* tegra20: make board mkdir commands unconditionalAllen Martin2012-09-01-2/+0
| | | | | | | | | | | Change the mkdir commands for the object directories to be unconditional. This fixes an issue when building for SPL where SRCTREE and OBJTREE are the same, but $(obj) is under SPLTREE. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra20: rename tegra2 -> tegra20Allen Martin2012-09-01-3/+3
| | | | | | | | | | This is make naming consistent with the kernel and devicetree and in preparation of pulling out the common tegra20 code. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: fix leftover CONFIG_TEGRA2_MMC & _SPI build switchesTom Warren2012-07-09-2/+2
| | | | | | | | | Missed some boards after my tegra2_mmc.* -> tegra_mmc.* change, and one instance of CONFIG_TEGRA2_SPI. MAKEALL -s tegra2 AOK, Seaboard MMC AOK. Didn't test Tamonten, Paz00 or TrimSlice, as I have none here. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org>
* tegra: paz00: add device tree supportStephen Warren2012-07-07-0/+57
| | | | | | | ... to enable USB host support, which enables Ethernet support. Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: sync SDIO1 pingroup enum name with TRMLucas Stach2012-07-07-3/+3
| | | | | | Signed-off-by: Lucas Stach <dev@lynxeye.de> CC: Tom Warren <twarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: paz00: fix typo in SD slot CD detect GPIOStephen Warren2012-07-07-3/+3
| | | | | Signed-off-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add support for Compal Paz00 (Toshiba AC100)Stephen Warren2012-02-12-0/+122
The Toshiba AC100 (Compal code-name Paz00, aka Dynabook AZ) is a netbook derived from the NVIDIA Tegra Harmony reference board. It ships with Android, but is often repurposed to run Linux. This patch adds just enough support to get a U-Boot serial console, and the ability access built-in eMMC and the external SD slot. v2: * Rebased on latest HEAD, incorporated changes made to other board files. * Moved board files from board/nvidia to board/compal. * Switched to correct odmdata value. This required add the previous patch to fix U-Boot's interpretation of the odmdata RAM size field. * Removed nvmem= from default Linux kernel command-line; no drivers use the reserved memory yet, so there's no point reserving it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>