summaryrefslogtreecommitdiff
path: root/board/cds
Commit message (Collapse)AuthorAgeLines
* ft_board_setup update 85xx/86xx of pci/pcie bus-range property.Ed Swarthout2007-09-04-1/+1
| | | | | | pcie is now differentiated from pci. Add 8641 bus-range updates. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* 8548cds fixesEd Swarthout2007-08-29-3/+11
| | | | | | | | | | Restore CONFIG_EXTRA_ENV_SETTINGS definition which contains the correct consoledev needed for linux boot. Standardize on fdt{file,addr} var to hold dtb file name. Set PCI inbound memory region from CFG_MEMORY_{BUS,PHYS}. Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com>
* 85xxCDS: Add make targets for legacy systems.Randy Vinson2007-08-14-19/+28
| | | | | | | | The PCI ID select values on the Arcadia main board differ depending on the version of the hardware. The standard configuration supports Rev 3.1. The legacy target supports Rev 2.x. Signed-off-by Randy Vinson <rvinson@mvista.com>
* 85xxCDS: Enable the VIA PCI-to-ISA bridge.Andy Fleming2007-08-14-1/+6
| | | | | | | | | | Author: Randy Vinson <rvinson@linuxbox.(none)> Enable the PCI-to-ISA bridge in the VIA Southbridge located on the Arcadia main board. Signed-off-by: Randy Vinson <rvinson@mvista.com> Signed-off-by: York Sun <yorksun@freescale.com>
* 8548cds PCIE support.Ed Swarthout2007-08-14-115/+291
| | | | | | | | | | | | | | | | | | | | Make the early L1 cache stack region guarded to prevent speculative fetches outside the locked range. Use _PHYS defines, not _MEM for cpu-side PCI memory mapped regions. init.S whitespace cleanup. Allow TEXT_BASE value to be specified on command line. This allows it to be set to 0xfffc0000 which cuts the uboot binary in half. Clear and enable lbc and ecm errors. Update last_busno in device-tree for pci and pcie. Remove load of obsolete cpu/mpc85xx/pci.0 Signed-off-by: Ed Swarthout <Ed.Swarthout@freescale.com> Acked-by: Andy Fleming <afleming@freescale.com>
* Reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECxKim Phillips2007-05-17-5/+5
| | | | | | | For all practical u-boot purposes, TSECs don't differ throughout the mpc8[356]xx families; reduce CONFIG_MPC8YXX_TSECx to CONFIG_TSECx. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* Cleaned up some 85xx PCI bugsAndy Fleming2007-05-02-11/+20
| | | | | | | | | | | * Cleaned up the CDS PCI Config Tables and added NULL entries to the end * Fixed PCIe LAWBAR assignemt to use the cpu-relative address * Fixed 85xx PCI code to assign powar region sizes based on the config values (rather than hard-coding them) * Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address Signed-off-by: Andy Fleming <afleming@freescale.com>
* Changed BOOKE_PAGESZ_nGB to BOOKE_PAGESZ_nGAndy Fleming2007-04-23-1/+1
| | | | | | | The other pagesz constants use one letter to specify order of magnitude. Also change the one reference to it in mpc8548cds/init.S Signed-off-by: Andy Fleming <afleming@freescale.com>
* u-boot: Fix the 85xxcds tsec bugZang Roy-r619112007-04-23-0/+2
| | | | | | | Fix the 85xxcds tsec bug. When enable PCI, tsec.o should be added to u-boot.lds to make tsec work. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* u-boot: Fix CPU2 errata on MPC8548CDS boardZang Roy-r619112007-04-23-0/+7
| | | | | | This patch apply workaround of CPU2 errata on MPC8548CDS board. Signed-off-by:Ebony Zhu <ebony.zhu@freescale.com>
* u-boot: Enable PCI function and add PEX & rapidio memory map on MPC8548CDS boardZang Roy-r619112007-04-23-32/+46
| | | | | | Enable PCI function and add PEX & rapidio memory map on MPC8548CDS board. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
* Fix compilation warnings on a few 85xx boards.Jon Loeliger2006-10-20-3/+1
| | | | Signed-off-by: Jon Loeliger <jdl@freescale.com>
* * Fix a bunch of compiler warnings for gcc 4.0Jon Loeliger2006-10-19-7/+1
| | | | Signed-off-by: Matthew McClintock <msm@freescale.com>
* Merge branch 'master' of http://www.denx.de/git/u-bootJon Loeliger2006-10-10-3/+3
|\
| * Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-3/+3
| | | | | | | | Based on patch by Mike Frysinger, 20 Jun 2006
* | Fix whitespace and 80-col issues.Jon Loeliger2006-10-10-7/+12
| |
* | Merge branch 'mpc85xx'Jon Loeliger2006-09-19-1/+61
|\ \ | | | | | | | | | | | | | | | Conflicts: drivers/tsec.c
| * | Add support for eTSEC 3 & 4 on 8548 CDSAndy Fleming2006-09-19-0/+32
| | | | | | | | | | | | | | | | | | | | | * Added support for using eTSEC 3 and eTSEC 4 on the 8548 CDS. This will only work on rev 1.3 boards (but doesn't break older boards) * Cleaned up some comments to reflect the expanded role of tsec in other systems
| * | Added code to support 2.6.18 PCI changes in u-bootAndy Fleming2006-09-19-1/+29
| | | | | | | | | | | | * Added code to swizzle the IRQ map for the PCI
* | | Merge branch 'master' of http://www.denx.de/git/u-bootJon Loeliger2006-09-19-21/+42
|\ \ \ | |/ / |/| / | |/ | | | | Conflicts: board/stxxtc/Makefile
| * Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-21/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* | * Fixed a bug where 8555 PCI code used the old variable and function names ↵Matthew McClintock2006-08-09-2/+2
| | | | | | | | | | | | Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
* | * Added VIA configuration tableMatthew McClintock2006-08-09-71/+197
| | | | | | | | | | | | | | * Added support for PCI2 on CDS Patch by Andy Fleming 17-Mar-2006 Signed-off-by: Andy Fleming <afleming@freescale.com>
* | * Add Flat Dev Tree construction for MPC85xx ADS and CDS boards Patch by Jon ↵Matthew McClintock2006-08-09-3/+52
|/ | | | | | Loeliger 17-Jan-2006 Signed-off-by: Jon Loeliger <jdl@freescale.com>
* (no commit message)Wolfgang Denk2005-12-12-0/+3
|
* Fix problems with ld version 2.16 (dot outside sections problem)Wolfgang Denk2005-08-31-0/+6
| | | | | Pointed out by Gerhard Jaeger, 31 Aug 2005; cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
* * Patch by Jon Loeliger, 2005-07-25Jon Loeliger2005-07-25-3/+0
| | | | | Move the TSEC driver out of cpu/mpc85xx as it will be shared by the upcoming mpc83xx family as well.
* * Patch by Jon Loeliger, 2005-05-05Jon Loeliger2005-07-25-4/+816
| | | | | | | | Implemented support for MPC8548CDS board. Added DDR II support based on SPD values for MPC85xx boards. This roll-up patch also includes bugfies for the previously published patches: DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
* Patch by Jon Loeliger, 20 Jul 2005:Wolfgang Denk2005-07-21-0/+310
| | | | | | | Add missing PCI IO port definitions. author Kumar Gala <kumar.gala@freescale.com> Wed, 20 Jul 2005 15:39:52 -0500 committer Jon Loeliger <jdl@freescale.com> Wed, 20 Jul 2005 15:39:52 -0500
* Patches by Scott McNutt, 24 Aug 2004:wdenk2004-10-10-137/+88
| | | | | | - Add support for Altera Nios-II processors. - Add support for Psyent PCI-5441 board. - Add support for Psyent PK1C20 board.
* Patches by Jon Loeliger, 24 Aug 2004:wdenk2004-10-10-0/+1969
- Add support for the MPC8541 and MPC8555 CDS boards - Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
generated by cgit v1.1 at 2024-11-25 12:02:49 +0000