| Commit message (Collapse) | Author | Age | Lines |
|
|
|
|
|
| |
Minor path corrections needed to ensure buildability.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
|
|
|
|
| |
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_*_ADDR as the base of the registers
instead of getting it via &immap.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
|
|
|
| |
Updated the MPC85xx CDS config to use libfdt and assume use of aliases for
ethernet, pci, and serial for the various fixups that are done.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
|
|
|
|
| |
In the future the offsets to various blocks may not be in same location.
Move to using CFG_MPC85xx_GUTS_ADDR as the base of the guts registers
instead of getting it via &immap->im_gur.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
|
|
|
|
| |
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
|
|
|
|
|
|
|
|
| |
The PCI ID select values on the Arcadia main board differ depending
on the version of the hardware. The standard configuration supports
Rev 3.1. The legacy target supports Rev 2.x.
Signed-off-by Randy Vinson <rvinson@mvista.com>
|
|
|
|
|
|
|
|
|
|
|
| |
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
|
|
|
|
|
|
| |
Fix the 85xxcds tsec bug.
When enable PCI, tsec.o should be added to u-boot.lds to make tsec work.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
|
|\ |
|
| |
| |
| |
| | |
Signed-off-by: Matthew McClintock <msm@freescale.com>
|
|\ \
| |/
|/| |
|
| |
| |
| |
| | |
Based on patch by Mike Frysinger, 20 Jun 2006
|
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| |
| | |
Modifications are based on the linux kernel approach and
support two use cases:
1) Add O= to the make command line
'make O=/tmp/build all'
2) Set environement variable BUILD_DIR to point to the desired location
'export BUILD_DIR=/tmp/build'
'make'
The second approach can also be used with a MAKEALL script
'export BUILD_DIR=/tmp/build'
'./MAKEALL'
Command line 'O=' setting overrides BUILD_DIR environent variable.
When none of the above methods is used the local build is performed and
the object files are placed in the source directory.
|
| |
| |
| |
| |
| |
| |
| | |
function names
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| |
| |
| |
| |
| |
| |
| | |
* Added support for PCI2 on CDS
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
|/
|
|
|
|
| |
Patch by Jon Loeliger 17-Jan-2006
Signed-off-by: Jon Loeliger <jdl@freescale.com>
|
| |
|
|
|
|
|
| |
Pointed out by Gerhard Jaeger, 31 Aug 2005;
cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
|
|
|
|
|
| |
Move the TSEC driver out of cpu/mpc85xx as it will be shared
by the upcoming mpc83xx family as well.
|
|
|
|
|
|
|
|
| |
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
|
|
|
|
|
|
|
| |
Add missing PCI IO port definitions.
author Kumar Gala <kumar.gala@freescale.com> Wed, 20 Jul 2005 15:39:52 -0500
committer Jon Loeliger <jdl@freescale.com> Wed, 20 Jul 2005 15:39:52 -0500
|
|
|
|
|
|
| |
- Add support for Altera Nios-II processors.
- Add support for Psyent PCI-5441 board.
- Add support for Psyent PK1C20 board.
|
|
- Add support for the MPC8541 and MPC8555 CDS boards
- Cleanup eth?addr handling: make dependent on CONFIG_ETH?ADDR
|