| Commit message (Collapse) | Author | Age | Lines |
|---|
| |
|
|
|
|
|
|
|
|
|
| |
* Cleaned up the CDS PCI Config Tables and added NULL entries to
the end
* Fixed PCIe LAWBAR assignemt to use the cpu-relative address
* Fixed 85xx PCI code to assign powar region sizes based on the
config values (rather than hard-coding them)
* Fixed the 8548 CDS PCI2 IO to once again have 0 as the base address
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| |
|
|
|
|
|
| |
The other pagesz constants use one letter to specify order of
magnitude. Also change the one reference to it in mpc8548cds/init.S
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
| |
|
|
|
|
| |
Enable PCI function and add PEX & rapidio memory map on MPC8548CDS
board.
Signed-off-by: Roy Zang <tie-fei.zang@freescale.com>
|
| |
|
|
|
|
|
| |
* Added support for PCI2 on CDS
Patch by Andy Fleming 17-Mar-2006
Signed-off-by: Andy Fleming <afleming@freescale.com>
|
|
|
Implemented support for MPC8548CDS board.
Added DDR II support based on SPD values for MPC85xx boards.
This roll-up patch also includes bugfies for the previously
published patches:
DDRII CPO, pre eTSEC, 8548 LBIU, Andy's TSEC, eTSEC 3&4 I/O
|
