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* avr32: Add simple paging supportHaavard Skinnemoen2010-09-03-0/+15
| | | | | | | | | | | | | | | | | | Use the MMU hardware to set up 1:1 mappings between physical and virtual addresses. This allows us to bypass the cache when accessing the flash without having to do any physical-to-virtual address mapping in the CFI driver. The virtual memory mappings are defined at compile time through a sorted array of virtual memory range objects. When a TLB miss exception happens, the exception handler does a binary search through the array until it finds a matching entry and loads it into the TLB. The u-boot image itself is covered by a fixed TLB entry which is never replaced. This makes the 'saveenv' command work again on ATNGW100 and other boards using the CFI driver, hopefully without breaking any rules. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use uncached() macro to get an address for SDRAM initHaavard Skinnemoen2010-09-03-3/+1
| | | | | | | | | | | | | | The paging system which is required to set up caching properties has not yet been initialized when the SDRAM is initialized. So when the map_physmem() function is converted to return the physical address unchanged, the SDRAM initialization will break on some boards. The avr32-specific uncached() macro will return an address which will always cause uncached accessed to be made. Since this happens in the board code, using avr32-specific features should be ok, and will allow the SDRAM initialization to keep working. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Merge branch 'mimc200'Haavard Skinnemoen2009-03-23-8/+10
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| * Merge branch 'fixes' into cleanupsHaavard Skinnemoen2008-12-17-2/+1
| |\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: board/atmel/atngw100/atngw100.c board/atmel/atstk1000/atstk1000.c cpu/at32ap/at32ap700x/gpio.c include/asm-avr32/arch-at32ap700x/clk.h include/configs/atngw100.h include/configs/atstk1002.h include/configs/atstk1003.h include/configs/atstk1004.h include/configs/atstk1006.h include/configs/favr-32-ezkit.h include/configs/hammerhead.h include/configs/mimc200.h
| * | avr32: use board_early_init_r instead of board_init_infoHaavard Skinnemoen2008-09-01-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace the avr32-specific board_init_info hook by the standard board_early_init_r hook and make it optional. board_early_init_r() runs somewhat earlier than board_init_info used to do, but this isn't a problem for any of the in-tree boards. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
| * | avr32: refactor the portmux/gpio codeHaavard Skinnemoen2008-09-01-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Separate the portmux configuration functionality from the GPIO pin control API. - Separate the controller-specific code from the chip-specific code. - Allow "ganged" port configuration (multiple pins at once). - Add more flexibility to the "canned" peripheral select functions: - Allow using more than 23 address bits, more chip selects, as well as NAND- and CF-specific pins. - Make the MACB SPEED pin optional, and choose between MII/RMII using a parameter instead of an #ifdef. - Make it possible to use other MMC slots than slot 0, and support different MMC/SDCard data bus widths. - Use more reasonable pull-up defaults; floating pins may consume a lot of power. - Get rid of some custom portmux code from the mimc200 board code. The old gpio/portmux API couldn't really handle its requirements, but the new one can. - Add documentation. The end result is slightly smaller code for all boards. Which isn't really the point, but at least it isn't any larger. This has been verified on ATSTK1002 and ATNGW100. I'd appreciate if the board maintainers could help me test this on their boards. In particular, the mimc200 port has lost a lot of code, so I'm hoping Mark can help me out. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com> Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com> Cc: Mark Jackson <mpfj@mimc.co.uk> Cc: Alex Raimondi <alex.raimondi@miromico.ch> Cc: Julien May <julien.may@miromico.ch> Changes since v1: * Enable pullup on NWAIT * Add missing include to portmux-pio.h * Rename CONFIG_PIO2 -> CONFIG_PORTMUX_PIO to match docs
* | | Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-2/+1
| |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* | Introduce netdev.h header file and remove externsBen Warren2008-09-02-2/+1
|/ | | | | | | This addresses all drivers whose initializers have already been moved to board_eth_init()/cpu_eth_init(). Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* Merge branch 'eth-cleanup' of git://git.denx.de/u-boot-avr32Haavard Skinnemoen2008-07-30-37/+12
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| * Moved initialization of AVR32 Ethernet controllers to board_eth_init()Ben Warren2008-07-24-37/+12
| | | | | | | | | | | | | | | | Renamed initialization functions for atngw100 and atstk1000. Removed initializations for these boards from net/eth.c Signed-off-by: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* | avr32: Fix printf() format warningsHaavard Skinnemoen2008-07-23-1/+1
|/ | | | Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Enable SPI flash support on ATNGW100Haavard Skinnemoen2008-06-20-0/+25
| | | | | | | The ATNGW100 has 8MB DataFlash on board. Give users access to it through the new SPI flash framework. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-12-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* avr32: Rework SDRAM initialization codeHaavard Skinnemoen2008-05-27-3/+18
| | | | | | | | | | | | | | This cleans up the SDRAM initialization and related code a bit, and allows faster booting. * Add definitions for EBI and internal SRAM to asm/arch/memory-map.h * Remove memory test from sdram_init() and make caller responsible for verifying the SDRAM and determining its size. * Remove base_address member from struct sdram_config (was sdram_info) * Add data_bits member to struct sdram_config and kill CFG_SDRAM_16BIT * Add support for a common STK1000 hack: 16MB SDRAM instead of 8. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Use the same entry point for reset and exception handlingHaavard Skinnemoen2008-05-27-0/+1
| | | | | | | | | | | | | | Since the reset vector is always aligned to a very large boundary, we can save a couple of KB worth of alignment padding by placing the exception vectors at the same address. Deciding which one it is is easy: If we're handling an exception, the CPU is in Exception mode. If we're starting up after reset, the CPU is in Supervisor mode. So this adds a very minimal overhead to the reset path (only executed once) and the exception handling path (normally never executed at all.) Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Clean up the HMATRIX codeHaavard Skinnemoen2008-05-27-3/+3
| | | | | | | | | | | | | Rework the HMATRIX configuration interface so that it becomes easier to configure the HMATRIX for boards with special needs, and add new parts. The HMATRIX header file has been split into a general, chip-independent part with register definitions, etc. and a chip-specific part with SFR bitfield definitions and master/slave identifiers. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* avr32: Get rid of the .flashprog sectionHaavard Skinnemoen2008-05-27-8/+0
| | | | | | | | | | | | The .flashprog section was only needed back when we were running directly from flash, and it's even more useless on NGW100 since it uses the CFI flash driver which never used this workaround in the first place. Remove it on STK1000 as well, and get rid of all the associated code and annotations. Signed-off-by: Haavard Skinnemoen <haavard.skinnemoen@atmel.com>
* AVR32: Make SDRAM refresh rate configurableHaavard Skinnemoen2008-02-05-0/+3
| | | | | | | | | | | | | | The existing code assumes the SDRAM row refresh period should always be 15.6 us. This is not always true, and indeed on the ATNGW100, the refresh rate should really be 7.81 us. Add a refresh_period member to struct sdram_info and initialize it properly for both ATSTK1000 and ATNGW100. Out-of-tree boards will panic() until the refresh_period member is updated properly. Big thanks to Gerhard Berghofer for pointing out this issue. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
* AVR32: ATNGW100 board supportHaavard Skinnemoen2008-01-18-0/+232
Add support for the ATNGW100 Network Gateway reference design, including flash, ethernet and MMC support. Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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