summaryrefslogtreecommitdiff
path: root/board/amcc
Commit message (Collapse)AuthorAgeLines
* Code cleanup. Update CHANGELOGWolfgang Denk2007-03-21-22/+10
|
* Merge with /home/stefan/git/u-boot/acadiaStefan Roese2007-03-21-0/+2257
|\
| * [PATCH] Add AMCC Acadia (405EZ) eval board supportStefan Roese2007-03-21-0/+2257
| | | | | | | | | | | | | | | | | | This patch adds support for the new AMCC Acadia eval board. Please note that this Acadia/405EZ support is still in a beta stage. Still lot's of cleanup needed but we need a preliminary release now. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Use dynamic SDRAM TLB setup on AMCC Ebony eval boardStefan Roese2007-03-16-58/+19
| | | | | | | | | | | | | | | | Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the DDR memory are dynamically programmed matching the total size of the equipped memory (DIMM modules). Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Fix file mode of sequoia.cStefan Roese2007-03-08-0/+0
| | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | ppc4xx: Clear Sequoia/Rainier security engine reset bitsJohn Otken john@softadvances.com2007-03-08-0/+4
| | | | | | | | Signed-off-by: John Otken john@softadvances.com <john@softadvances.com>
* | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-03-08-597/+94
|\ \
| * \ Merge with /home/stefan/git/u-boot/yucca-ddr2Stefan Roese2007-03-08-597/+94
| |\ \
| | * | [PATCH] Update AMCC Luan 440SP eval board supportStefan Roese2007-03-08-226/+56
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMCC Luan now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. This patch also enables the cache in FLASH for the startup phase of U-Boot (while running from FLASH). After relocating to SDRAM the cache is disabled again. This will speed up the boot process, especially the SDRAM setup, since there are some loops for memory testing (auto calibration). Signed-off-by: Stefan Roese <sr@denx.de>
| | * | [PATCH] Update AMCC Yucca 440SPe eval board supportStefan Roese2007-03-08-371/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. Signed-off-by: Stefan Roese <sr@denx.de>
| | * | ppc4xx: Small AMCC Katmai 440SPe updateStefan Roese2007-03-08-0/+10
| | |/ | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
* | | Merge with /home/wd/git/u-boot/custodian/u-boot-ppc4xxWolfgang Denk2007-03-07-63/+19
|\ \ \ | |/ /
| * | [PATCH] Use dynamic SDRAM TLB setup on AMCC Ocotea eval boardStefan Roese2007-03-07-63/+19
| |/ | | | | | | | | | | | | | | Define CONFIG_PROG_SDRAM_TLB so that the TLB entries for the DDR memory are dynamically programmed matching the total size of the equipped memory (DIMM modules). Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Speed optimization of AMCC Sequoia/Rainier DDR2 setupStefan Roese2007-03-06-8/+13
|/ | | | | | | | | | | | | | As provided by the AMCC applications team, this patch optimizes the DDR2 setup for 166MHz bus speed. The values provided are also save to use on a "normal" 133MHz PLB bus system. Only the refresh counter setup has to be adjusted as done in this patch. For this the NAND booting version had to include the "speed.c" file from the cpu/ppc4xx directory. With this addition the NAND SPL image will just fit into the 4kbytes of program space. gcc version 4.x as provided with ELDK 4.x is needed to generate this optimized code. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update AMCC Katmai 440SPe eval board supportStefan Roese2007-03-01-75/+25
| | | | | | | | | | | This patch updates the recently added Katmai board support. The biggest change is the support of ECC DIMM modules in the 440SP(e) SPD DDR2 driver. Please note, that still some problems are left with some memory configurations. See the driver for more details. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Clean up Katmai (440SPe) linker scriptStefan Roese2007-02-20-16/+0
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Add support for the AMCC Katmai (440SPe) eval boardStefan Roese2007-02-20-0/+1200
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/sr/git/u-boot/denx-merge-srWolfgang Denk2007-01-30-913/+8
|\
| * [PATCH] Merge Yosemite & Yellowstone board portsStefan Roese2007-01-30-913/+8
| | | | | | | | | | | | | | | | | | Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR) share one config file and all board specific files. This way we don't have to maintain two different sets of files for nearly identical boards. Signed-off-by: Stefan Roese <sr@denx.de>
* | Minor code cleanup.Wolfgang Denk2007-01-19-4/+4
|/
* [PATCH] Add support for AMCC Taishan PPC440GX eval boardStefan Roese2007-01-18-0/+1374
| | | | Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/hs/SC3/u-bootWolfgang Denk2007-01-15-3/+0
|\ | | | | | | Some code cleanup.
* | [PATCH] Update Yellowstone (440GR) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+7
| | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+7
| | | | | | | | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Update Sequoia (440EPx) to display board rev and PCI bus speedStefan Roese2007-01-13-0/+7
| | | | | | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Clear PLB4A0_ACR[WRP] on Sequoia (440EPx)Stefan Roese2007-01-05-3/+12
| | | | | | | | | | | | | | This fix will make the MAL burst disabling patch for the Linux EMAC driver obsolete. Signed-off-by: Stefan Roese <sr@denx.de>
* | [PATCH] Add DDR2 optimization code for Sequoia (440EPx) boardStefan Roese2007-01-05-10/+866
|/ | | | | | | | | | This code will optimize the DDR2 controller setup on a board specific basis. Note: This code doesn't work right now on the NAND booting image for the Sequoia board, since it doesn't fit into the 4kBytes for the SPL image. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Fix sequoia flash autodetection (finally correct)Stefan Roese2006-12-22-3/+11
| | | | | | | Now 32MByte and 64MByte FLASH is know to work and other configurations should work too. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-10-83/+77
|\
| * Fix sequoia separate object direcory building problems.Marian Balakowicz2006-10-23-2/+1
| |
| * Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-10/+10
| | | | | | | | Based on patch by Mike Frysinger, 20 Jun 2006
| * Coding style cleanupWolfgang Denk2006-10-09-39/+36
| |
| * Fix TLB setup for Ocotea boardStefan Roese2006-10-04-26/+30
| | | | | | | | Patch by Stefan Roese, 30 Sep 2006
| * Fix reset problem in sequoia sdram init codeStefan Roese2006-10-04-6/+0
| | | | | | | | Patch by Stefan Roese, 23 Sep 2006
* | Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-0/+12
|/ | | | Patch by Stefan Roese, 07 Oct 2006
* Add support for AMCC Rainier PPX440GRx eval boardStefan Roese2006-09-13-0/+8
| | | | Patch by Stefan Roese, 13 Sep 2006
* Add NAND environment support for PPC440EPx Sequoia NAND boot configStefan Roese2006-09-12-1/+7
| | | | Patch by Stefan Roese, 12 Sep 2006
* Add support for AMCC Sequoia PPC440EPx eval boardStefan Roese2006-09-07-0/+1228
| | | | | | | | | | | - Add support for PPC440EPx & PPC440GRx - Add support for PPC440EP(x)/GR(x) NAND controller in cpu/ppc4xx directory - Add NAND boot functionality for Sequoia board, please see doc/README.nand-boot-ppc440 for details - This Sequoia NAND image doesn't support environment in NAND for now. This will be added in a short while. Patch by Stefan Roese, 07 Sep 2006
* Merge with /home/m8/git/u-bootWolfgang Denk2006-09-04-56/+90
|\
| * Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-56/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* | PCIe endpoint support for AMCC Yucca 440SPe boardStefan Roese2006-08-29-5/+75
| | | | | | | | Patch by Tirumala R Marri, 26 Aug 2006
* | Improve DIMM detection for AMCC Yucca 440SPe boardStefan Roese2006-08-29-7/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Improved the memory DIMM detection for the Yucca 440SPe board for the case where a memory DIMM is falsely detected as present. This issue is seen on some AMCC Yucca 440SPe validation boards if only one 512MB memory DIMM is installed, i.e. DIMM slot 0 is populated and DIMM slot 1 is empty. In this case, U-Boot does not correctly detect that there is only one DIMM memory module installed and will falsely detect two DIMM memory modules are present and therefore U-Boot will not calculate the correct amount of total memory and u-boot will not booting up. Patch by Adam Graham, 24 Aug 2006
* | Code cleanupWolfgang Denk2006-08-27-30/+30
|/
* Merge with /home/sr/git/u-boot/denxWolfgang Denk2006-08-13-0/+30
|\
| * Add Macronix MXLV320T flash support for AMCC BambooStefan Roese2006-08-07-0/+30
| | | | | | | | Patch by Stefan Roese, 07 Aug 2006
* | Merge with /home/raj/git/u-bootWolfgang Denk2006-08-11-15/+9
|\ \
| * | Fix PCI-Express on PPC440SPe rev. A.Rafal Jaworowski2006-08-11-15/+9
| | |
* | | Merge with /home/raj/git/u-bootWolfgang Denk2006-08-10-5/+187
|\ \ \ | |/ / | | / | |/ |/|
| * Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-6/+186
| |
* | PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceStefan Roese2006-07-28-4/+4
| | | | | | | | | | | | | | AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
generated by cgit v1.1 at 2024-12-18 08:52:35 +0000