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* ppc4xx: Remove implementations of testdram()Stefan Roese2008-06-03-30/+0
| | | | | | | This patch removes the used testdram() implementations of the board that are maintained by myself. Signed-off-by: Stefan Roese <sr@denx.de>
* Big white-space cleanup.Wolfgang Denk2008-05-21-15/+15
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Remove all the search paths from the .lds files.Jason Wessel2008-04-17-1/+0
| | | | | | | The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
* Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk2008-01-12-1/+1
| | | | | | | | | | | | | | | | | | | With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Enable hardware-fix for PCI/DMA errata on AMCC 440SP/SPe boardsStefan Roese2007-12-06-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by setting the FIXD bit in the SDR0_MFR register. Here a description of the symptoms: Problem Description ------------------------------ If a DMA is performed between memory and PCI with the DMA 1 Controller using prefetch, and as a result uses a special purpose buffer selected by the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29), the first part of the transfer sequence is performed twice. The PPC440SPe PCI Controller requests more data than was needed such that in the case of enforce memory protection, a host CPU exception can occur. No data is corrupted, because data transfer is stopped in the PCI Controller. Prefetch enable is specified by setting DMA Configuration Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0. Behavior that may be observed in a running system --------------------------------------------------------------------------- 1. DMA performance is decreased because of the double access on the PCI bus interface. 2. If an illegal access to some address on the PCI bus is detected at the system level, a machine check or similar system error may occur. Workarounds Available ---------------------------------- 1. Do not program prefetch. Note that a prefetch command cannot be programmed without selecting a special purpose buffer. 2. To avoid crossing a physical boundary of the PCI slave device, add 512 bytes of address to the PCI address range. This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com> from AMCC and slighly changed. Signed-off-by: Pravin M. Bathija <pbathija@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make output a little shorter on PCIe detectionStefan Roese2007-11-05-5/+4
| | | | | | Now not max 3 lines but 2 lines are printed per PCIe port. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Rework of 4xx serial driver (2)Stefan Roese2007-10-31-159/+0
| | | | | | | | | | Change all linker scripts to reference the changed driver name 4xx_uart.o. Note: In most cased all these explicit referencing of these object files in the linker scripts is not neccessary. Only for manually embedded environment into the U-Boot image, which is not done is most cases. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-6/+0
| | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint modeStefan Roese2007-10-31-37/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for dynamic configuration of PCIe ports for the AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe boards Yucca & Katmai and the 405EX board Kilauea. This dynamic configuration is done via the "pcie_mode" environement variable. This variable can be set to "EP" or "RP" for endpoint or rootpoint mode. Multiple values can be joined via the ":" delimiter. Here an example: pcie_mode=RP:EP:EP This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2 as endpoint. Per default Yucca will be configured as: pcie_mode=RP:EP:EP Per default Katmai will be configured as: pcie_mode=RP:RP:REP Per default Kilauea will be configured as: pcie_mode=RP:RP Signed-off-by: Tirumala R Marri <tmarri@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)Stefan Roese2007-10-31-7/+4
| | | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (2) This patch renames the functions from 440spe_ to 4xx_ with a little additional cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)Stefan Roese2007-10-31-3/+3
| | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (1) This patch renames the files from 440spe_pcie to 4xx_pcie Signed-off-by: Stefan Roese <sr@denx.de>
* Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as globalWolfgang Denk2007-09-15-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* [PPC440SPe] PCIe environment settings for Katmai and YuccaGrzegorz Bernacki2007-09-07-0/+12
| | | | | | | | | | | | - 'pciconfighost' is set by default in order to be able to scan bridges behind the primary host/PCIe - 'pciscandelay' env variable is recognized to allow for user-controlled delay before the PCIe bus enumeration; some peripheral devices require a significant delay before they can be scanned (e.g. LSI8408E); without the delay they are not detected Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* [PPC440SPe] Improve PCIe configuration space accessGrzegorz Bernacki2007-09-07-10/+11
| | | | | | | | | | | | | - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.cStefan Roese2007-07-16-0/+34
| | | | | | | The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-2/+2
| | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update AMCC Yucca 440SPe eval board supportStefan Roese2007-03-08-371/+28
| | | | | | | | | The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. Signed-off-by: Stefan Roese <sr@denx.de>
* Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-1/+1
| | | | Based on patch by Mike Frysinger, 20 Jun 2006
* Coding style cleanupWolfgang Denk2006-10-09-3/+0
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* Merge with /home/m8/git/u-bootWolfgang Denk2006-09-04-6/+10
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| * Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-6/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* | PCIe endpoint support for AMCC Yucca 440SPe boardStefan Roese2006-08-29-5/+75
| | | | | | | | Patch by Tirumala R Marri, 26 Aug 2006
* | Improve DIMM detection for AMCC Yucca 440SPe boardStefan Roese2006-08-29-7/+27
|/ | | | | | | | | | | | | | | Improved the memory DIMM detection for the Yucca 440SPe board for the case where a memory DIMM is falsely detected as present. This issue is seen on some AMCC Yucca 440SPe validation boards if only one 512MB memory DIMM is installed, i.e. DIMM slot 0 is populated and DIMM slot 1 is empty. In this case, U-Boot does not correctly detect that there is only one DIMM memory module installed and will falsely detect two DIMM memory modules are present and therefore U-Boot will not calculate the correct amount of total memory and u-boot will not booting up. Patch by Adam Graham, 24 Aug 2006
* Merge with /home/raj/git/u-bootWolfgang Denk2006-08-11-15/+9
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| * Fix PCI-Express on PPC440SPe rev. A.Rafal Jaworowski2006-08-11-15/+9
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* | Merge with /home/raj/git/u-bootWolfgang Denk2006-08-10-5/+187
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| * Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-6/+186
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* | Add support for TB5200 boardWolfgang Denk2006-07-19-4/+2
|/ | | | | | | | The TB5200 ("Tinybox") is a small baseboard for the TQM5200 module integrated in a little aluminium case. Patch by Martin Krause, 8 Jun 2006 Some code cleanup
* Cleanup config file and bootup output for Yucca board.Marian Balakowicz2006-07-03-12/+9
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* Merge: Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-19/+0
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* Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-0/+3321
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