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* Consolidate bool typeYork Sun2013-04-01-3/+0
| | | | | | | | | | | | | 'bool' is defined in random places. This patch consolidates them into a single header file include/linux/types.h, using stdbool.h introduced in C99. All other #define, typedef and enum are removed. They are all consistent with true = 1, false = 0. Replace FALSE, False with false. Replace TRUE, True with true. Skip *.py, *.php, lib/* files. Signed-off-by: York Sun <yorksun@freescale.com>
* Fix incorrect use of getenv() before relocationWolfgang Denk2011-05-12-3/+4
| | | | | | | | | | | | | | | | | | | A large number of boards incorrectly used getenv() in their board init code running before relocation. In some cases this caused U-Boot to hang when certain environment variables grew too long. Fix the code to use getenv_r(). Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: The LEOX team <team@leox.org> Cc: Michael Schwingen <michael@schwingen.org> Cc: Georg Schardt <schardt@team-ctech.de> Cc: Werner Pfister <Pfister_Werner@intercontrol.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Peter De Schrijver <p2@mind.be> Cc: John Zhan <zhanz@sinovee.com> Cc: Rishi Bhattacharya <rishi@ti.com> Cc: Peter Tyser <ptyser@xes-inc.com>
* ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-1/+1
| | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* Move arch/ppc to arch/powerpcStefan Roese2010-04-21-1/+1
| | | | | | | | | | | | | | | | | As discussed on the list, move "arch/ppc" to "arch/powerpc" to better match the Linux directory structure. Please note that this patch also changes the "ppc" target in MAKEALL to "powerpc" to match this new infrastructure. But "ppc" is kept as an alias for now, to not break compatibility with scripts using this name. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Anatolij Gustschin <agust@denx.de>
* ppc: Move cpu/$CPU to arch/ppc/cpu/$CPUPeter Tyser2010-04-13-1/+1
| | | | Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* PCIe, USB: Replace 'end point' references with 'endpoint'Peter Tyser2010-01-17-1/+1
| | | | | | | | | When referring to PCIe and USB 'endpoint' is the standard naming convention. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Acked-by: Stefan Roese <sr@denx.de> Acked-by: Remy Bohmer <linux@bohmer.net>
* POST: Remove duplicated post_hotkey_pressed() functionsStefan Roese2009-12-07-11/+0
| | | | | | | | | | | | | This patch introduces a weak default function for post_hotkey_pressed(), returning 0, for boards without hotkey support. The long-running tests won't be started on those boards. This default function was implemented in many board directories. By implementing this weak default we can remove all those duplicate versions. Boards with hotkey support, can override this weak default function by defining one in their board specific code. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_pre_init() functionStefan Roese2009-11-19-31/+0
| | | | | | | | | This patch removes the duplicted implementations of the pci_pre_init() function by introducing a weak default function for it. This weak default has a different implementation for some PPC variants. It can be overridden by a board specific version. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_target_init() functionStefan Roese2009-11-19-38/+0
| | | | | | | | | | This patch removes the duplicted implementations of the pci_target_init() function by introducing a weak default function for it. This weak default has a different implementation for 440EP(x)/GR(x) PPC's. It can be overridden by a board specific version (e.g. PMC440, korat). Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: Remove duplicated is_pci_host() functionsStefan Roese2009-11-09-21/+0
| | | | | | | | | This patch introduces a weak default function for is_pci_host(), returning 1. This is the default behaviour, since most boards only implement PCI host functionality. This weak default can be overridden by a board specific version if needed. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate 4xx PCIe board specific configurationStefan Roese2009-11-09-161/+30
| | | | | | | | | This patch consolidates the PPC4xx board specific PCIe configuration code. This way the duplicated code is removed. Boards can implement a special, non standard behaviour (e.g. number of PCIe slots, etc) by overriding the weak default functions. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc_4xx: Apply new HW register namesNiklaus Giger2009-10-07-11/+11
| | | | | | | | Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix msg "initialization as root-complex failed" upon PCIe scanStefan Roese2009-10-07-0/+3
| | | | | | | | | | This message is printed upon PCIe bus scan, not only upon error, but also if no PCIe device is detected at all. Since this is not an error, let's remove this message in this case. We already have the message "link is not up." if there is no PCIe device present. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Convert PPC4xx UIC defines from lower case to upper caseStefan Roese2009-09-28-32/+32
| | | | | | | The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-10/+10
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix problem with board_eth_init() vs cpu_eth_init() on AMCC boardsStefan Roese2009-02-12-0/+1
| | | | | | | | Some AMCC eval boards do have a board_eth_init() function calling pci_eth_init(). These boards need to call cpu_eth_init() explicitly now with the new eth_init rework. Signed-off-by: Stefan Roese <sr@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-8/+8
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Moved initialization of EEPRO100 Ethernet controller to board_eth_init()Ben Warren2008-09-02-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Affected boards: db64360 db64460 katmai taihu taishan yucca cpc45 cpu87 eXalion elppc debris kvme080 mpc8315erdb integratorap ixdp425 oxc pm826 pm828 pm854 pm856 ppmc7xx sc3 sc520_spunk sorcery tqm8272 tqm85xx utx8245 Removed initialization of the driver from net/eth.c Also, wrapped contents of pci_eth_init() by CONFIG_PCI. Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* ppc4xx: Cleanup Katmai & Yucca PCIe register usageStefan Roese2008-07-11-55/+7
| | | | | | | This patch cleans up the 440SPe PCIe register usage. Now only defines from the include/asm-ppc/4xx_pcie.h are used. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Remove implementations of testdram()Stefan Roese2008-06-03-30/+0
| | | | | | | This patch removes the used testdram() implementations of the board that are maintained by myself. Signed-off-by: Stefan Roese <sr@denx.de>
* Big white-space cleanup.Wolfgang Denk2008-05-21-15/+15
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Enable hardware-fix for PCI/DMA errata on AMCC 440SP/SPe boardsStefan Roese2007-12-06-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch enables the hardware-fix for the PCI/DMA errata's 19+22 by setting the FIXD bit in the SDR0_MFR register. Here a description of the symptoms: Problem Description ------------------------------ If a DMA is performed between memory and PCI with the DMA 1 Controller using prefetch, and as a result uses a special purpose buffer selected by the PCIXn Bridge Options 1 Register (PCIXn_BRDGOPT1[RBP7] - bits 31-29), the first part of the transfer sequence is performed twice. The PPC440SPe PCI Controller requests more data than was needed such that in the case of enforce memory protection, a host CPU exception can occur. No data is corrupted, because data transfer is stopped in the PCI Controller. Prefetch enable is specified by setting DMA Configuration Register (I2O0_DMAx_CFG[DXEPD] - bit 31) to 0. Behavior that may be observed in a running system --------------------------------------------------------------------------- 1. DMA performance is decreased because of the double access on the PCI bus interface. 2. If an illegal access to some address on the PCI bus is detected at the system level, a machine check or similar system error may occur. Workarounds Available ---------------------------------- 1. Do not program prefetch. Note that a prefetch command cannot be programmed without selecting a special purpose buffer. 2. To avoid crossing a physical boundary of the PCI slave device, add 512 bytes of address to the PCI address range. This patch was originally provided by Pravin M. Bathija <pbathija@amcc.com> from AMCC and slighly changed. Signed-off-by: Pravin M. Bathija <pbathija@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make output a little shorter on PCIe detectionStefan Roese2007-11-05-5/+4
| | | | | | Now not max 3 lines but 2 lines are printed per PCIe port. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate some of the 405 and 440 macros/structs into 4xxStefan Roese2007-10-31-6/+0
| | | | | | | | | | This patch moves some common 4xx macros and the PPC405_SYS_INFO/ PPC440_SYS_INFO structure into the common ppc4xx.h header. Lot's of other macros are good candidates to be consolidated this way in the future. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Dynamic configuration of 4xx PCIe mode as root or endpoint modeStefan Roese2007-10-31-37/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for dynamic configuration of PCIe ports for the AMCC PPC4xx boards equipped with PCIe interfaces. These are the PPC440SPe boards Yucca & Katmai and the 405EX board Kilauea. This dynamic configuration is done via the "pcie_mode" environement variable. This variable can be set to "EP" or "RP" for endpoint or rootpoint mode. Multiple values can be joined via the ":" delimiter. Here an example: pcie_mode=RP:EP:EP This way, PCIe port 0 will be configured as rootpoint, PCIe port 1 and 2 as endpoint. Per default Yucca will be configured as: pcie_mode=RP:EP:EP Per default Katmai will be configured as: pcie_mode=RP:RP:REP Per default Kilauea will be configured as: pcie_mode=RP:RP Signed-off-by: Tirumala R Marri <tmarri@amcc.com> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (2)Stefan Roese2007-10-31-7/+4
| | | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (2) This patch renames the functions from 440spe_ to 4xx_ with a little additional cleanup Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Make 440SPe PCIe code more generic to use on different 4xx PPCs (1)Stefan Roese2007-10-31-3/+3
| | | | | | | | | | This patch is the first patch of a series to make the 440SPe PCIe code usable on different 4xx PPC platforms. In preperation for the new 405EX which is also equipped with PCIe interfaces. (1) This patch renames the files from 440spe_pcie to 4xx_pcie Signed-off-by: Stefan Roese <sr@denx.de>
* Fix cases where DECLARE_GLOBAL_DATA_PTR was not declared as globalWolfgang Denk2007-09-15-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* [PPC440SPe] PCIe environment settings for Katmai and YuccaGrzegorz Bernacki2007-09-07-0/+12
| | | | | | | | | | | | - 'pciconfighost' is set by default in order to be able to scan bridges behind the primary host/PCIe - 'pciscandelay' env variable is recognized to allow for user-controlled delay before the PCIe bus enumeration; some peripheral devices require a significant delay before they can be scanned (e.g. LSI8408E); without the delay they are not detected Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* [PPC440SPe] Improve PCIe configuration space accessGrzegorz Bernacki2007-09-07-4/+5
| | | | | | | | | | | | | - correct configuration space mapping - correct bus numbering - better access to config space Prior to this patch, the 440SPe host/PCIe bridge was able to configure only the first device on the first bus. We now allow to configure up to 16 buses; also, scanning for devices behind the PCIe-PCIe bridge is supported, so peripheral devices farther in hierarchy can be identified. Signed-off-by: Grzegorz Bernacki <gjb@semihalf.com>
* ppc4xx: Support for Yucca board with 440SPe Rev A added to 44x_spd_ddr2.cStefan Roese2007-07-16-0/+34
| | | | | | | The new boardspecific DDR2 controller configuration is used for the Yucca board. Now the Yucca board with 440SPe Rev. A chips is also supported. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-2/+2
| | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update AMCC Yucca 440SPe eval board supportStefan Roese2007-03-08-314/+2
| | | | | | | | | The AMCC Yucca now uses the common 440SP(e) DDR SPD code for DDR inititializition. This includes DDR auto calibration and support for different DIMM modules, instead of the fixed setup used in the earlier version. Signed-off-by: Stefan Roese <sr@denx.de>
* Coding style cleanupWolfgang Denk2006-10-09-3/+0
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* PCIe endpoint support for AMCC Yucca 440SPe boardStefan Roese2006-08-29-5/+75
| | | | Patch by Tirumala R Marri, 26 Aug 2006
* Improve DIMM detection for AMCC Yucca 440SPe boardStefan Roese2006-08-29-7/+24
| | | | | | | | | | | | | | | Improved the memory DIMM detection for the Yucca 440SPe board for the case where a memory DIMM is falsely detected as present. This issue is seen on some AMCC Yucca 440SPe validation boards if only one 512MB memory DIMM is installed, i.e. DIMM slot 0 is populated and DIMM slot 1 is empty. In this case, U-Boot does not correctly detect that there is only one DIMM memory module installed and will falsely detect two DIMM memory modules are present and therefore U-Boot will not calculate the correct amount of total memory and u-boot will not booting up. Patch by Adam Graham, 24 Aug 2006
* Fix PCI-Express on PPC440SPe rev. A.Rafal Jaworowski2006-08-11-0/+1
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* Add support for PCI-Express on PPC440SPe (Yucca board).Rafal Jaworowski2006-08-10-2/+128
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* Cleanup config file and bootup output for Yucca board.Marian Balakowicz2006-07-03-12/+9
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* Add support for AMCC 440SPe CPU based eval board (Yucca).Marian Balakowicz2006-06-30-0/+1100
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