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* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-0/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-31/+31
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boardsStefan Roese2008-07-11-21/+0
| | | | | | | | | This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese <sr@denx.de>
* Cleanup out-or-tree building for some boards (.depend)Wolfgang Denk2008-07-02-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-12-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* ppc4xx: Remove superfluous dram_init() call or replace it by initdram()Stefan Roese2008-06-03-49/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
* Big white-space cleanup.Wolfgang Denk2008-05-21-4/+4
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Add device tree support to AMCC YosemiteIra Snyder2008-05-08-0/+23
| | | | | | | | | Add support for booting with a device tree blob. This is needed to boot ARCH=powerpc kernels. Also add support for setting the eth0 mac address via the ethaddr variable. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Stefan Roese <sr@denx.de>
* Remove all the search paths from the .lds files.Jason Wessel2008-04-17-1/+0
| | | | | | | The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
* Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk2008-01-12-1/+1
| | | | | | | | | | | | | | | | | | | With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Rework of 4xx serial driver (2)Stefan Roese2007-10-31-13/+0
| | | | | | | | | | Change all linker scripts to reference the changed driver name 4xx_uart.o. Note: In most cased all these explicit referencing of these object files in the linker scripts is not neccessary. Only for manually embedded environment into the U-Boot image, which is not done is most cases. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & YosemiteStefan Roese2007-10-15-2/+5
| | | | | | | | | | | The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-2/+2
| | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Merge Yosemite & Yellowstone board portsStefan Roese2007-01-30-0/+8
| | | | | | | | | Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR) share one config file and all board specific files. This way we don't have to maintain two different sets of files for nearly identical boards. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+7
| | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* Merge with /home/stefan/git/u-boot/denxStefan Roese2006-11-10-1/+1
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| * Move "ar" flags to config.mk to allow for silent "make -s"Wolfgang Denk2006-10-09-1/+1
| | | | | | | | Based on patch by Mike Frysinger, 20 Jun 2006
* | Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-0/+6
|/ | | | Patch by Stefan Roese, 07 Oct 2006
* Add support for a saving build objects in a separate directory.Marian Balakowicz2006-09-01-6/+10
| | | | | | | | | | | | | | | | | | | | | Modifications are based on the linux kernel approach and support two use cases: 1) Add O= to the make command line 'make O=/tmp/build all' 2) Set environement variable BUILD_DIR to point to the desired location 'export BUILD_DIR=/tmp/build' 'make' The second approach can also be used with a MAKEALL script 'export BUILD_DIR=/tmp/build' './MAKEALL' Command line 'O=' setting overrides BUILD_DIR environent variable. When none of the above methods is used the local build is performed and the object files are placed in the source directory.
* PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceStefan Roese2006-07-28-2/+2
| | | | | | | AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
* Correct GPIO setup (UART1/IRQ's) on yosemite & yellowstoneWolfgang Denk2006-05-30-2/+2
| | | | Patch by Stefan Roese, 29 May 2006
* GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-1/+2
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* Changes to Yellowstone & Yosemite 440EP/GR eval boards:Stefan Roese2005-12-15-7/+86
| | | | | | | | - Changed GPIO setup to enable another address line in order to address 64M of FLASH. - Added function sdram_tr1_set to auto calculate the tr1 value for the DDR. Patch by Steven Blakeslee, 12 Dec 2005
* (no commit message)Wolfgang Denk2005-12-12-0/+1
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* Minor AMCC 4xx board cleanupsStefan Roese2005-11-29-12/+0
| | | | Patch by Stefan Roese, 27 Nov 2005
* Changed PPC44x startup message (cpu info, speed...) to common style:Stefan Roese2005-11-27-11/+1
| | | | | | | | | | | On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional informations like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005
* Adjust bd->bi_flashstart on Yellowstone & Yosemite to correct sizeStefan Roese2005-11-05-0/+4
| | | | Patch by Stefan Roese, 05 Nov 2005
* Additional fix for external IRQ config on Yellowstone & YosemiteStefan Roese2005-11-03-19/+19
| | | | Patch by Stefan Roese, 03 Nov 2005
* Fix external IRQ configuration on Yellowstone & YosemiteStefan Roese2005-10-28-0/+5
| | | | | | | The multiplexed signals Ext IRQ0...3 have to be configured as IRQ, because they default to GPIOx (440EP/GR). Patch by Stefan Roese, 28 Oct 2005
* Change board message on AMCC Yosemite & Yellowstone to common styleStefan Roese2005-10-03-3/+9
| | | | Patch by Stefan Roese, 3 Oct 2005
* Fix problems with ld version 2.16 (dot outside sections problem)Wolfgang Denk2005-08-31-0/+2
| | | | | Pointed out by Gerhard Jaeger, 31 Aug 2005; cf. http://sourceware.org/ml/binutils/2005-08/msg00412.html
* Merged 405gp_enet.c and 440gx_enet.c to generic 4xx_enet.cStefan Roese2005-08-16-1/+0
| | | | | now handling all 4xx cpu's. Patch by Stefan Roese, 16 Aug 2005
* Update AMCC Yosemite to get a consistent setup for all AMCC evalStefan Roese2005-08-11-581/+67
| | | | | boards (baudrate, environment...). Flash driver fixed. Patch by Stefan Roese, 11 Aug 2005
* Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.Stefan Roese2005-08-01-0/+1349
Patch by Steven Blakeslee, 27 Jul 2005
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