summaryrefslogtreecommitdiff
path: root/board/amcc/yosemite/yosemite.c
Commit message (Collapse)AuthorAgeLines
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-1/+1
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-17/+1
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* Fix incorrect use of getenv() before relocationWolfgang Denk2011-05-12-3/+4
| | | | | | | | | | | | | | | | | | | A large number of boards incorrectly used getenv() in their board init code running before relocation. In some cases this caused U-Boot to hang when certain environment variables grew too long. Fix the code to use getenv_r(). Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: The LEOX team <team@leox.org> Cc: Michael Schwingen <michael@schwingen.org> Cc: Georg Schardt <schardt@team-ctech.de> Cc: Werner Pfister <Pfister_Werner@intercontrol.de> Cc: Dirk Eibach <eibach@gdsys.de> Cc: Peter De Schrijver <p2@mind.be> Cc: John Zhan <zhanz@sinovee.com> Cc: Rishi Bhattacharya <rishi@ti.com> Cc: Peter Tyser <ptyser@xes-inc.com>
* ppc4xx: Move ppc4xx headers to powerpc include directoryStefan Roese2010-09-23-1/+1
| | | | | | | | | This patch moves some ppc4xx related headers from the common include directory (include/) to the powerpc specific one (arch/powerpc/include/asm/). This way to common include directory is not so cluttered with files. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_master_init() functionStefan Roese2009-11-19-21/+0
| | | | | | | | This patch removes the duplicted implementations of the pci_master_init() function by introducing a weak default function for it. It can be overridden by a board specific version. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_pre_init() functionStefan Roese2009-11-19-55/+0
| | | | | | | | | This patch removes the duplicted implementations of the pci_pre_init() function by introducing a weak default function for it. This weak default has a different implementation for some PPC variants. It can be overridden by a board specific version. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Consolidate pci_target_init() functionStefan Roese2009-11-19-61/+0
| | | | | | | | | | This patch removes the duplicted implementations of the pci_target_init() function by introducing a weak default function for it. This weak default has a different implementation for 440EP(x)/GR(x) PPC's. It can be overridden by a board specific version (e.g. PMC440, korat). Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Matthias Fuchs <matthias.fuchs@esd.eu>
* ppc4xx: Remove duplicated is_pci_host() functionsStefan Roese2009-11-09-23/+0
| | | | | | | | | This patch introduces a weak default function for is_pci_host(), returning 1. This is the default behaviour, since most boards only implement PCI host functionality. This weak default can be overridden by a board specific version if needed. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Yosemite/Yellowstone: Check and reconfigure the PCI sync clockStefan Roese2009-10-23-3/+23
| | | | | | | This patch now uses the 440EP(x)/GR(x) function to check and dynamically reconfigure the PCI sync clock. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc_4xx: Apply new HW register namesNiklaus Giger2009-10-07-16/+16
| | | | | | | | Modify all existing *.c files to use the new register names as seen in the AMCC manuals. Signed-off-by: Niklaus Giger <niklaus.giger@member.fsf.org> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Convert PPC4xx SDRAM defines from lower case to upper caseStefan Roese2009-09-28-16/+16
| | | | | | | | | The latest PPC4xx register cleanup patch missed some SDRAM defines. This patch now changes lower case UIC defines to upper case. Also some names are changed to match the naming in the IBM/AMCC users manuals (e.g. mem_mcopt1 -> SDRAM0_CFG). Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Convert PPC4xx UIC defines from lower case to upper caseStefan Roese2009-09-28-15/+15
| | | | | | | The latest PPC4xx register cleanup patch missed the UIC defines. This patch now changes lower case UIC defines to upper case. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Big cleanup of PPC4xx definesStefan Roese2009-09-11-29/+29
| | | | | | | | | | | | | | | | This patch cleans up multiple issues of the 4xx register (mostly DCR, SDR, CPR, etc) definitions: - Change lower case defines to upper case (plb4_acr -> PLB4_ACR) - Change the defines to better match the names from the user's manuals (e.g. cprpllc -> CPR0_PLLC) - Removal of some unused defines Please test this patch intensive on your PPC4xx platform. Even though I tried not to break anything and tested successfully on multiple 4xx AMCC platforms, testing on custom platforms is recommended. Signed-off-by: Stefan Roese <sr@denx.de>
* rename CFG_ macros to CONFIG_SYSJean-Christophe PLAGNIOL-VILLARD2008-10-18-20/+20
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* ppc4xx: Remove redundant ft_board_setup() functions from some 4xx boardsStefan Roese2008-07-11-21/+0
| | | | | | | | | This patch removes some ft_board_setup() functions from some 4xx boards. This can be done since we now have a default weak implementation for this in cpu/ppc4xx/fdt.c. Only board in need for a different/custom implementation like canyonlands need their own version. Signed-off-by: Stefan Roese <sr@denx.de>
* Change initdram() return type to phys_size_tBecky Bruce2008-06-12-1/+1
| | | | | | | | | | | | | | | | | | | This patch changes the return type of initdram() from long int to phys_size_t. This is required for a couple of reasons: long int limits the amount of dram to 2GB, and u-boot in general is moving over to phys_size_t to represent the size of physical memory. phys_size_t is defined as an unsigned long on almost all current platforms. This patch *only* changes the return type of the initdram function (in include/common.h, as well as in each board's implementation of initdram). It does not actually modify the code inside the function on any of the platforms; platforms which wish to support more than 2GB of DRAM will need to modify their initdram() function code. Build tested with MAKEALL for ppc, arm, mips, mips-el. Booted on powerpc MPC8641HPCN. Signed-off-by: Becky Bruce <becky.bruce@freescale.com>
* ppc4xx: Remove superfluous dram_init() call or replace it by initdram()Stefan Roese2008-06-03-49/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Historically the 405 U-Boot port had a dram_init() call in early init stage. This function was still called from start.S and most of the time coded in assembler. This is not needed anymore (since a long time) and boards should implement the common initdram() function in C instead. This patch now removed the dram_init() call from start.S and removes the empty implementations that are scattered through most of the 405 board ports. Some older board ports really implement this dram_init() though. These are: csb272 csb472 ERIC EXBITGEN W7OLMC W7OLMG I changed those boards to call this assembler dram_init() function now from their board specific initdram() instead. This *should* work, but please test again on those platforms. And it is perhaps a good idea that those boards use some common 405 SDRAM initialization code from cpu/ppc4xx at some time. So further patches welcome here. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add device tree support to AMCC YosemiteIra Snyder2008-05-08-0/+23
| | | | | | | | | Add support for booting with a device tree blob. This is needed to boot ARCH=powerpc kernels. Also add support for setting the eth0 mac address via the ethaddr variable. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Fix incorrect 33/66MHz PCI clock log-message on Sequoia & YosemiteStefan Roese2007-10-15-2/+5
| | | | | | | | | | | The BCSR status bit for the 66MHz PCI operation was correctly addressed (MSB/LSB problem). Now the correct currently setup PCI frequency is displayed upon bootup. This patch also fixes this problem on Rainier & Yellowstone, since these boards use the same souce code as Sequoia & Yosemite do. Signed-off-by: Stefan Roese <sr@denx.de>
* ppc4xx: Add pci_pre_init() for 405 boardsStefan Roese2007-06-25-2/+2
| | | | | | | | This patch removes the CFG_PCI_PRE_INIT option completely, since it's not needed anymore with the patch from Matthias Fuchs with the "weak" pci_pre_init() implementation. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Merge Yosemite & Yellowstone board portsStefan Roese2007-01-30-0/+8
| | | | | | | | | Now the AMCC eval boards Yosemite (440EP) and Yellowstone (440GR) share one config file and all board specific files. This way we don't have to maintain two different sets of files for nearly identical boards. Signed-off-by: Stefan Roese <sr@denx.de>
* [PATCH] Update Yosemite (440EP) to display board rev and PCI bus speedStefan Roese2007-01-13-18/+7
| | | | | | | | | | Now the board revision and the current PCI bus speed are printed after the board message. Also the EBC initialising is now done via defines in the board config file. Signed-off-by: Stefan Roese <sr@denx.de>
* Add CONFIG_BOARD_RESET to configure board specific reset functionStefan Roese2006-10-07-0/+6
| | | | Patch by Stefan Roese, 07 Oct 2006
* PPC440 DDR setup: Set SDRAM0_CFG0[PMU]=0 for best performanceStefan Roese2006-07-28-2/+2
| | | | | | | AMCC suggested to set the PMU bit to 0 for best performace on the PPC440 DDR controller. Please see doc/README.440-DDR-performance for details. Patch by Stefan Roese, 28 Jul 2006
* Correct GPIO setup (UART1/IRQ's) on yosemite & yellowstoneWolfgang Denk2006-05-30-2/+2
| | | | Patch by Stefan Roese, 29 May 2006
* GCC-4.x fixes: clean up global data pointer initialization for all boards.Wolfgang Denk2006-03-31-1/+2
|
* Changes to Yellowstone & Yosemite 440EP/GR eval boards:Stefan Roese2005-12-15-7/+86
| | | | | | | | - Changed GPIO setup to enable another address line in order to address 64M of FLASH. - Added function sdram_tr1_set to auto calculate the tr1 value for the DDR. Patch by Steven Blakeslee, 12 Dec 2005
* Minor AMCC 4xx board cleanupsStefan Roese2005-11-29-12/+0
| | | | Patch by Stefan Roese, 27 Nov 2005
* Changed PPC44x startup message (cpu info, speed...) to common style:Stefan Roese2005-11-27-11/+1
| | | | | | | | | | | On PPC44x platforms, the startup message generated in "cpu.c" only comprised the ppc type and revision but not additional informations like speed etc. Those speed infos where printed in the board specific code. This new implementation now prints all CPU infos in the common cpu specific code. No board specific code is needed anymore and therefore removed from all current 44x implementations. Patch by Stefan Roese, 27 Nov 2005
* Adjust bd->bi_flashstart on Yellowstone & Yosemite to correct sizeStefan Roese2005-11-05-0/+4
| | | | Patch by Stefan Roese, 05 Nov 2005
* Additional fix for external IRQ config on Yellowstone & YosemiteStefan Roese2005-11-03-19/+19
| | | | Patch by Stefan Roese, 03 Nov 2005
* Fix external IRQ configuration on Yellowstone & YosemiteStefan Roese2005-10-28-0/+5
| | | | | | | The multiplexed signals Ext IRQ0...3 have to be configured as IRQ, because they default to GPIOx (440EP/GR). Patch by Stefan Roese, 28 Oct 2005
* Change board message on AMCC Yosemite & Yellowstone to common styleStefan Roese2005-10-03-3/+9
| | | | Patch by Stefan Roese, 3 Oct 2005
* Update AMCC Yosemite to get a consistent setup for all AMCC evalStefan Roese2005-08-11-1/+54
| | | | | boards (baudrate, environment...). Flash driver fixed. Patch by Stefan Roese, 11 Aug 2005
* Add support for AMCC PPC440EP/GR eval boards Yosemite and Yellowstone.Stefan Roese2005-08-01-0/+424
Patch by Steven Blakeslee, 27 Jul 2005
generated by cgit v1.1 at 2024-12-01 09:58:57 +0000