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* ppc: Enable full relocation to RAMPeter Tyser2009-10-03-1/+0
| | | | | | | | | | | | | The following changes allow U-Boot to fully relocate from flash to RAM: - Remove linker scripts' .fixup sections from the .text section - Add -mrelocatable to PLATFORM_RELFLAGS for all boards - Define CONFIG_RELOC_FIXUP_WORKS for all boards Previously, U-Boot would partially relocate, but statically initialized pointers needed to be manually relocated. Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
* Fix all linker script to handle all rodata sectionsTrent Piepho2009-03-20-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A recent gcc added a new unaligned rodata section called '.rodata.str1.1', which needs to be added the the linker script. Instead of just adding this one section, we use a wildcard ".rodata*" to get all rodata linker section gcc has now and might add in the future. However, '*(.rodata*)' by itself will result in sub-optimal section ordering. The sections will be sorted by object file, which causes extra padding between the unaligned rodata.str.1.1 of one object file and the aligned rodata of the next object file. This is easy to fix by using the SORT_BY_ALIGNMENT command. This patch has not be tested one most of the boards modified. Some boards have a linker script that looks something like this: *(.text) . = ALIGN(16); *(.rodata) *(.rodata.str1.4) *(.eh_frame) I change this to: *(.text) . = ALIGN(16); *(.eh_frame) *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) This means the start of rodata will no longer be 16 bytes aligned. However, the boundary between text and rodata/eh_frame is still aligned to 16 bytes, which is what I think the real purpose of the ALIGN call is. Signed-off-by: Trent Piepho <xyzzy@speakeasy.org>
* Align end of bss by 4 bytesSelvamuthukumar2008-11-18-0/+1
| | | | | | | | | | Most of the bss initialization loop increments 4 bytes at a time. And the loop end is checked for an 'equal' condition. Make the bss end address aligned by 4, so that the loop will end as expected. Signed-off-by: Selvamuthukumar <selva.muthukumar@e-coninfotech.com> Signed-off-by: Wolfgang Denk <wd@denx.de>
* rename environment.c in env_embedded.c to reflect is functionalityJean-Christophe PLAGNIOL-VILLARD2008-09-10-1/+1
| | | | Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
* Big white-space cleanup.Wolfgang Denk2008-05-21-4/+4
| | | | | | | | | | | This commit gets rid of a huge amount of silly white-space issues. Especially, all sequences of SPACEs followed by TAB characters get removed (unless they appear in print statements). Also remove all embedded "vim:" and "vi:" statements which hide indentation problems. Signed-off-by: Wolfgang Denk <wd@denx.de>
* Remove all the search paths from the .lds files.Jason Wessel2008-04-17-1/+0
| | | | | | | The cross compiler is responsible for providing the correct libraries and the logic to find the linking libraries. Signed-off-by: Jason Wessel <jason.wessel@windriver.com>
* Fix linker scripts: add NOLOAD atribute to .bss/.sbss sectionsWolfgang Denk2008-01-12-1/+1
| | | | | | | | | | | | | | | | | | | With recent toolchain versions, some boards would not build because or errors like this one (here for ocotea board when building with ELDK 4.2 beta): ppc_4xx-ld: section .bootpg [fffff000 -> fffff23b] overlaps section .bss [fffee900 -> fffff8ab] For many boards, the .bss section is big enough that it wraps around at the end of the address space (0xFFFFFFFF), so the problem will not be visible unless you use a 64 bit tool chain for development. On some boards however, changes to the code size (due to different optimizations) we bail out with section overlaps like above. The fix is to add the NOLOAD attribute to the .bss and .sbss sections, telling the linker that .bss does not consume any space in the image. Signed-off-by: Wolfgang Denk <wd@denx.de>
* ppc4xx: Add AMCC Kilauea/Haleakala NAND booting supportStefan Roese2007-11-03-0/+137
This patch adds NAND booting support for the AMCC 405EX(r) eval boards. Again, only one image supports both targets. Signed-off-by: Stefan Roese <sr@denx.de>