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* ARM: socfpga: move board select into mach-socfpga/KconfigMasahiro Yamada2015-05-07-31/+0
| | | | | | | | | | Switch to a more standard way of board select; put the SoC select into arch/arm/Kconfig and move the board select menu under arch/arm/mach-socfpga/Kconfig. Also, consolidate SYS_BOARD, SYS_VENDOR, SYS_SOC, SYS_CONFIG_NAME. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: socfpga: do not add board directory to header search pathMasahiro Yamada2015-05-07-1/+1
| | | | | | | | | The compiler option "-Iboard/$(VENDOR)/$(BOARD)" just exists here for iocsr_config.c to be able to include iocsr_config.h. Use "..." instead of <...> to include a header in the same directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* arm: socfpga: spl: update peripheral pll for dev kitDinh Nguyen2015-04-21-1/+1
| | | | | | | | "commit 0d13a0051b2c arm: socfpga: Sync Cyclone V DK PLL configuration" mistakenly changed CONFIG_HPS_MAINPLLGRP_VCO_NUMER to 39, the correct value should be 79. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: spl: Add s_init stubDinh Nguyen2015-04-21-0/+2
| | | | | | | | | | Add a stub s_init function in the board file. The reason why the stub function is needed is that most of the work is now being done in board_init_f(), there is no need for the SPL to do anything s_init(). However, since lowlevel_init() is still branching to s_init(), we need stub function for now, until lowlevel_init() morphs into s_init(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: fix uart0 pin mux configurationDinh Nguyen2015-04-21-2/+2
| | | | | | | | | commit "07d30b6c3129 arm: socfpga: Sync Cyclone V DK pinmux configuration" incorrectly set the muxing for UART0 on the Cyclone V DK. This fixes it up so UART0 is working again. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Add Altera Arria V DK supportMarek Vasut2015-03-04-0/+928
| | | | | | | | | | | Add support for the Altera Arria V development kit. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Zap board_early_init_f()Marek Vasut2015-03-04-8/+0
| | | | | | | | | | | Zap this unused empty function, no point in having it. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Zap checkboard()Marek Vasut2015-03-04-9/+0
| | | | | | | | | | | | | Since all boards now have a DT, instead of hard-coding the board name into the U-Boot binary, read the board name from DT "model" property. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Drop cyclone5 suffix from board file nameMarek Vasut2015-03-04-1/+1
| | | | | | | | | | | | Drop the _cyclone5 suffix from socfpga_cyclone5.c since this file will contain Arria 5 support as well. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Sync Cyclone V DK PLL configurationMarek Vasut2015-03-04-23/+11
| | | | | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). NOTE: This change is useless until we get proper SPL support, at which point this will likely need further rework. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Sync Cyclone V DK pinmux configurationMarek Vasut2015-03-04-101/+101
| | | | | | | | | | | | Sync SoCFPGA Cyclone V development kit pinmux configuration with Rocketboard U-Boot v2013.01.01-114-g9381569 (ACDS14.1_REL_GSRD_PR). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: Minor coding style fixMarek Vasut2015-03-04-4/+4
| | | | | | | | | | | Replace multiple spaces with a single tab. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de> Reviewed-by: Stefan Roese <sr@denx.de> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: board: Repair Micrel PHY tuningPavel Machek2014-12-16-6/+28
| | | | | | | | | | | | Add proper error checking into the PHY tuning patch. Make the PHY tunning only happen in case the KSZ9021 PHY is enabled in config. Call the config callback after the tuning finished. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Tom Rini <trini@ti.com> Cc: Pavel Machek <pavel@denx.de>
* arm: socfpga: set skew settings for ethernet phyDinh Nguyen2014-12-06-0/+16
| | | | | | | | | | | | | Set the PHY skew settings for the ethernet phy on the SOCFPGA Cyclone5 hardware. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de>
* arm: socfpga: Add myself as maintainer for the SoCrates boardStefan Roese2014-12-06-0/+5
| | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de> Cc: Marek Vasut <marex@denx.de> Acked-by: Pavel Machek <pavel@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Vince Bridgers <vbridger@altera.com> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* arm: socfpga: Add example UDC configMarek Vasut2014-11-07-0/+21
| | | | | | | | | | | | Add example of an USB UDC configuration with DFU and UMS. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Vince Bridgers <vbridger@altera.com> Acked-by: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* kconfig: arm: introduce symbol for ARM CPUsGeorges Savoundararadj2014-10-29-3/+0
| | | | | | | | | | | | | | | | | This commit introduces a Kconfig symbol for each ARM CPU: CPU_ARM720T, CPU_ARM920T, CPU_ARM926EJS, CPU_ARM946ES, CPU_ARM1136, CPU_ARM1176, CPU_V7, CPU_PXA, CPU_SA1100. Also, it adds the CPU feature Kconfig symbol HAS_VBAR which is selected for CPU_ARM1176 and CPU_V7. For each target, the corresponding CPU is selected and the definition of SYS_CPU in the corresponding Kconfig file is removed. Also, it removes redundant "string" type in some Kconfig files. Signed-off-by: Georges Savoundararadj <savoundg@gmail.com> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Masahiro Yamada <yamada.m@jp.panasonic.com>
* arm: socfpga: Move cache_enable to CPU codeMarek Vasut2014-10-06-3/+0
| | | | | | | | | | | | | | | | Move icache_enable() and dcache_enable() function calls from board code into the CPU code and into the enable_caches() function. This is how the cache enabling code was designed to work. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* arm: socfpga: cache: Enable D-CacheMarek Vasut2014-10-06-0/+1
| | | | | | | | | | | | | | The code is now fixed to the point where we can safely enable the L1 data cache. Enable the D-Cache and set it as write-alloc. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* arm: socfpga: board: Align checkboard() outputMarek Vasut2014-10-06-1/+1
| | | | | | | | | | | | | | Cosmetic change to the checkboard() function output. Align the output with the rest of initial output produced by U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* arm: socfpga: board: Correctly set ATAG positionPavel Machek2014-10-06-0/+4
| | | | | | | | | | | | | The bi_boot_params must point to offset 0x100 in DRAM. Make it so. Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de>
* arm: socfpga: clock: Add missing stubs into board fileMarek Vasut2014-10-06-0/+3
| | | | | | | | | | | | | | | Add some stub defines, which are used by the clock code, but are missing from the auto-generated header file for the SoCFPGA family. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* kconfig: remove redundant "string" type in arch and board KconfigsMasahiro Yamada2014-09-13-8/+0
| | | | | | | | | | | | | | | | | | Now the types of CONFIG_SYS_{ARCH, CPU, SOC, VENDOR, BOARD, CONFIG_NAME} are specified in arch/Kconfig. We can delete the ones in arch and board Kconfig files. This commit can be easily reproduced by the following command: find . -name Kconfig -a ! -path ./arch/Kconfig | xargs sed -i -e ' /config[[:space:]]SYS_\(ARCH\|CPU\|SOC\|\VENDOR\|BOARD\|CONFIG_NAME\)/ { N s/\n[[:space:]]*string// } ' Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Merge branch 'master' of git://git.denx.de/u-boot-niosTom Rini2014-08-31-248/+69
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| * nios2: rebase nios2-generic board to 3c120 reference designThomas Chou2014-08-30-58/+69
| | | | | | | | | | | | | | | | | | Though nios2-generic board meant to be a template, it is helpful to be able to test on a real hardware. As the nios2 linux is developed and tested on a 3c120 FPGA based Golden Hardware Reference Design, it makes sense to rebase nios2-generic on this FPGA design. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * nios2: link to CONFIG_SYS_MONITOR_BASE and remove text_base hookThomas Chou2014-08-30-143/+0
| | | | | | | | | | | | | | This patch changes the link script to base at CONFIG_SYS_MONITOR_BASE. Then we can remove the text_base hook in nios2-generic board. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * nios2: remove epled driverThomas Chou2014-08-30-47/+0
| | | | | | | | | | | | The epled driver was replaced by altera_pio and gpio_led. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | socfpga: initialize designware ethernetPavel Machek2014-08-30-9/+0
| | | | | | | | | | | | | | | | Enable initialization fo designware ethernet controller. With this patch, ethernet works in my configuration, provided I set ethernet address in the environment. Signed-off-by: Pavel Machek <pavel@denx.de>
* | socfpga: Fix SOCFPGA build error for Altera dev kitChin Liang See2014-08-29-1/+1
|/ | | | | | | | | | | | | To fix the build error when build for Altera dev kit, not virtual target. At same time, set the build for Altera dev kit as default instead virtual target. With that, U-Boot is booting well and SPL still lack of few drivers. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Add board MAINTAINERS filesMasahiro Yamada2014-07-30-0/+13
| | | | | | | | | | | | | | | | | | | | We have switched to Kconfig and the boards.cfg file is going to be removed. We have to retrieve the board status and maintainers information from it. The MAINTAINERS format as in Linux Kernel would be nice because we can crib the scripts/get_maintainer.pl script. After some discussion, we chose to put a MAINTAINERS file under each board directory, not the top-level one because we want to collect relevant information for a board into a single place. TODO: Modify get_maintainer.pl to scan multiple MAINTAINERS files. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Suggested-by: Tom Rini <trini@ti.com> Acked-by: Simon Glass <sjg@chromium.org>
* kconfig: add board Kconfig and defconfig filesMasahiro Yamada2014-07-30-0/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds: - arch/${ARCH}/Kconfig provide a menu to select target boards - board/${VENDOR}/${BOARD}/Kconfig or board/${BOARD}/Kconfig set CONFIG macros to the appropriate values for each board - configs/${TARGET_BOARD}_defconfig default setting of each board (This commit was automatically generated by a conversion script based on boards.cfg) In Linux Kernel, defconfig files are located under arch/${ARCH}/configs/ directory. It works in Linux Kernel since ARCH is always given from the command line for cross compile. But in U-Boot, ARCH is not given from the command line. Which means we cannot know ARCH until the board configuration is done. That is why all the "*_defconfig" files should be gathered into a single directory ./configs/. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
* socfpga: Relocate arch common functions away from boardChin Liang See2014-07-05-23/+0
| | | | | | | | | | | | | To move the arch common function away from board folder to arch/arm/cpu/armv7/socfpga folder. Its to avoid code duplication for other non Altera dev kit which is using socfpga device. Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Detlev Zundel <dzu@denx.de>
* socfpga: Adding Scan Manager driverChin Liang See2014-07-05-0/+674
| | | | | | | | | | | | Scan Manager driver will be called to configure the IOCSR scan chain. This configuration will setup the IO buffer settings Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Remove nios-32 arch remnantsVasili Galka2014-06-19-331/+0
| | | | | | | | nios-32 arch was removed back in 2010 (1117cbf). Code depending on its headers (nios.h, nios-io.h) can't possibly compile since then. As it wasn't fixed till now it is safe to remove. Signed-off-by: Vasili Galka <vvv444@gmail.com>
* board: altera: delete unused source filesMasahiro Yamada2014-04-17-354/+0
| | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Scott McNutt <smcnutt@psyent.com>
* socfpga: Adding Clock Manager driverChin Liang See2014-04-07-0/+118
| | | | | | | | | | | | | | Clock Manager driver will be called to reconfigure all the clocks setting based on user input. The input are passed to Preloader through handoff files Signed-off-by: Chin Liang See <clsee@altera.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Tom Rini <trini@ti.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Acked-by: Pavel Machek <pavel@denx.de>
* Move #ifdef(CONFIG_DISPLAY_CPUINFO) from caller to calleeMasahiro Yamada2014-02-19-0/+2
| | | | | | | | | | | | | | | | | | - When CONFIG_DISPLAY_CPUINFO is not enabled, print_cpuinfo() should be defined as an empty function in a header, include/common.h - Remove #ifdef CONFIG_DISPLAY_CPUINFO .. #endif from caller, common/board_f.c and arch/arm/lib/board.c - Remove redundant prototypes in arch/arm/lib/board.c, arch/arm/include/asm/arch-am33x/sys_proto.h and board/nokia/rx51/rx51.h, keeping the one in include/common.h - Add #ifdef CONFIG_DISPLAY_CPUINFO to the func definition where it is missing Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* board: nios2: Check if flash is configured before calling ↵Ezequiel Garcia2014-01-29-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | early_flash_cmd_reset() If CONFIG_CFI_FLASH_MTD is not defined, then we shouldn't perform the flash early reset. This commit fixes the following build error: nios2-generic.c: In function `__early_flash_cmd_reset': nios2-generic.c:23: error: `AMD_CMD_RESET' undeclared (first use in this function) nios2-generic.c:23: error: (Each undeclared identifier is reported only once nios2-generic.c:23: error: for each function it appears in.) nios2-generic.c:24: error: `FLASH_CMD_RESET' undeclared (first use in this function) which was introduced by: commit a113fb39df43546c704aa8eba55720da9a9dfedd Author: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Date: Fri Dec 20 18:34:53 2013 -0300 board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header include Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Cc: Thomas Chou <thomas@wytron.com.tw> Reported-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* board: nios2: Add CONFIG_CFI_FLASH_MTD guard to flash.h header includeEzequiel Garcia2014-01-14-0/+2
| | | | Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com>
* Makefile: make directories by Makefile.buildMasahiro Yamada2013-11-17-4/+0
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* nios2: remove unnecessary header include pathMasahiro Yamada2013-11-15-4/+0
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Thomas Chou <thomas@wytron.com.tw>
* board: arm: convert makefiles to Kbuild styleMasahiro Yamada2013-11-01-28/+2
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Prafulla Wadaskar <prafulla@marvell.com> Cc: Minkyu Kang <mk7.kang@samsung.com> Cc: Vipin Kumar <vipin.kumar@st.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Tom Rini <trini@ti.com>
* nios2: convert makefiles to Kbuild styleMasahiro Yamada2013-11-01-25/+5
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Thomas Chou <thomas@wytron.com.tw>
* Coding Style cleanup: replace leading SPACEs by TABsWolfgang Denk2013-10-14-2/+2
| | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Drop changes for PEP 4 following python tools] Signed-off-by: Tom Rini <trini@ti.com>
* Coding Style cleanup: remove trailing white spaceWolfgang Denk2013-10-14-2/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* socfpga: Adding pin mux handoff filesChin Liang See2013-10-07-0/+268
| | | | | | | | | | | | | | Adding the generated pin mux configuration by Preloader Generator tool Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* socfpga: Adding System Manager driverChin Liang See2013-10-07-1/+3
| | | | | | | | | | | | | | | Adding System Manager driver which will configure the pin mux for real hardware Cyclone V development kit (not Virtual Platform) Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Acked-by: Dinh Nguyen <dinguyen@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
* Merge branch 'u-boot/master' into u-boot-arm/masterAlbert ARIBAUD2013-07-25-182/+11
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| * Add GPL-2.0+ SPDX-License-Identifier to source filesWolfgang Denk2013-07-24-182/+11
| | | | | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini <trini@ti.com>
* | socfpga: Move board/socfpga_cyclone5 to board/socfpgaDinh Nguyen2013-07-25-0/+0
|/ | | | | | | | | | | | | | | | | Because the SOCFPGA platform will include support for Cyclone V and Arria V FPGA parts, renaming socfpga_cyclone5 folder to socfpga to be more generic. Signed-off-by: Dinh Nguyen <dinguyen@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Wolfgang Denk <wd@denx.de> CC: Pavel Machek <pavel@denx.de> Cc: Tom Rini <trini@ti.com> v2: - Add Reviewed-by: Pavel Machek - Cc: Tom Rini
generated by cgit v1.1 at 2024-11-01 20:39:38 +0000