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* arm: socfpga: update MAINTAINERS' file for cyclone5_socdk and arria5_socdkDinh Nguyen2015-09-23-2/+2
| | | | | | | | commit "arm: socfpga: rename socfpga_cyclone5 and socfpga_arria5 config files" renames the configs files, so we should update the MAINTAINERS' entry. At the same time, update the email for Dinh Nguyen. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: Fix ArriaV SoCDK PLL configMarek Vasut2015-08-23-13/+13
| | | | | | | | Pull out the ArriaV SoCDK clock config from ancient Altera U-Boot "rel_socfpga_v2013.01.01_15.05.01_pr" and implant those values into mainline to get a booting ArriaV SoCDK. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Fix MAINTAINERS entry for CV/AV SoCDKMarek Vasut2015-08-23-8/+3
| | | | | | Repair the maintainer entries so they match the current state of code. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Make the pinmux table const u8Marek Vasut2015-08-23-1/+1
| | | | | | | | | | | Now that we're actually converting the QTS-generated header files, we can even adjust their data types. A good candidate for this is the pinmux table, where each entry can have value in the range of 0..3, but each element is declared as unsigned long. By changing the type to u8, we can save over 600 Bytes from the SPL, so do it. This patch also constifies the array. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Switch to filtered QTS filesMarek Vasut2015-08-23-1494/+1286
| | | | Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Remove CV-specific parts from AV-SoCDKMarek Vasut2015-08-23-1117/+0
| | | | | | | Just remove the CycloneV specific parts from the ArriaV SoCDK board and they are no longer needed now. Signed-off-by: Marek Vasut <marex@denx.de>
* arm: socfpga: Split Altera socfpga into AV and CV SoCDKMarek Vasut2015-08-23-0/+2771
The board/altera/socfpga directory is not a generic SoCFPGA machine anymore, but instead it represents the Altera SoCDK board. To make matters more complicated, it represents both CycloneV and ArriaV variant. On the other hand, nowadays, the content of this board directory is mostly comprised of QTS-generated header files, while all the generic code is in arch/arm/mach-socfpga already. Thus, this patch splits the board/altera/socfpga into a separate board directory for ArriaV SoCDK and CycloneV SoCDK, so that each can be populated with the correct QTS-generated header files for that particular board. Signed-off-by: Marek Vasut <marex@denx.de>