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* | | Remove execute permissions from source filesThomas Weber2012-03-04-0/+0
|/ / | | | | | | Signed-off-by: Thomas Weber <weber@corscience.de>
* | ppc: Change memsz variable to signed charSimon Glass2012-03-03-4/+3
| | | | | | | | | | | | | | | | This seems to be unsigned char for no good reason. Tidy this up and remove the casts. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | m68k: Change memsz to a signed char to avoid warningSimon Glass2012-03-03-1/+1
| | | | | | | | | | | | | | | | | | | | There doesn't seem to be any reason for using uchar here, so change it to char. This fixes a warning: pointer targets in passing argument 1 of 'sprintf' differ in signedness Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Wolfgang Denk2012-03-03-2/+32
|\ \ | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-nds32: nds32/board.c: add PCI prompt at boot up nds32/ag101/watchdog.S: add linkage support nds32: add linkage support
| * | nds32/board.c: add PCI prompt at boot upMacpaul Lin2012-02-28-0/+1
| | | | | | | | | | | | | | | | | | add PCI prompt at boot up for probing PCI device Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | nds32/ag101/watchdog.S: add linkage supportMacpaul Lin2012-02-28-2/+3
| | | | | | | | | | | | | | | | | | Add linkage support to watchdog.S. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
| * | nds32: add linkage supportMacpaul Lin2012-02-28-0/+28
| | | | | | | | | | | | | | | | | | Add linkage support. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* | | armv7: omap3: leave outer cache enabledAneesh V2012-02-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mainline kernel for OMAP3 doesn't enable L2 cache It expects L2$ to be enabled by ROM-code/bootloader. Leaving L2$ enabled can be troublesome in cases where the L2 cache is not under CP15 control, such as in Cortex-A9. This problem is explained in detail in the commit dc7100f4080952798413fb63bb4134b22c57623a However, this problem doesn't apply to Cortex-A8 because L2$ in Cortex-A8 is under CP15 control and hence the generic armv7 maintenance opertions work for it. As such we can make an exception for OMAP3 and leave the L2$ enabled when we jump to kernel. This is done by removing the strongly-linked implementation of v7_outer_cache_disable() and allowing it to fall back to the weakly linked implementation that doesn't do anything. Signed-off-by: Aneesh V <aneesh@ti.com>
* | | tt01: add video supportHelmut Raiger2012-02-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | The video setup for the Epson display is provided. Addtionally some extra info is displayed next to the Linux logo. Make get_cpu_rev() publicly available (added to sys_proto.h). Signed-off-by: Helmut Raiger <helmut.raiger@hale.at>
* | | net: fec_mxc: add 1000 Mbps selectionTroy Kisky2012-02-27-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Define FEC_QUIRK_ENET_MAC and add to arch-mx6/imx-regs.h Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com>
* | | dm6467Tevm: Use a common configuration file for davinci_dm6467evm and ↵prabhakar.csengg@gmail.com2012-02-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | davinci_dm6467Tevm In commit 2d575e46859dd9127a9cec731ace77523e6ea2ab a separate header file was introduced for the DM6467T EVM, include/configs/davinci_dm6467Tevm.h. The substantial difference between the davinci_dm6467evm and the davinci_dm6467Tevm configuration is a single bit in the hardware revision that is passed to the Linux kernel and davinci_dm6467evm has REFCLK_FREQ = 27000000 where as davinci_dm6467Tevm.h has a REFCLK_FREQ = 33000000. This patch removes include/configs/davinci_dm6467Tevm.h. Instead the include/configs/davinci_dm6467evm.h configuration is used for DM6467T EVMs and renamed CFG_REFCLK_FREQ to CONFIG_REFCLK_FREQ and CONFIG_REFCLK_FREQ is defined in boards.cfg. Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Cc: Tom Rini <trini@ti.com>
* | | am33xx: ddr_defs.h: Change DDR timingsChase Maupin2012-02-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | * For cold silicon the DDR timings need to be relaxed in order for the device to boot with DDR at 266MHz * Fix proposed by James Doublesin Signed-off-by: Chase Maupin <Chase.Maupin@ti.com>
* | | davinci: cleanup davinci_sync_env_enetaddr() fucntionHadli, Manjunath2012-02-27-3/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | check for the return status for eth_getenv_enetaddr_by_index() and eth_setenv_enetaddr() functions and print appropriate message on failure. Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com> Cc: Tom Rini <trini@ti.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Wolfgang Denk <wd@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | | mx35: generic: Let get_reset_cause be defined only when ↵Fabio Estevam2012-02-27-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_DISPLAY_CPUINFO is selected get_reset_cause() function is only used inside print_cpuinfo(), so let it be defined only when CONFIG_DISPLAY_CPUINFO is selected. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | | mx6q: Add support for ECSPI through mxc_spi driverEric Nelson2012-02-27-0/+44
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* | | mxc_spi: move machine specifics into CPU headersEric Nelson2012-02-27-0/+82
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move (E)CSPI register declarations into the imx-regs.h files for each supported CPU Introduce two new macros to control conditional setup MXC_CSPI - Used for processors with the Configurable Serial Peripheral Interface (MX3x) MXC_ECSPI - For processors with Enhanced Configurable... (MX5x, MX6x) Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org> Tested-by: Jason Liu <jason.hui@linaro.org>
* | | mx6q: define GPIO macros for translating between ordinals and port:indexEric Nelson2012-02-27-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The interface to the mxc_gpio driver uses integer (ordinal) values to refer to all GPIOs on the i.MX processors. The registers themselves and much of the i.MX documentation are banked in groups of 32, and these macros allow the use of the port:index numbering for clarity. GPIO_NUMBER() converts to ordinal value from port:index GPIO_PORT() returns the port of an ordinal value GPIO_INDEX() returns the index or offset of the ordinal. Discussion on the mailing list at http://lists.denx.de/pipermail/u-boot/2012-January/116927.html Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | | MX27: add missing get_tbclk()Stefano Babic2012-02-27-0/+5
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* | | MX28: Fix get_timer() / get_tbclk() issueMarek Vasut2012-02-27-2/+17
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <festevam@gmail.com>
* | | mx28: fix SPL code to make USB booting workMatthias Fuchs2012-02-27-1/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes booting i.MX28 CPUs via USB download. In this mode the CPU's bootrom implements a USB HID device that accepts a bootstream. When downloading the bootstream via USB, first the SPL code is received and executed. Then the u-boot image is received and called. The USB bootmode is interrupt driven. This patch fixes two things: 1) The ARM's fast interrupt mode is disabled when the SPL code has been run. So save and restore the CPSR register. 2) Save and restore c1 control register: the exception vector location needs to be set back to bootrom space to make the USB interrupts work again. The SPL code needs to change this option for the ram size probing. Signed-off-by: Matthias Fuchs <matthias.fuchs@esd.eu> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* | | i.MX28: Fix VDDIO and VDDA setupMarek Vasut2012-02-27-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DC power STS shouldn't be checked if booting off 5V supply. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Robert Deliën <robert@delien.nl> Cc: Fabio Estevam <festevam@gmail.com> Cc: Matthias Fuchs <matthias.fuchs@esd.eu>
* | | MX5/MX6: add missing get_ticks() and get_tbclk()Stefano Babic2012-02-27-18/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet implemented. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Dirk Behme <dirk.behme@de.bosch.com> CC: Jason Liu <jason.hui@linaro.org> CC: Marek Vasut <marek.vasut@gmail.com>
* | | MX31: add missing get_tbclk()Stefano Babic2012-02-27-0/+9
| | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Helmut Raiger <helmut.raiger@hale.at>
* | | MX35: add missing get_ticks() and get_tbclk()Stefano Babic2012-02-27-39/+64
|/ / | | | | | | | | | | | | | | commit f31a911fe (arm, post: add missing post_time_ms for arm) enables get_ticks and get_tbclk for all arm based boards, MX5/MX6 have not yet implemented. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | microblaze: avoid interrupt race conditionsStephan Linz2012-02-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The interrupt acknowledge action have to run after the registered interrupt handler. So we have a chance to bear out the corresponding interrupt request in the corresponding controller hardware. With this reordering, we optain a proper interrupt handling for level triggered interrupt sources -- for example the new axi_timer v1.02.a introduced in ISE 13.2. Signed-off-by: Stephan Linz <linz@li-pro.net> Acked-by: Michal Simek <monstr@monstr.eu>
* | microblaze: fix build failure due to undefined reference to `get_ticks'Stephan Linz2012-02-23-0/+18
|/ | | | | | | | | | | | | | after commit "common: add possibility for readline_into_buffer timeout" (sha1:9c34831) was applied. The Microblaze generic build fails with error below: common/libcommon.o: In function `cread_line': /devel/u-boot/common/main.c:717: undefined reference to `get_ticks' /devel/u-boot/common/main.c:717: undefined reference to `get_tbclk' /devel/u-boot/common/main.c:720: undefined reference to `get_ticks' Signed-off-by: Stephan Linz <linz@li-pro.net> Acked-by: Michal Simek <monstr@monstr.eu>
* Merge branch 'master' of git://git.denx.de/u-boot-mmcWolfgang Denk2012-02-17-4/+4
|\ | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mmc: mmc: make mmc_send_status() more reliable mmc: fix card busy polling Tegra: mmc: Fixed handling of interrupts in timeouts. omap_hsmmc: Wait for CMDI to be clear
| * omap_hsmmc: Wait for CMDI to be clearTom Rini2012-02-15-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before we can send a command we need both the DATI (command inhibit on mmc_dat line) bit and CMDI (command inhibit on mmc_cmd line) are clear. The previous behavior of only checking on DATI was insufficient on some cards and incorrect behavior in any case. This makes the code check for both bits being clear and makes the error print more clear as to what happened. DATI_CMDDIS is removed as it was unused elsewhere in the code and stood for 'DATI is set, cmds are disabled still'. Fix originally spotted by Peter Bigot. Tested-by: Peter A. Bigot <bigotp@acm.org> Tested-by: Robert Nelson <robertcnelson@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Andreas Müller <schnitzeltony@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-02-17-16/+31
|\ \ | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/8xxx:Add MPH controller support in USB device-tree fixup powerpc/8xxx: Cleanup USB device-tree fixup
| * | powerpc/8xxx:Add MPH controller support in USB device-tree fixupramneek mehresh2012-02-15-10/+19
| | | | | | | | | | | | | | | | | | | | | | | | Add support for fixing usb mode and phy type for MPH(Multi Port Host) USB controllers in device-tree nodes. Required for socs like P3060, P5020, etc having MPH USB controller Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| * | powerpc/8xxx: Cleanup USB device-tree fixupramneek mehresh2012-02-15-6/+12
| |/ | | | | | | | | | | | | | | | | Some code cleanup done for USB device-tree fixup: - handling error value returned from fdt_fixup_usb_mode_phy_type() - using ARRAY_SIZE macro - using snprintf instead of sprintf Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Wolfgang Denk2012-02-17-513/+1152
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-x86: x86: Convert board_init_f_r to a processing loop x86: Split init functions out of board.c x86: Move relocation code out of board.c x86: Move setup_pcat_compatibility() out of board.c x86: Move do_go_exec() out of board.c CHECKPATCH: arch/x86/lib/* x86: Tweak IDT and GDT for alignment and readability x86: Allow cache before copy to RAM x86: Create weak init_cache() and default enable_caches() functions x86: Set GD_FLG_RELOC after entering in-RAM copy of U-Boot x86: Use fs for global data x86: Rework relocation calculations x86: Simplify Flash-to-RAM code execution transition x86: Rework Global Descriptor Table loading x86: Remove GDR related magic numbers x86: Speed up copy-to-RAM and clear BSS operations x86: Import glibc memcpy implementation
| * \ Merge branch 'staging'Graeme Russ2012-01-21-513/+1152
| |\ \
| | * | x86: Convert board_init_f_r to a processing loopGraeme Russ2012-01-04-125/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Create an init function array for board_init_f_r - This finalises the migration to a purely array based initialisation mechanism Also tweak a few comments while we are at it so everything is 'correct' -- Changes for v2: - Renamed to a more apt name - Fix bug in set_reloc_flag_r - Re-instate gd->flags = boot_flags; in board_init_f - Added commit message
| | * | x86: Split init functions out of board.cGraeme Russ2012-01-04-221/+438
| | | | | | | | | | | | | | | | | | | | | | | | This patch moves towards reducing board.c to simply a set of init cores for the three initialisation phases (Flash, Flash/RAM, and RAM), a set of three init function arrays and a init function array processing function
| | * | x86: Move relocation code out of board.cGraeme Russ2012-01-04-67/+118
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| | * | x86: Move setup_pcat_compatibility() out of board.cGraeme Russ2012-01-04-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This function simply does not belong in board.c -- Changes for v2: - Added commit message
| | * | x86: Move do_go_exec() out of board.cGraeme Russ2012-01-04-27/+65
| | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - None
| | * | CHECKPATCH: arch/x86/lib/*Graeme Russ2012-01-04-73/+122
| | | |
| | * | x86: Tweak IDT and GDT for alignment and readabilityGraeme Russ2012-01-04-13/+46
| | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - Renamed to better reflect nature of changes
| | * | x86: Allow cache before copy to RAMGraeme Russ2012-01-04-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - None
| | * | x86: Create weak init_cache() and default enable_caches() functionsGraeme Russ2012-01-04-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - Tweaked commit title
| | * | x86: Set GD_FLG_RELOC after entering in-RAM copy of U-BootGraeme Russ2012-01-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - None
| | * | x86: Use fs for global dataGraeme Russ2012-01-04-47/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the base address of the 'F' segment as a pointer to the global data structure. By adding the linear address (i.e. the 'D' segment address) as the first word of the global data structure, the address of the global data relative to the 'D' segment can be found simply, for example, by: fs movl 0, %eax This makes the gd 'pointer' writable prior to relocation (by reloading the Global Desctriptor Table) which brings x86 into line with all other arches NOTE: Writing to the gd 'pointer' is expensive (but we only do it twice) but using it to access global data members (read and write) is still fairly cheap -- Changes for v2: - Rebased against changes made to patch #3 - Removed extra indent - Tweaked commit message
| | * | x86: Rework relocation calculationsGraeme Russ2012-01-04-12/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit introduces no functional changes - It simply re-arranges the calculations so that adding to them in future commits will be cleaner -- Changes for v2: - Fixed typo in title - Added commit message
| | * | x86: Simplify Flash-to-RAM code execution transitionGraeme Russ2012-01-04-19/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the relocation offset calculation out of assembler and into C. This also paves the way for the upcoming init sequence simplification by adding the board_init_f_r flash to RAM transitional function -- Changes for v2: - Added commit message - Minor adjustment to new stack address comment
| | * | x86: Rework Global Descriptor Table loadingGraeme Russ2012-01-04-29/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The inline assembler is ugly and uses hard coded magic numbers. Make it more elegant to allow cleaner implementation of future GDT related patches. The compiler seems smart enough to generate the same code anyway -- Changes for v2: - Rebased against revised patch #3 - Use GDT size define instead of magic number - Added commit message
| | * | x86: Remove GDR related magic numbersGraeme Russ2012-01-04-9/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | -- Changes for v2: - Use an enum - Add defined for GDT size (previously added in patch 7) - Use X86_ namespace (as per Linux headers)
| | * | x86: Speed up copy-to-RAM and clear BSS operationsGraeme Russ2012-01-04-12/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The implementations of memcpy and memset are now the optimised versions from glibc, so use them instead of simple copy loops -- Changes for v2: - Removed unneeded brackets
| | * | x86: Import glibc memcpy implementationGraeme Russ2012-01-02-1/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Taken from glibc version 2.14.90 -- Changes for v2: - None
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