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* microblaze: Save and restore first unused vectorMichal Simek2011-10-03-2/+4
| | | | | | | | | | | | | Use one memory space to detect little/big endian platforms. The first unused address(0x28) is used instead 0x0 address (reset vectors). Detection rewrited reset vector setup from first stage bootloader. Workflow: 1. Store 0x28 to r7 2. Do little/big endian test 3. Restore r7 to 0x28 Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Setup MB vectors if feature is enable for u-bootMichal Simek2011-10-03-12/+22
| | | | | | | For example: Setup reset vectors if reset address is setup. Setup user exception vector if user exception is enabled Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Remove debug saving valueMichal Simek2011-10-03-2/+0
| | | | | | Forget to remove debug code. Signed-off-by: Michal Simek <monstr@monstr.eu>
* sbc82xx: delete support for obsolete SBC8240/SBC8260Paul Gortmaker2011-10-01-1/+1
| | | | | | | | | | The EST SBC8260 is over 10 years old, and the SBC8240 older than that. With the tiny amount of RAM (by today's standards), there really isn't anyone interested in running the latest U-boot on these EOL products anymore. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> CC: jon.diekema@smiths-aerospace.com
* console: Squelch pre-console output in console functionsGraeme Russ2011-10-01-32/+16
| | | | | | | | | | There are some locations in the code which anticipate printf() being called before the console is ready by squelching printf() on gd->have_console. Move this squelching into printf(), vprintf(), puts() and putc(). Also make tstc() and getc() return 0 if console is not yet initialised Signed-off-by: Graeme Russ <graeme.russ@gmail.com> Tested-by: Simon Glass <sjg@chromium.org>
* Merge branch 'post' of git://git.denx.de/u-boot-blackfinWolfgang Denk2011-10-01-251/+144
|\ | | | | | | | | | | | | | | | | | | * 'post' of git://git.denx.de/u-boot-blackfin: Blackfin: uart: implement loop callback for post Blackfin: bf537-stamp/bf548-ezkit: update POST flash block range Blackfin: post: generalize led/button tests with GPIOs Blackfin: bf537-stamp: drop uart/flash post tests Blackfin: post: drop custom test list Blackfin: bf537-stamp: convert to gpio post hotkey
| * Blackfin: uart: implement loop callback for postMike Frysinger2011-09-29-0/+40
| | | | | | | | | | | | This allows the Blackfin UART driver to be tested via post. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: post: generalize led/button tests with GPIOsMike Frysinger2011-09-29-0/+104
| | | | | | | | | | | | Make it easy for any Blackfin board to enable led/push button tests. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * Blackfin: post: drop custom test listMike Frysinger2011-09-29-251/+0
| | | | | | | | | | | | | | The few tests that are Blackfin-specific have been migrated to common code or been rewritten with the existing "bsp-specific" defines. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | zmx25: Fix build warning due to 'get_reset_cause' defined but not usedFabio Estevam2011-09-30-23/+23
| | | | | | | | | | | | | | | | | | | | | | | | When building the zmx25 target we get: Configuring for zmx25 board... generic.c:108: warning: 'get_reset_cause' defined but not used Fix this warning by defining get_reset_cause only if CONFIG_DISPLAY_CPUINFO is defined. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* | MX5: Clean up the output of "clocks" commandMarek Vasut2011-09-30-7/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new output looks like this: > clocks PLL1 800 MHz PLL2 665 MHz PLL3 216 MHz AHB 133000 kHz IPG 66500 kHz IPG PERCLK 665000 kHz Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Acked-by: Jason Liu <jason.hui@linaro.org>
* | MX5: Add AHB clock reporting and fix IPG clock reportingMarek Vasut2011-09-30-9/+27
| | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Liu <jason.hui@linaro.org> Acked-by: Jason Liu <jason.hui@linaro.org>
* | MX5: Modify the PLL decoding algorithmMarek Vasut2011-09-30-10/+70
| | | | | | | | | | | | | | | | | | | | The PLL decoding algorithm didn't take into account many configuration bits. Adjust it according to Linux kernel. Also, add PLL4 for MX53. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Jason Hui <jason.hui@linaro.org> Tested-by: Jason Liu <Jason.hui@linaro.org>
* | FEC: Move imx_get_mac_from_fuse() definition to fec_mxc.hMarek Vasut2011-09-30-6/+0
| | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Ben Warren <biggerbadderben@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | MX31: Disable watchdog during low-power modesFabio Estevam2011-09-30-2/+4
| | | | | | | | | | | | | | | | | | | | | | Turn on the watchdog WDZST bit so that watchdog timer does not count during low power modes. Prior to applying this patch mx31pdk board got watchdog resets because when it booted in the Linux prompt and there was no activity, the system entered into idle mode while watchdog timer was still active. Fix this by disabling watchdog timer during idle mode. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | MX25: tx25: Avoid the usage of extern in C fileFabio Estevam2011-09-30-0/+29
| | | | | | | | | | | | Avoid the usage of extern in C file as pointed out by checkpatch. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | MX31: Improve readability for reset causeFabio Estevam2011-09-30-1/+1
| | | | | | | | | | | | | | | | | | Currently the reset cause is printed like: CPU: Freescale i.MX31 rev 2.0 at 531 MHz.Reset cause: POR Improve readability by adding a new line like it is done on other i.MX boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | ARM: mx25: Print the source of resetFabio Estevam2011-09-30-1/+24
| | | | | | | | | | | | Print the source of reset during boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | ARM: mx25: Print the silicon revisonFabio Estevam2011-09-30-1/+32
| | | | | | | | | | | | Print the silicon revison during boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | arm, davinci, da8xx: add cpuinfoHeiko Schocher2011-09-30-2/+14
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci, am1808: add lowlevel functions for booting from NORHeiko Schocher2011-09-30-0/+473
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add NOR Boot Configuration WordHeiko Schocher2011-09-30-0/+9
| | | | | | | | | | | | | | | | | | | | to add the "NOR Boot Configuration Word" on AM18xx based boards, define CONFIG_SYS_DV_NOR_BOOT_CFG. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add ddr2 definitionHeiko Schocher2011-09-30-0/+96
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci, am1808, gpio: add missing defines for bank 8Heiko Schocher2011-09-30-0/+2
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add some missing defines in hardware.hHeiko Schocher2011-09-30-0/+11
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add SYSCFG1 base and register structHeiko Schocher2011-09-30-0/+16
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add RTC base addrHeiko Schocher2011-09-30-0/+1
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add internal WDT support for AM1808 cpusHeiko Schocher2011-09-30-0/+35
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: add missing timer baseaddresses for !DA8xx cpuHeiko Schocher2011-09-30-0/+2
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | arm, davinci: move davinci_timer in header fileHeiko Schocher2011-09-30-14/+41
| | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | net, davinci_emac: add KSZ8864 switchHeiko Schocher2011-09-30-1/+75
| | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: Fix compile warningSanjeev Premi2011-09-30-1/+1
| | | | | | | | | | | | | | | | | | | | Building without option CONFIG_DISPLAY_CPUINFO leads to this warning: sys_info.c:50:14: warning: 'rev_s_37xx' defined but not used Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | mmc: omap: config VMMC, MMC1_PBIASBalaji T K2011-09-30-1/+7
| | | | | | | | | | | | | | | | | | | | Config VMMC voltage to 3V for MMC/SD card slot and PBIAS settings needed for OMAP4 Fixes MMC/SD detection on boot from eMMC. Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | devkit8000: Fix build breakSandeep Paulraj2011-09-30-1/+1
| | | | | | | | | | | | | | Found a build erros when i ran MAKEALL. So fix it. Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap-common: reorganize spl.cSimon Schwarz2011-09-30-177/+247
| | | | | | | | | | | | | | | | | | | | split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems with missing defines if a board does not use mmc or nand. This includes adding spl_ prefix to some functions which are now public. spl_image_t is now a public type. Added some of the common functions to omap-common.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: implement boot parameter savingSimon Schwarz2011-09-30-3/+12
| | | | | | | | | | | | | | Implements the saving of boot params passed by OMAP3 ROM code. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: new SPL structure supportSimon Schwarz2011-09-30-0/+36
| | | | | | | | | | | | | | | | Support for the new spl structure. Using the interface defined by Aneesh V for OMAP4 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap-common: add nand spl supportSimon Schwarz2011-09-30-3/+124
| | | | | | | | | | | | | | Add NAND support for the new SPL structure. Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap3: Configure RAM bank 0 if in SPLSimon Schwarz2011-09-30-1/+67
| | | | | | | | | | | | | | | | | | | | OMAP3 relied on the memory config done by X-loader or Configuration Header. This has to be reworked for the implementation of a SPL. This patch configures RAM bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000 are added to mem.h Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | omap-common/omap4: relocate early UART clock setupSimon Schwarz2011-09-30-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Moves the early UART clock setup setup_clocks_for_console() from preloader_console_init() to s_init() of OMAP4. This is done to prepare for OMAP3 integration. This patch was posted seperatly to the mailinglist but I decidet - since it is a prereqesit for this patch to add it. Former port to ML: http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395 Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Signed-off-by: Tom Rini <trini@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | OMAP3: Overo: Update GPMC timing for ethernet chipPhilip Balister2011-09-30-0/+9
| | | | | | | | | | | | | | | | | | | | The existing timing does not quite meet the minimum requirements in the LAN9221 datasheet. The timing in this patch solves problems noticed on some parts. The patch also combines the CS configuration for the overo and igep0020 boards per request. Signed-off-by: Philip Balister <philip@opensdr.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* | Armada100: Enable Ethernet support for GplugDAjay Bhargav2011-09-30-0/+76
| | | | | | | | | | | | | | This patch enables ethernet support for Marvell GplugD board. Network related commands works. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* | net: Adds Fast Ethernet Controller driver for Armada100Ajay Bhargav2011-09-30-0/+1
| | | | | | | | | | | | | | | | This patch adds support for Fast Ethernet Controller driver for Armada100 series. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
* | gpio: Add GPIO driver for Marvell SoC Armada100Ajay Bhargav2011-09-30-0/+48
|/ | | | | | | This patch adds support for generic GPIO driver framework for Marvell SoC Armada100. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* ppc4xx: Flush dcache after DDR2 autocalibration with caches onStefan Roese2011-09-19-0/+7
| | | | | | | | Flush the dcache before removing the TLB with caches enabled. Otherwise this might lead to problems later on, e.g. while booting Linux (as seen on ICON-440SPe). Signed-off-by: Stefan Roese <sr@denx.de>
* Fix incorrect array size of phy settings for 405EXWeirich, Bernhard2011-09-19-1/+1
| | | | | | | | Change bd_t->bi_phy* arrays from 1 to 2 for PPC405EX since 405EX has 2 ethernet interfaces. Signed-off-by: Bernhard Weirich <bernhard.weirich@riedel.net> Signed-off-by: Stefan Roese <sr@denx.de>
* led: remove camel casing of led identifiers globallyJason Kridner2011-09-13-47/+47
| | | | | | | | | | | | | | | Result of running the following command to address Wolfgang's comment about camel case: for file in `find . | grep '\.[chS]$'`; do perl -i -pe 's/(green|yellow|red|blue)_LED_(on|off)/$1_led_$2/g' $file; done Discussion: http://patchwork.ozlabs.org/patch/84988/ Signed-off-by: Jason Kridner <jkridner@beagleboard.org> Signed-off-by: Joel A Fernandes <agnel.joel@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: IO settingsAneesh V2011-09-13-45/+105
| | | | | | | | Tuning some IO settings for better performance and power. And consolidate all such IO settings at one place. Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap4: make SDRAM init work for ES1.0 siliconAneesh V2011-09-13-54/+22
| | | | | | | | | | | | SDRAM init was not working on ES1.0 due to a programming error. A pointer that was passed by value to a function was set in function emif_get_device_details(), but the effect wouldn't be seen in the calling function. The issue came out while testing for ES1.0 because ES1.0 doesn't have any SDRAM chips connected to CS1 Signed-off-by: Aneesh V <aneesh@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* omap: gpio: generic changes after changing APISanjeev Premi2011-09-13-2/+3
| | | | | | | | This patch contains the generic changes required after change to generic API in the previous patch. Signed-off-by: Sanjeev Premi <premi@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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