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* | dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-18-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add support for using the 'lo' interfaceJoe Hershberger2015-04-18-3/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'lo' interface on Linux doesn't support thinks like ARP or link-layer access like we use to talk to a normal network interface. A higher-level network API must be used to access localhost. As written, this interface is limited to not supporting ICMP since the API doesn't allow the socket to be opened for all IP traffic and be able to receive at the same time. UDP is far more useful to test with, so it was selected over ICMP. Ping won't work, but things like TFTP should work. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add a bridge to a real network for sandboxJoe Hershberger2015-04-18-0/+191
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Implement a bridge between U-Boot's network stack and Linux's raw packet API allowing the sandbox to send and receive packets using the host machine's network interface. This raw Ethernet API requires elevated privileges. You can either run as root, or you can add the capability needed like so: sudo /sbin/setcap "CAP_NET_RAW+ep" /path/to/u-boot Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add ability to disable ping reply in sandbox eth driverJoe Hershberger2015-04-18-0/+15
| | | | | | | | | | | | | | | | This is needed to test the netretry functionality (make the command fail on a sandbox eth device). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add ARP and PING response to sandbox driverJoe Hershberger2015-04-18-0/+1
| | | | | | | | | | | | | | | | | | The sandbox driver will now generate response traffic to exercise the ping command even when no network exists. This allows the basic data pathways of the DM to be tested. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add network support to sandboxJoe Hershberger2015-04-18-0/+13
| | | | | | | | | | | | | | Add basic network support to sandbox which includes a network driver. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | net: Remove the bd* parameter from net stack functionsJoe Hershberger2015-04-18-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | This value is not used by the network stack and is available in the global data, so stop passing it around. For the one legacy function that still expects it (init op on old Ethernet drivers) pass in the global pointer version directly to avoid changing that interface. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reported-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Simon Glass <sjg@chromium.org> (Trival fix to remove an unneeded variable declaration in 4xx_enet.c)
* | net: Provide a function to get the current MAC addressJoe Hershberger2015-04-18-4/+4
| | | | | | | | | | | | | | | | | | The current implementation exposes the eth_device struct to code that needs to access the MAC address. Add a wrapper function for this to abstract away the pointer for this operation. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | common: Make sure arch-specific map_sysmem() is definedJoe Hershberger2015-04-18-0/+1
| | | | | | | | | | | | | | | | | | | | | | In the case where the arch defines a custom map_sysmem(), make sure that including just mapmem.h is sufficient to have these functions as they are when the arch does not override it. Also split the non-arch specific functions out of common.h Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | dm: x86: pci: Convert chromebook_link to use driver model for pciSimon Glass2015-04-18-67/+59
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move chromebook_link over to driver model for PCI. This involves: - adding a uclass for platform controller hub - removing most of the existing PCI driver - adjusting how CPU init works to use driver model instead - rename the lpc compatible string (it will be removed later) This does not really take advantage of driver model fully, but it does work. Furture work will improve the code structure to remove many of the explicit calls to init the board. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: x86: pci: Convert coreboot to use driver model for pciSimon Glass2015-04-18-47/+23
| | | | | | | | | | | | Move coreboot-x86 over to driver model for PCI. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: x86: pci: Add a PCI driver for driver modelSimon Glass2015-04-18-0/+50
| | | | | | | | | | | | | | Add a simple x86 PCI driver which uses standard functions provided by the architecture. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: sandbox: pci: Add PCI support for sandboxSimon Glass2015-04-16-7/+284
| | | | | | | | | | | | | | | | Add the required header information, device tree nodes and I/O accessor functions to support PCI on sandbox. All devices are emulated by drivers which can be added as required for testing or development. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: Split up arch_cpu_init()Simon Glass2015-04-16-0/+8
| | | | | | | | | | | | | | | | At present we do more in this function than we should. Split out the post-driver-model part into a separate function. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: Add a x86_ prefix to the x86-specific PCI functionsSimon Glass2015-04-16-187/+191
| | | | | | | | | | | | | | | | | | | | | | | | These functions currently use a generic name, but they are for x86 only. This may introduce confusion and prevents U-Boot from using these names more widely. In fact it should be possible to remove these at some point and use generic functions, but for now, rename them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | sandbox: Update device tree 'reg' properties for I2C and SPISimon Glass2015-04-16-3/+3
| | | | | | | | | | | | | | | | We should have a size value for these. Add one in each case. This will be needed for PCI. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | x86: Add support for panther (Asus Chromebox)Simon Glass2015-04-16-0/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Support running U-Boot as a coreboot payload. Tested peripherals include: - Video (HDMI and DisplayPort) - SATA disk - Gigabit Ethernet - SPI flash USB3 does not work. This may be a problem with the USB3 PCI driver or something in the USB3 stack and has not been investigated So far this is disabled. The SD card slot also does not work. For video, coreboot will need to run the OPROM to set this up. With this board, bare support (running without coreboot) is not available as yet. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: Support machines with >4GB of RAMSimon Glass2015-04-16-2/+4
|/ | | | | | | | | | | | | Some systems have more than 4GB of RAM. U-Boot can only place things below 4GB so any memory above that should not be used. Ignore any such memory so that the memory size will not exceed the maximum. This prevents gd->ram_size exceeding 4GB which causes problems for PCI devices which use DMA. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* ti: dwc3: Enable clocks in enable_basic_clocks() in hw_data.cKishon Vijay Abraham I2015-04-16-2/+2
| | | | | | | | | | | | | | | | Commit d3cfcb3 (ARM: DRA7: Enable clocks for USB OTGSS and USB PHY) changed the member names of prcm_regs from cm_l3init_usb_otg_ss_clkctrl to cm_l3init_usb_otg_ss1_clkctrl and from cm_coreaon_usb_phy_core_clkctrl to cm_coreaon_usb_phy1_core_clkctrl in order to differentiate between the two dwc3 controllers present in dra7xx/am43xx and enabled these clocks in enable_basic_clocks() in hw_data.c. However these clocks continued to be enabled in board files/driver files for dwc3 host mode functionality causing compilation break with few configs. Fixed it here by making all the clocks enabled in enable_basic_clocks() and removing it from board files/driver files here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
* Merge branch 'master' of http://git.denx.de/u-boot-sunxiTom Rini2015-04-16-91/+154
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| * sunxi: Complete i2c support for each supported platformPaul Kocialkowski2015-04-15-1/+36
| | | | | | | | | | | | | | | | | | | | | | Sunxi platforms come with at least 3 TWI (I2C) controllers and some platforms even have up to 5. This adds support for every controller on each supported platform, which is especially useful when using expansion ports on single-board- computers. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * i2c: mvtwsi: Support for up to 4 different controllersPaul Kocialkowski2015-04-15-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Orion5x, Kirkwood and Armada XP platforms come with a single TWSI (I2C) MVTWSI controller. However, other platforms using MVTWSI may come with more: this is the case on Allwinner (sunxi) platforms, where up to 4 controllers can be found on the same chip. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: usbc: Wait for vbus to fall after disabling itHans de Goede2015-04-15-2/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When u-boot boots the board may be powering vbus, we turn off vbus in sunxi_usbc_request_resources, if we are too quick with reading vusb-detect after this we may see a residual charge and assume we've an external vusb connected even though we do not. So when we see an external vusb wait a bit and try again. Without this when dealing with a pmic controller vbus and doing "reset" on the u-boot console the musb host will only init once every other boot, because the other boot it thinks an external vbus is present, this commit fixes this. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: usbc: Initialize vusb value on request_resourcesHans de Goede2015-04-15-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | On boards which use the pmic to enable/disable vbus on the otg port, the vbus value is not reset to 0 on reset, as reset only resets the SoC and not the pmic, so explicitly set vbus to 0 on init (request_resources) by moving the gpio_direction_output call into request_resources. For consistency also move the gpio_direction_input call for vbus-detect into request_resources. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
| * sunxi: Complete mmc pin mux for each supported platform, configured with KconfigPaul Kocialkowski2015-04-15-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Sunxi platforms have different possible mmc pin mux setups (except for mmc0), which are different across platforms. This lets users configure which is used through the CONFIG_MMC*_PINS Kconfig options. This is especially relevant when a second (in addition to mmc0) port is used and CONFIG_MMC_SUNXI_SLOT_EXTRA is enabled. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: GPIO pin mux hardware-feature-specific function index definesPaul Kocialkowski2015-04-15-57/+40
| | | | | | | | | | | | | | | | | | | | | | Each hardware feature exposed through the GPIO pin mux is usually using the same function index (for a given port), so there is no need to define one value per pin: one value per hardware feature per port is sufficient, avoids duplication and makes everything easier to understand. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: common VBUS detection logic in usbcPaul Kocialkowski2015-04-15-4/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | VBUS detection could be needed not only by the musb code (to prevent host mode), but also by e.g. gadget drivers to start only when a cable is connected. In addition, this allows more flexibility in vbus detection, as it could easily be extended to other USBC indexes. Eventually, this would help making musb support independent from a hardcoded USB controller index (0). Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: usb: Drop AXP-sepcific VBUS detection and drive logicPaul Kocialkowski2015-04-15-17/+0
| | | | | | | | | | | | | | | | | | VBUS detection and enable is now be used with virtual AXP GPIOs, so all the USB code has to use GPIO in every case and let sunxi_gpio do the heavy lifting. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * power: axp221: Virtual VBUS detect and enable GPIOs to replace separate logicPaul Kocialkowski2015-04-15-0/+4
| | | | | | | | | | | | | | | | | | This converts the VBUS detection and enable logic to GPIO instead of separate axp functions and checks that have to be used aside usual GPIO functions. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
| * sunxi: gpio: Indentation fixPaul Kocialkowski2015-04-15-2/+2
| | | | | | | | | | | | Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Hans de Goede <hdegoede@redhat.com> Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | board: ti: AM43xx: added USB initializtion codeKishon Vijay Abraham I2015-04-14-0/+9
| | | | | | | | | | | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in am43xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | board: ti: DRA7: added USB initializtion codeKishon Vijay Abraham I2015-04-14-0/+12
| | | | | | | | | | | | | | | | | | Implemented board_usb_init(), board_usb_cleanup() and usb_gadget_handle_interrupts() in dra7xx board file that can be invoked by various gadget drivers. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | include: asm: types: add resource_size_t typeKishon Vijay Abraham I2015-04-14-0/+1
| | | | | | | | | | | | | | | | | | Added resource_size_t type in order to get rid of the following compilation error whiel building dwc3 gadget. include/linux/ioport.h:19:2: error: unknown type name ‘resource_size_t’ Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | arm: asm: dma-mapping: added dma_free_coherent APIKishon Vijay Abraham I2015-04-14-0/+7
| | | | | | | | | | | | | | | | | | Added dma_free_coherent corresponding to the dma_alloc_coherent in dma-mapping.h in order to free memory allocated using dma_alloc_coherent. This API is used in dwc3 driver. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | include: asm: dma-mapping: get rid of the compilation warning in udc-coreKishon Vijay Abraham I2015-04-14-1/+1
| | | | | | | | | | | | | | | | | | Fixed the following warning here. "warning: ‘dma_alloc_coherent’ defined but not used" while compiling udc-core Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | ARM: AM43xx: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I2015-04-14-5/+30
| | | | | | | | | | | | | | Enabled clocks for dwc3 controller and USB PHY present in AM43xx. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | ARM: DRA7: Enable clocks for USB OTGSS and USB PHYKishon Vijay Abraham I2015-04-14-7/+21
| | | | | | | | | | | | | | Enabled clocks for dwc3 controller and USB PHY present in DRA7. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Reviewed-by: Lukasz Majewski <l.majewski@samsung.com>
* | ARM: bcm2835: use phys_to_bus() for mboxStephen Warren2015-04-14-2/+3
| | | | | | | | | | | | | | | | When we communicate with the VideoCore to perform property mailbox transactions, that is a DMA operation as far as the property buffer is concerned. Use phys_to_bus() on that buffer. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ARM: bcm2835: implement phys_to_bus/bus_to_physStephen Warren2015-04-14-1/+26
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BCM283[56] contain both a L1 and L2 cache between the GPU (a/k/a VideoCore CPU?) and DRAM. DMA-capable peripherals can also optionally access DRAM via this same L2 cache (although they always bypass the L1 cache). Peripherals select whether to use or bypass the cache via the top two bits of the bus address. An IOMMU exists between the ARM CPU and the rest of the system. This controls whether the ARM CPU's accesses use or bypass the L1 and/or L2 cache. This IOMMU is configured/controlled exclusively by the VideoCore CPU. In order for DRAM accesses made by the ARM core to be coherent with accesses made by other DMA peripherals, we must program a bus address into those peripherals that causes the peripheral's accesses to use the same set of caches that the ARM core's accesses will use. On the RPi1, the VideoCore firmware sets up the IOMMU to enable use of the L2 cache. This corresponds to addresses based at 0x40000000. On the RPi2, the VideoCore firmware sets up the IOMMU to disable use of the L2 cache. This corresponds to addresses based at 0xc0000000. This patch implements U-Boot's phys_to_bus/bus_to_phys APIs according to those rules. For full details of this setup, please see Dom Cobley's description at: http://lists.denx.de/pipermail/u-boot/2015-March/208201.html http://permalink.gmane.org/gmane.comp.boot-loaders.u-boot/215038 https://www.mail-archive.com/u-boot@lists.denx.de/msg166568.html Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* break build if it would produce broken binaryPavel Machek2015-04-13-0/+4
| | | | | | | Add an error in known-bad case so that we don't produce broken and hard to debug binaries. Signed-off-by: Pavel Machek <pavel@denx.de>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2015-04-13-0/+33
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| * ARM: mx5: add support for USB armory boardAndrej Rosano2015-04-09-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add support for Inverse Path USB armory board, an open source flash-drive sized computer based on Freescale i.MX53 SoC. http://inversepath.com/usbarmory Signed-off-by: Andrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Chris Kuethe <chris.kuethe@gmail.com> Cc: Fabio Estevam <festevam@gmail.com> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-By: Vagrant Cascadian <vagrant@debian.org> Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
| * ARM: mx5: move to a standard arch/board approachAndrej Rosano2015-04-09-0/+22
| | | | | | | | | | | | | | | | | | | | Move the MX5 based boards to arch/arm/cpu/armv7/mx5, following the commit: 89ebc82137bebb11a8191f8b9cbf08f2533ae8bc Signed-off-by: Andrej Rosano <andrej@inversepath.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Vagrant Cascadian <vagrant@debian.org> Tested-by: Chris Kuethe <chris.kuethe@gmail.com>
* | ARM: rpi: add a couple more revision IDsStephen Warren2015-04-13-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | According to Gordon Henderson's WiringPi library, there are some more Pi revision IDs out there. Add support for them. http://git.drogon.net/?p=wiringPi;a=blob_plain;f=wiringPi/wiringPi.c;hb=5edd177112c99416f68ba3e8c6c4db6ed942e796 At least ID 0x13 is out in the wild: Reported-by: Chee-Yang Chau <cychau@gmail.com> Signed-off-by: Stephen Warren <swarren@wwwdotorg.org>
* | ARM: fix arch/arm/Makefile for TegraMasahiro Yamada2015-04-11-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since commit 79d75d752717 (ARM: move -march=* and -mtune= options to arch/arm/Makefile), all the Tegra boards are broken because the SPL is built for ARMv7. Insert Tegra-specific code to arch/arm/Makefile to set compiler flags for an earlier ARM architecture. Note: The v1 patch for commit 79d75d752717 *was* correct when it was submitted. Notice it was originally written for multi .config configuration where Kconfig set CONFIG_CPU_V7/CONFIG_CPU_ARM720T for Tegra U-Boot Main/SPL, respectively. But, until it was merged into the mainline, commit e02ee2548afe (kconfig: switch to single .config configuration) had been already applied there. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reported-by: Stephen Warren <swarren@nvidia.com> Reported-by: Jan Kiszka <jan.kiszka@siemens.com> Tested-by: Jan Kiszka <jan.kiszka@siemens.com>
* | arm: armada-xp: Fix SPL for AXP by using save_boot_params_retStefan Roese2015-04-11-1/+1
| | | | | | | | | | | | | | | | | | | | | | Patch e11c6c27 (arm: Allow lr to be saved by board code) introduced a different method to return from save_boot_params(). The SPL support for AXP has been pulled and changing to this new method is now required for SPL to work correctly. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Luka Perkov <luka.perkov@sartura.hr>
* | Merge git://git.denx.de/u-boot-arcTom Rini2015-04-10-1/+3
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| * | arc: fix separate compilation of start.oAlexey Brodkin2015-04-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While testing "arc: make sure _start is in the beginning of .text section" I haven't done proper clean-up of built binaries and so missed another tiny bit that lead to the following error: --->8--- LD u-boot arc-linux-ld.bfd: cannot find arch/arc/lib/start.o Makefile:1107: recipe for target 'u-boot' failed make: *** [u-boot] Error 1 --->8--- Fix is trivial: put "start.o" in "extra-y". Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | arc: make sure _start is in the beginning of .text sectionAlexey Brodkin2015-04-10-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is important to have entry point in the beginning of .text section because it allows simple loading and execution of U-Boot. For example pre-bootloader loads U-Boot in memory starting from offset 0x81000000 and then just jumps to the same address. Otherwise pre-bootloader would need to find-out where entry-point is. In its turn if it deals with binary image of U-Boot there's no way for pre-bootloader to get required value. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-fdtTom Rini2015-04-10-2/+0
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