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* socfpga: implement arria V socdk SPI flash config in dtsPavel Machek2015-04-27-0/+24
| | | | | | | Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek <pavel@denx.de>
* socfpga: implement socdk SPI flash config in dtsPavel Machek2015-04-24-0/+24
| | | | | | | SocDK has same QSPI and SPI flash configuration as Socrates. Add support for it. Signed-off-by: Pavel Machek <pavel@denx.de>
* arm: socfpga: spl: Add stub sdram.hMarek Vasut2015-04-21-0/+19
| | | | | | | | | | | | | | Since the SoCFPGA SDRAM support is not yet applied to u-boot, we still need to be able to compile the codebase. Introduce stub functions which temporarily supplement the missing SDRAM setup functions. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@opensource.altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Pavel Machek <pavel@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Tom Rini <trini@konsulko.com> Cc: Vince Bridgers <vbridger@opensource.altera.com>
* arm: socfpga: spl: add board_init_f to SPLDinh Nguyen2015-04-21-0/+29
| | | | | | | Remap SDRAM to 0x0, and clear OCRAM's ECC in board_init_f(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add SDRAM checkDinh Nguyen2015-04-21-0/+6
| | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: spl: Use common lowlevel_initDinh Nguyen2015-04-21-47/+1
| | | | | | | For SoCFGPA, use the common ARMv7 lowlevel_init. Thus, we can delete the SoCFPGA lowlevel_init.S file. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: spl: printout sdram sizeDinh Nguyen2015-04-21-0/+4
| | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Reviewed-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: add sdram init and calibrationDinh Nguyen2015-04-21-0/+13
| | | | | | Add a call to checkboard along with sdram intilialization and calibration. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: spl: allow bootrom to enable IOs after warm resetDinh Nguyen2015-04-21-0/+13
| | | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
* arm: socfpga: spl: Add call to timer_initDinh Nguyen2015-04-21-0/+2
| | | | Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
* arm: socfpga: spl: enable sdram, timer and uartDinh Nguyen2015-04-21-0/+4
| | | | | | | Add the calls in the spl_board_init to enable SDRAM, timer, and UART. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
* arm: socfpga: add functions to bring sdram, timer, and uart out of resetDinh Nguyen2015-04-21-0/+30
| | | | | | | | | These functions will be needed for use by the SPL for enabling the console and sdram initialization. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Pavel Machek <pavel@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2015-04-20-0/+1
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| * video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher2015-04-20-0/+1
| | | | | | | | | | | | | | | | | | | | the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | sandbox: Add support for bootzSjoerd Simons2015-04-19-0/+42
| | | | | | | | | | | | | | | | | | Add dummy bootz_setup implementation allowing the u-boot sandbox to run bootz. This recognizes both ARM and x86 zImages to validate a valid zImage was loaded. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | sandbox: Split bootm code out into lib/bootmSjoerd Simons2015-04-19-12/+22
| | | | | | | | | | | | | | | | Follow the convention of other architectures and move the platform specific linux bootm code into sandbox/lib/bootm.c. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | ahci: mmio_base is a virtual addressScott Wood2015-04-18-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't store it in a u32. Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")). Fixes crash on boot in MPC8641HPCN_36BIT target. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Vadim Bendebury <vbendeb@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
* | sandbox: Move CONFIG_SYS_VSNPRINTF to KconfigSimon Glass2015-04-18-0/+3
| | | | | | | | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Kconfig: Move CONFIG_BOOTSTAGE to KconfigSimon Glass2015-04-18-1/+10
| | | | | | | | | | | | | | Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust existing users and code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Kconfig: Move CONFIG_DESIGNWARE_ETH to KconfigSimon Glass2015-04-18-2/+2
| | | | | | | | | | | | | | | | | | | | Move this to Kconfig and clean up board config files that use it. Also rename it to CONFIG_ETH_DESIGNWARE to fit with the naming that exists in drivers/net/Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Version 1: Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-18-16/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the naming convention used in the network stack functions and variables that Ethernet drivers use to interact with it. This cleans up the temporary hacks that were added to this interface along with the DM support. This patch has a few remaining checkpatch.pl failures that would be out of the scope of this patch to fix (drivers that are in gross violation of checkpatch.pl). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: cosmetic: Cleanup internal packet buffer namesJoe Hershberger2015-04-18-2/+2
| | | | | | | | | | | | | | This patch cleans up the names of internal packet buffer names that are used within the network stack and the functions that use them. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-18-12/+10
| | | | | | | | | | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* | powerpc: ids8313: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: cm_fx6: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: stv0991: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+2
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: bav335x: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+2
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: socfpga: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+6
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: mx6: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+6
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: snapper9260: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: rmobile: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+12
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: zynq: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+1
| | | | | | | | | | | | | | | | All the Zynq boards have switch to Driver Model. "select DM" is better than default value in each defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: UniPhier: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | | | | | | | All the UniPhier boards have switch to Driver Model. "select DM" is better than default value in each defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: select CONFIG_DM* optionsMasahiro Yamada2015-04-18-81/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As mentioned in the previous commit, adding default values in each Kconfig causes problems because it does not co-exist with the "depends on" syntax. (Please note this is not a bug of Kconfig.) We should not do so unless we have a special reason. Actually, for CONFIG_DM*, we have no good reason to do so. Generally, CONFIG_DM is not a user-configurable option. Once we convert a driver into Driver Model, the board only works with Driver Model, i.e. CONFIG_DM must be always enabled for that board. So, using "select DM" is more suitable rather than allowing users to modify it. Another good thing is, Kconfig warns unmet dependencies for "select" syntax, so we easily notice bugs. Actually, CONFIG_DM and other related options have been added without consistency: some into arch/*/Kconfig, some into board/*/Kconfig, and some into configs/*_defconfig. This commit prefers "select" and cleans up the following issues. [1] Never use "CONFIG_DM=n" in defconfig files It is really rare to add "CONFIG_FOO=n" to disable CONFIG options. It is more common to use "# CONFIG_FOO is not set". But here, we do not even have to do it. Less than half of OMAP3 boards have been converted to Driver Model. Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is weird. Instead, add "select DM" only to appropriate boards, which eventually eliminates "CONFIG_DM=n", etc. [2] Delete redundant CONFIGs Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again in configs/sandbox_defconfig. Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and defines it also in omap3_beagle_defconfig and devkit8000_defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | dm: usb: exynos: Enable both EHCI and XHCI on snowSimon Glass2015-04-18-0/+1
| | | | | | | | | | | | | | Since we can support both controllers now, enable this in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: exynos: Use driver model for USBSimon Glass2015-04-18-0/+3
| | | | | | | | | | | | | | | | Convert Exynos boards over to use driver model for USB. This does not remove any unnecessary code so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: dts: sandbox: Add some sample USB devices to sandboxSimon Glass2015-04-18-0/+40
| | | | | | | | | | | | | | These allow basic testing of the USB functionality within sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: tegra: Add vbus GPIOs for nyanSimon Glass2015-04-18-0/+2
| | | | | | | | | | | | | | | | These are needed to enable the USB bus (although not sufficient since it still does not work). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: ls1021a: dts: Add QSPI dts nodeHaikun.Wang@freescale.com2015-04-18-0/+39
| | | | | | | | | | | | | | | | Add QSPI controller dts node in ls1021a.dtsi. Add QSPI slave device dts node in ls1021a-twr.dts and ls1021a-qds.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: dts: Update DSPI node to support DM SPIHaikun.Wang@freescale.com2015-04-18-18/+4
| | | | | | | | | | | | | | | | | | | | Update DSPI controller node in ls1021a.dtsi. Update flash device node in ls1021a-qds.dts. Ls1021a-twr board doesn't support DSPI, so remove DSPI node in ls1021a-twr.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: dts: Change address_cells and size_cells from 2 to 1haikun2015-04-18-40/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change address_cells and size_cells of root node and 'soc' node from 2 to 1. We backport ls1021a device tree source files from kernel to u-boot. Kernel files set address_cells and size_cells to 2 in order to access more than 4GB space. But we don't have this requirement now and u-boot fdtdec_get_xxx interfaces can't support property whose size is 'u64' completely. So make this change. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: Bring in ls1021a dts files from linux kernelhaikun2015-04-18-0/+662
| | | | | | | | | | | | | | | | Bring in required device tree files for ls1021a from Linux. These are initially unchanged and have a number of pieces not needed by U-Boot. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: arm: Bring in skeleton64 device tree file from LinuxHaikun.Wang@freescale.com2015-04-18-0/+13
| | | | | | | | | | | | | | | | | | Backport of kernel commits: 7c14f6c719de092d69c81877786e83ce7ae1a860 35faad2a1563b3d4dc983a82ac41033fe053870c Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | cros_ec: exynos: Match up device tree with kernel versionSimon Glass2015-04-18-99/+139
| | | | | | | | | | | | | | | | | | | | | | The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Drop unused CONFIG_DM_CROS_ECSimon Glass2015-04-18-3/+0
| | | | | | | | | | | | | | Since all supported boards enable this option now, we can remove it along with the old code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass2015-04-18-33/+52
| | | | | | | | | | | | | | | | | | | | | | | | The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: x86: Add a uclass for an Low Pin Count (LPC) deviceSimon Glass2015-04-18-0/+29
| | | | | | | | | | | | | | | | | | On x86 systems this device is commonly used to provide legacy port access. It is sort-of a replacement for the old ISA bus. Add a uclass for this, and allow it to have child devices. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: x86: Add a uclass for a Platform Controller HubSimon Glass2015-04-18-9/+29
| | | | | | | | | | | | | | | | | | Add a simple uclass for this chip which is often found in x86 systems where the CPU is a separate device. The device can have children, so make it scan the device tree for these. Signed-off-by: Simon Glass <sjg@chromium.org>
* | dm: x86: spi: Convert ICH SPI driver to driver modelSimon Glass2015-04-18-20/+25
| | | | | | | | | | | | | | | | | | | | | | | | Convert this driver over to use driver model. Since all x86 platforms use it, move x86 to use driver model for SPI and SPI flash. Adjust all dependent code and remove the old x86 spi_init() function. Note that this does not make full use of the new PCI uclass as yet. We still scan the bus looking for the device. It should move to finding its details in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org>
* | sandbox: eth: Add support for using the 'lo' interfaceJoe Hershberger2015-04-18-3/+127
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 'lo' interface on Linux doesn't support thinks like ARP or link-layer access like we use to talk to a normal network interface. A higher-level network API must be used to access localhost. As written, this interface is limited to not supporting ICMP since the API doesn't allow the socket to be opened for all IP traffic and be able to receive at the same time. UDP is far more useful to test with, so it was selected over ICMP. Ping won't work, but things like TFTP should work. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Reviewed-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-10 04:32:16 +0000