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* Armada100: Add SPI support for Marvell gplugDAjay Bhargav2011-10-27-0/+25
| | | | | | This patch add SPI driver support for Marvell gplugD Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* SPI: Add SPI driver support for Marvell Armada100Ajay Bhargav2011-10-27-0/+95
| | | | | | | This patch provides support for SPI emulated over SSP for Marvell Armada100 SOC. Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
* dreamplug: initial board support.Jason Cooper2011-10-27-0/+0
| | | | | | | | | | | Copied wholeheartedly from board/Marvell/guruplug and modified to add support for SPI NOR flash. CONFIG_MACH_DREAMPLUG defined in include/configs/dreamplug.h until Linus's kernel.org tree adds it to mach-types.h. Once it trickles down, the definition can be removed from include/configs/dreamplug.h. Signed-off-by: Jason Cooper <u-boot@lakedaemon.net>
* imx: fix coding styleFabio Estevam2011-10-27-90/+97
| | | | | | | | | Fix checkpatch warning and errors in several i.MX related files. While at it also address a checkpatch warning at arch/arm/cpu/armv7/mx5/soc.c regarding the usage of extern in a C file. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* mx31: provide readable WEIM CS accessorHelmut Raiger2011-10-27-3/+78
| | | | | | | | | | | | setup_weimcs() and some macros are added to support the setup for i.MX31 WEIM chip selects. As a compromise between verbosity and readability an ASCII-art'ish bit comment is used instead of bitfields. All i.MX31 boards have been patched to use this approach using a helper program to verify the changes. Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: Update mach-typesMarek Vasut2011-10-27-30689/+1985
| | | | | | | | | This commit updates the mach-types based on the latest in Linus's head Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* arm, logbuffer: make it compilecleanHeiko Schocher2011-10-27-1/+0
| | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra2: Add more pinmux functionsSimon Glass2011-10-27-18/+696
| | | | | | | | | | | | | This adds support for changing pinmux functions of pin groups. This is done by defining a PMUX_FUNC_... enum which can be used to select the function for each group using pinmux_set_func(). It is also possible to enable pullup/pulldown, and the existing tristate functionality is retained. Also provided is a means of configuring a list of pingroups by providing a configuration table to pinmux_config_table(). Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename PIN_ to PINGRP_Simon Glass2011-10-27-139/+139
| | | | | | | | | | | The pin groupings are better named PINGRP, since on Tegra2 they refer to multiple pins. Sorry about this, but better to get it right now when there is only a small amount of code affected. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Add more clock functionsSimon Glass2011-10-27-73/+943
| | | | | | | | | | | | | This adds most of the clock functions required by board and driver code: -query and adjust peripheral clocks -query and adjust PLLs -reset and enable control These functions are plumbed in as required. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* tegra2: Rename CLOCK_PLL_ID to CLOCK_IDSimon Glass2011-10-27-26/+25
| | | | | | | | | | | Rename CLOCK_PLL_ID to CLOCK_ID which takes account of the fact that the code now deals with both PLL clocks and source clocks. This also tidied up the assert() to match the one sent upstream, and fixes an error in the PWM id. Signed-off-by: Simon Glass <sjg@chromium.org> Tested-by: Tom Warren <twarren@nvidia.com>
* fdt: ARM: Add fdtcontroladdr to set device tree address in environmentSimon Glass2011-10-26-0/+3
| | | | | | | | | | This adds support for a new environment variable called 'fdtcontroladdr'. If defined, the hex address is used as the address of the control fdt for U-Boot. Note: I have not changed CONFIG_PRAM section as I already have an outstanding patch on that. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: ARM: Implement and verify embedded and separate device treeSimon Glass2011-10-26-0/+12
| | | | | | | | | | This locates the device tree either embedded within U-Boot or attached to the end as a separate binary. When CONFIG_OF_CONTROL is defined, U-Boot requires a valid fdt. A check is provided for this early in initialisation. Signed-off-by: Simon Glass <sjg@chromium.org>
* fdt: ARM: Add device tree control of U-Boot (CONFIG_OF_CONTROL)Simon Glass2011-10-26-0/+1
| | | | | | | | This adds a device tree pointer to the global data. It can be set by board code. A later commit will add support for making a device tree binary blob available to U-Boot for run-time configuration. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Correct build error introduced by getenv_ulong() patchSimon Glass2011-10-24-4/+8
| | | | | | | | | | Commit dc8bbea removed a local variable that is used in most ARM boards. Since we want to avoid an 'unused variable' warning with later compilers, and the #ifdef logic of whether this variable is required is bit painful, this declares the variable local to the block of code that needs it. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: Correct build warning introduced by getenv_ulong() patchSimon Glass2011-10-24-3/+7
| | | | | | | Commit 1272592 introduced a warning since the variable 's' is no longer always used, depending on the CONFIG options. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc/lib/board.c: Call run_post(POST_ROM) before relocatingBernhard Kaindl2011-10-23-7/+7
| | | | | | | | | | | | | | | | | | | The call to run_post(POST_ROM) which can run the POST memory test is currently called too late when gd has already been copied to DRAM. This results in failure to boot Linux after a POST_ROM memory test tested all RAM while gd was already relocated to DRAM due to gd being overwritten by the POST_ROM memory test. Support this by moving the call to run_post(POST_ROM) to run earlier, before U-Boot has started to move data to DRAM (from late board_init_f to early board_init_f) where DRAM is initialized, but not used yet. This allows that an POST memory test can test the whole DRAM, including the area where the board info struct is located. Signed-off-by: Bernhard Kaindl <bernhard.kaindl@thalesgroup.com> Cc: Pieter Voorthuijsen <pieter.voorthuijsen@prodrive.nl>
* x86: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-11/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* sparc: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-10/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* powerpc: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+8
| | | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stefan Roese <sr@denx.de>
* mips: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-11/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* microblaze: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-3/+2
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* m68k: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+8
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* blackfin: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-7/+2
| | | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Mike Frysinger <vapier@gentoo.org>
* avr32: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-13/+3
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Use getenv_ulong() in place of getenv(), strtoulSimon Glass2011-10-23-25/+11
| | | | | | This changes the board code to use the new getenv_ulong() function. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+35
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Graeme Russ <graeme.russ@gmail.com>
* mips: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+36
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Shinya Kuribayashi <skuribay@pobox.com>
* microblaze: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+37
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Michal Simek <monstr@monstr.eu>
* avr32: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+40
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Reinhard Meyer <u-boot@emk-elektronik.de>
* sparc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+10
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Daniel Hellstrom <daniel@gaisler.com>
* sh: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+17
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* powerpc: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+6
| | | | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Acked-by: Stefan Roese <sr@denx.de> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de>
* nios2: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+11
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Scott McNutt <smcnutt@psyent.com>
* m68k: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+10
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Jason Jin <jason.jin@freescale.com>
* arm: cache: define ARCH_DMA_MINALIGN for DMA buffer alignmentAnton Staaf2011-10-23-0/+11
| | | | | | | Signed-off-by: Anton Staaf <robotboy@chromium.org> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Lukasz Majewski <l.majewski@samsung.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* build: add missing $(AR)->$(cmd_link_o_target) updateMike Frysinger2011-10-22-3/+3
| | | | | | | | | Seems people fixed their files to use libfoo.o, but didn't actually update the creation targets to use $(cmd_link_o_target). Update the rest of the Makefile's found with grep. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Simon Glass <sjg@chromium.org>
* consolidate mdelay by providing a common function for all usersAnatolij Gustschin2011-10-22-12/+0
| | | | | | | | | There are several mdelay() definitions in the driver and board code. Remove them all and provide a common mdelay() in lib/time.c. Signed-off-by: Anatolij Gustschin <agust@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* nds32/lib: add generic funcs in NDS32 libMacpaul Lin2011-10-22-0/+890
| | | | | | | Add Makefile, board.c, interrupts.c and bootm.c functions to nds32 architecture. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* nds32/ag101: cpu and init funcs of SoC ag101Macpaul Lin2011-10-22-0/+895
| | | | | | | | | | | | | SoC ag101 is the first chip using NDS32 N1213 cpu core. Add header file of device offset support for SoC ag101. Add main function of SoC ag101 based on NDS32 n1213 core. Add lowlevel_init.S and other periphal related code. This version of lowlevel_init.S also replace hardcode value by MARCO defines from the GPL version andesboot for better code quality. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* nds32/core N1213: NDS32 N12 core family N1213Macpaul Lin2011-10-22-0/+649
| | | | | | | | | | | | | Add N1213 cpu core (N12 Core family) support for NDS32 arch. This patch includes start.S for the initialize procedure of N1213. Start procedure: start.S will start up the N1213 CPU core at first, then jump to SoC dependent "lowlevel_init.S" and "watchdog.S" to configure peripheral devices. Signed-off-by: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Greentime Hu <greentime@andestech.com>
* nds32: add header files support for nds32Macpaul Lin2011-10-22-0/+1450
| | | | | | | Add generic header files support for nds32 architecture. Cache, ptregs, data type and other definitions are included. Signed-off-by: Macpaul Lin <macpaul@andestech.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-10-21-26/+423
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: mpc85xx: Add inline GPIO acessor functions powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9) powerpc/85xx: Fix P2020DS booting powerpc/85xx: Update USB device tree status based on pin settings fdt: Add new fdt_set_node_status & fdt_set_status_by_alias helpers powerpc/85xx: Add support for RMan LIODN initialization powerpc/85xx: Update device tree handling for SRIO powerpc/85xx: Update setting of SRIO LIODNs fm: Don't allow disabling of FM1-DTSEC1 fm-eth: Don't mark the MAC we use for MDIO as disabled in device tree
| * mpc85xx: Add inline GPIO acessor functionsKyle Moffett2011-10-21-0/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To ease the implementation of other MPC85xx board ports, several common GPIO helpers are added to <asm/mpc85xx_gpio.h>. Since each of these compiles to no more than 4-5 instructions it would be very inefficient to call them out of line, therefore we put them entirely in the header file. The HWW-1U-1A board port which these were written for strongly prefers to set multiple GPIOs as a single batch operation, so the API is designed around that basis. To assist other board ports, a small set of wrappers are used which provides a standard gpio_request() interface around the MPC85xx-specific functions. This can be enabled with CONFIG_MPC85XX_GENERIC_GPIO Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: wait for alignment before resetting SERDES RX lanes (SERDES9)Timur Tabi2011-10-20-10/+0
| | | | | | | | | | | | | | | | The work-around for P4080 erratum SERDES9 says that the SERDES receiver lanes should be reset after the XAUI starts tranmitting alignment signals. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Update USB device tree status based on pin settingsShengzhou Liu2011-10-18-0/+23
| | | | | | | | | | | | | | | | | | For P3060 and P4080, USB pins are multiplexed with other functions. Update the device tree status for USB ports based on setting of RCW[EC1] & RCW[EC2] which describe if pins are muxed to usb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Add support for RMan LIODN initializationKumar Gala2011-10-18-0/+112
| | | | | | | | | | | | | | | | | | This patch is intended to initialize RMan LIODN related registers on P2041, P304S and P5020 SocS. It also adds the "rman@0" child node to qman-portal nodes, adds "fsl,liodn" property to RMan inbound block nodes. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Update device tree handling for SRIOKumar Gala2011-10-18-10/+93
| | | | | | | | | | | | | | | | | | | | | | Update device tree handling for SRIO controller to support updated fsl,srio device tree binding. We handle disabling of individual ports, the whole controller, RMU, and RMAN. Additionally, we setup the SRIO related LIODNs in the device tree. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Update setting of SRIO LIODNsKumar Gala2011-10-18-6/+72
| | | | | | | | | | | | | | | | | | | | | | Properly set the LIODN values associated with SRIO controller. On P4080/P3060 we have an LIODN per port and one for the RMU. On P2041/P3041/P5020 we have 2 LIODNs per port. Update the tables for all of these devices to properly handle both styles. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | ColdFire: Add $(obj) before cpu lib to correct buildstany MARCEL2011-10-19-5/+5
|/ | | | | | | Missing $(obj) prevented the build of ColdFire boards in a directory than sources Signed-off-by: Stany MARCEL <stany.marcel@novasys-ingenierie.com>