summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* iMX28: Add PINMUX controlMarek Vasut2011-11-11-1/+815
| | | | | | | | | | | | | | | Taken from Linux kernel with minor modifications: commit bf985969e27b507f734435a99df8bf745a3dbb2b Author: Shawn Guo <shawn.guo@freescale.com> Date: Mon Dec 20 22:57:43 2010 +0800 ARM: mxs: Add iomux support Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* iMX28: Add SSP MMC driverMarek Vasut2011-11-11-0/+2
| | | | | | | | | Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Andy Fleming <afleming@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Acked-by: Andy Fleming <afleming@gmail.com>
* iMX28: Initial support for iMX28 CPUMarek Vasut2011-11-11-0/+4526
| | | | | | | | | | | | This patch supports: - Timers - Debug UART - Clock Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* SPL: Allow ARM926EJS to avoid compiling in the CPU support codeMarek Vasut2011-11-08-0/+6
| | | | | | | | | | This allows the SPL to avoid compiling in the CPU support code. Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Scott Wood <scottwood@freescale.com>
* arm: a320: fix broken timerPo-Yu Chuang2011-11-08-84/+50
| | | | | | | | | | | | | | | | | timer.c used static data and are called before relocation. Move all static variables into global_data structure. Also cleanup timer.c from unused stubs and make it truly use 64 bit tick values. Remove reset_timer_masked() get_timer_masked() reference: arch/arm/cpu/arm926ejs/at91/timer.c Based on Reinhard Meyer <u-boot@emk-elektronik.de>'s patches 5dca710a3d7703e41da0e9894f2d71f9e25bea6b cfff263f41e32c7ba2ee9162a8cc6423eb5a8390 Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com> Tested-by: Macpaul Lin <macpaul@gmail.com>
* arm, davinci: Fix setting of the SDRAM configuration registerChristian Riesch2011-11-08-6/+19
| | | | | | | | | | | | | | | da850_ddr_setup() expects the BOOTUNLOCK bit to be set in If BOOTUNLOCK is not set in this define, several configuration bits will not be writeable and the code will not work. Since the BOOTUNLOCK and TIMUNLOCK bits are not configuration options but access control bits, this patch changes the code to work irrespective of the value of these bits in CONFIG_SYS_DA850_DDR2_SDBCR. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Remove the duplication of LPSC functionsChristian Riesch2011-11-08-92/+4
| | | | | | | | | | | | | | The LPSC functions defined in arch/arm/cpu/arm926ejs/davinci/da850_lowlevel.c are replaced by those already defined in arch/arm/cpu/arm926ejs/davinci/psc.c. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* arm, davinci: Rename AM1808 lowlevel functions to DA850Christian Riesch2011-11-08-82/+82
| | | | | | | | | | | | | | | Rename arch/arm/cpu/arm926ejs/davinci/am1808_lowlevel.c and arch/arm/include/asm/arch-davinci/am1808_lowlevel.h to da850_lowlevel.c and da850_lowlevel.h since they apply not only to the AM1808 SoC but to all DA850 chips. The function names and #defines are changed likewise. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* da8xxevm: fix build errorPrabhakar Lad2011-11-08-0/+1
| | | | | | | | | | | | | | | | | | This patch fixes following compile error for da8xx evm da830evm.c: In function 'board_init': da830evm.c:222: error: 'DAVINCI_SYSCFG_SUSPSRC_UART2' undeclared (first use in this function) da830evm.c:222: error: (Each undeclared identifier is reported only once da830evm.c:222: error: for each function it appears in.) make[2]: *** [da830evm.o] Error 1 similarly for da850evm. introduced through commit: f9fc237f1f07d4e5ff7c9c2da39cabc8d3d7b339 Signed-off-by: Prabhakar Lad <prabhakar.csengg@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-11-08-6/+22
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc83xx: powerpc/mpc83xx: Add 33.33MHz support for mpc8360emds powerpc/mpc83xx: Add 512MB DDR support for mpc8360emds mpc83xx: Rename CONFIG_SYS_DDR_CONFIG and cleanup DDR csbnds code mpc83xx: Cleanup usage of LBC constants mpc83xx: Cleanup usage of DDR constants mpc83xx: Cleanup usage of BAT constants mpc83xx: cosmetic: vme8349.h checkpatch compliance mpc83xx: cosmetic: ve8313.h checkpatch compliance mpc83xx: cosmetic: sbc8349.h checkpatch compliance mpc83xx: cosmetic: mpc8308_p1m.h checkpatch compliance mpc83xx: cosmetic: kmeter1.h checkpatch compliance mpc83xx: cosmetic: TQM834x.h checkpatch compliance mpc83xx: cosmetic: SIMPC8313.h checkpatch compliance mpc83xx: cosmetic: MVBLM7.h checkpatch compliance mpc83xx: cosmetic: MPC837XERDB.h checkpatch compliance mpc83xx: cosmetic: MPC837XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8360ERDK.h checkpatch compliance mpc83xx: cosmetic: MPC8360EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8349ITX.h checkpatch compliance mpc83xx: cosmetic: MPC8349EMDS.h checkpatch compliance mpc83xx: cosmetic: MPC832XEMDS.h checkpatch compliance mpc83xx: cosmetic: MPC8323ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8315ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8313ERDB.h checkpatch compliance mpc83xx: cosmetic: MPC8308RDB.h checkpatch compliance mpc83xx: cosmetic: MERGERBOX.h checkpatch compliance mpc83xx: Fix ipic structure definition powerpc, mpc83xx: add DDR SDRAM Timing Configuration 3 definitions cosmetic, powerpc, mpc83xx: checkpatch cleanup powerpc/83xx: move km 83xx specific i2c code to km83xx_i2c mpc83xx: fix global timer structure definition
| * mpc83xx: Cleanup usage of LBC constantsJoe Hershberger2011-11-03-1/+7
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Cleanup usage of DDR constantsJoe Hershberger2011-11-03-0/+9
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: Fix ipic structure definitionJoe Hershberger2011-11-03-4/+5
| | | | | | | | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Added siprr_{b,c} and sepcr for completeness. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix global timer structure definitionKim Phillips2011-11-03-1/+1
| | | | | | | | | | | | | | | | The byte address distance between GTCFR2 and GTMDR1 is 11, not 10. Reported-by: Shawn Bai <programassem@hotmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-11-08-134/+1486
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: Arm: re-introduce the MACH_TYPE_XXXXXX for EB_CPUX9K2 board arm: jadecpu: Readd MACH_TYPE_JADECPU at91: defined mach-types for otc570 board in board config file at91: defined mach-types for meesc board in board config file mx31pdk: Enable D and I caches ehci-mxc: remove incorrect comment README: Fix supported i.MX SoC list for CONFIG_MXC_SPI mx53: Turn off child clocks before reconfigure perclk_root qong: enable support for compressed images imx: imx31_phycore.h: fix checkpatch warnings vision2: Remove unused get_board_rev function mx53smd: Remove unused get_board_rev function mx53ard: Remove unused get_board_rev function mx53evk: Remove unused get_board_rev function mx53evk: Add RTC support mx53loco: Remove unused get_board_rev function mx53evk: Remove unneeded '1' from mx53evk.h OMAP3: mvblx: Initial support for mvBlueLYNX-X ARM: dig297: Define MACH_TYPE_OMAP3_CPS and CONFIG_MACH_TYPE omap3: mem: Move comments next to definitions omap3: mem: Clean-up whitespaces omap3: mem: Define and use common macros Davinci: ea20: added PREBOOT to configuration Davinci: ea20: added I2C support Davinci: ea20: added video support VIDEO: davinci: add framebuffer to da8xx ARM: Davinci: added missing registers to hardware.h Davinci: ea20: add gpios for LCD backlight control Davinci: ea20: add gpio for keeping power on in board_late_init Davinci: ea20: Add default U-Boot environment Davinci: ea20: Add early init to get early output from console Davinci: ea20: Add NAND support Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for console Davinci: ea20: set console on UART0 arm, davinci: add cam_enc_4xx support arm926ejs, davinci: add missing spi defines for dm365 arm926ejs, davinci: add cpuinfo for dm365 arm, davinci: add lowlevel function for dm365 soc arm, davinci: add header files for dm365 spl, nand: add 4bit HW ecc oob first nand_read_page function arm, davinci: add support for new spl framework spl: add option for adding post memory test to the SPL framework net, davinci_emac: make clock divider in MDIO control register configurable arm, usb, davinci: make USBPHY_CTL register configurable usb, davinci: add enable_vbus() weak function omap3evm: fix errors caused by multiple definitions omap3evm: Add (quick) configuration for NAND only omap3evm: Add (quick) configuration for MMC/SD only omap3evm: move common config options to new file omap3evm: Prepare to split configuration omap3evm: Reorder related config options omap/spl: actually enable the console davinci_emac: compilation fix, phy is array now omap3evm: Set environment variable 'ethaddr' arm, arm926: fix missing symbols in NAND_SPL mode arm, davinci: Add function lpsc_syncreset() arm, davinci: replace CONFIG_PRELOADER with CONFIG_SPL_BUILD arm/km: portl2 environment address update to P1B arm/km: adapt bootcounter evaluation arm/km: enable jffs2 cmds arm/km: trigger reconfiguration for the Xilinx FPGA arm/km: add boardid and hwkey to kernel command line ARM: Reintroduce MACH_TYPE_KM_KIRKWOOD for keymile ARM boards netspace_v2: enable I2C EEPROM support netspace_v2: fix SDRAM configuration armada100: define CONFIG_SYS_CACHELINE_SIZE pantheon: define CONFIG_SYS_CACHELINE_SIZE kirkwood: define CONFIG_SYS_CACHELINE_SIZE kirkwood: drop empty asm-offsets.s file arm/km/mgcoge3un: enhance "waitforne" feature arm/km: add variable waitforne to mgcoge3un gplugD: Fix for error:MACH_TYPE_SHEEVAD undeclared ARM: dreamplug: fix compilation ARM: DockStar: fix compilation ARM: netspace_v2: fix warnings am335x: Drop board_sysinfo struct am335x: Temporarily add MACH_TYPE define misc:pmic:samsung Enable PMIC driver at C210 Universal target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p UNIVERSAL C210 target dcache:s5p CONFIG_SYS_CACHELINE_SIZE added for s5p GONI target smdkv310: use macro for mmc data read function address smdkv310: use spl framework for mmc spl SMDKV310: use get_ram_size() to validate dram size SMDKV310: Initialize board id using CONFIG_MACH_TYPE ORIGEN : use absolute paths and fix tool naming ORIGEN : enable device tree support MX25: tx25: Fix building due to missing MACH_TYPE mx31: Add board support for HALE TT-01 mx31: add ESD control registers mx31: define pins and init for UART2 and CSPI3 MX35: add support for flea3 board MX51: vision2: add MACH_TYPE in config file vision2: Remove unused header file mx51evk: Remove unused get_board_rev function mx51evk: Remove unneeded '1' from mx51evk.h I2C: Fix mxc_i2c.c problem on imx31_phycore mx35pdk: Add RTC support mx51evk: Use GPIO API for configuring the IOMUX mx51evk: Add RTC support rtc: Make mc13783-rtc driver generic qong: remove unneeded IOMUX settings qong: Use mx31_set_gpr to setup USBH2 pins mx31: Introduce mx31_set_gpr function mx31pdk: Add MC13783 PMIC support qong: remove unneeded "1" from qong.h misc: pmic: fix regression in pmic_fsl.c (SPI) mx5 configs: CONFIG_PRIME should really be CONFIG_ETHPRIME MX35: Drop unnecessary prototypes from imx-regs.h I2C: added I2C-2 and I2C-3 to MX35 MX35: factorize common assembly code MX35: add reset cause as provided by other i.MX MX35: add pins definition for UART3 MX35: added ESDC structure to imx-regs
| * | mx53: Turn off child clocks before reconfigure perclk_rootFabio Estevam2011-11-04-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In addition to ensuring that PERCLK remains at least 2.5 times slower than the AHB clock, certain steps need to be followed to ensure robust operation of PERCLK when reconfiguring the PERCLK clock source. To properly configure the PERCLK clock source, the following steps are required: 1.In the CCGR registers, gate the clocks to all PERCLK-dependent modules. 2.Select the desired input clock for the PERCLK root clock (to be either source from the peripherals main source clock or the lp_apm clock source). Refer to the CMCBR register, perclk_lp_apm_sel bit. 3.Configure the perclk_pred1, perclk_pred2, and perclk_podf dividers to the desired setting. Refer to the CBCDR register for details. 4.In the CCGR registers, enable the desired clocks for the PERCLK-dependent module clocks. If these steps aren't followed, GPT timer may stop and the kernel stops at "Calibrating delay loop". Signed-off-by: Terry Lv <r65388@freescale.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | omap3: mem: Move comments next to definitionsSanjeev Premi2011-11-04-76/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Calculations for ACTIM_CTRLA amd ACTIM_CTRLB values are defined in 'header' style comments. Moved them along with definitions. Should help maintain consistency between comments and code if any of these are tweaked in future. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap3: mem: Clean-up whitespacesSanjeev Premi2011-11-04-26/+26
| | | | | | | | | | | | | | | | | | | | | | | | | | | Consistent use of TABs and align definitions with neighbouring code. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap3: mem: Define and use common macrosSanjeev Premi2011-11-04-24/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Define common macros to arrive at the values of registers SDRC_ACTIM_CTRLA and SDRC_ACTIM_CTRLB for different memory types. This doesn't make any real change in the execution but helps readability. Signed-off-by: Sanjeev Premi <premi@ti.com> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | VIDEO: davinci: add framebuffer to da8xxStefano Babic2011-11-03-0/+126
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch is a port from the framebuffer driver of the Linux driver drivers/video/da8xx-fb.c, used on davinci da8xx and OMAP-L138 boards. As base for the port, the following commit (last changes for this driver at the moment in the Linux kernel tree) was taken: commit 1db41e032d563eb47deab40dc5595be306b143ba Author: axel lin <axel.lin@gmail.com> Date: Tue Feb 22 01:52:42 2011 +0000 video: da8xx-fb: fix section mismatch warning Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | ARM: Davinci: added missing registers to hardware.hStefano Babic2011-11-03-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The hardware base address for ther LCD configuration registers is missing, as well as some syscfg registers. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | Davinci: ea20: set GPIOs to hold MII-Phy in reset and set UART0-Switch for ↵Bastian Ruppert2011-11-03-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | console Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: dzu@denx.de CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | Davinci: ea20: set console on UART0Bastian Ruppert2011-11-03-1/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Bastian Ruppert <Bastian.Ruppert@Sewerin.de> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm926ejs, davinci: add missing spi defines for dm365Heiko Schocher2011-11-03-0/+3
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm926ejs, davinci: add cpuinfo for dm365Heiko Schocher2011-11-03-2/+29
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm, davinci: add lowlevel function for dm365 socHeiko Schocher2011-11-03-0/+480
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | used for booting (for example) from NAND using spl code. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm, davinci: add header files for dm365Heiko Schocher2011-11-03-0/+294
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm, davinci: add support for new spl frameworkHeiko Schocher2011-11-03-1/+92
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Scott Wood <scottwood@freescale.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | omap/spl: actually enable the consoleIlya Yanok2011-11-03-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Currently OMAP SPL code does all the initialization but does not set the gd->have_console value so no output is actually performed. This patch sets gd->have_console to 1. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm, arm926: fix missing symbols in NAND_SPL modeHeiko Schocher2011-11-03-0/+6
| | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | arm, davinci: Add function lpsc_syncreset()Christian Riesch2011-11-03-5/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a function lpsc_syncreset that allows setting a lpsc module into Sync Reset state. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Paulraj Sandeep <s-paulraj@ti.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Heiko Schocher <hs@denx.de> Tested-by: Heiko Schocher <hs@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | armada100: define CONFIG_SYS_CACHELINE_SIZELei Wen2011-11-03-0/+2
| | | | | | | | | | | | | | | | | | | | | By default, on Armada100 SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen <leiwen@marvell.com>
| * | pantheon: define CONFIG_SYS_CACHELINE_SIZELei Wen2011-11-03-0/+2
| | | | | | | | | | | | | | | | | | | | | By default, on Pantheon SoC DCache Lnd ICache line lengths are 32 bytes long Signed-off-by: Lei Wen <leiwen@marvell.com>
| * | kirkwood: define CONFIG_SYS_CACHELINE_SIZEMichael Walle2011-11-03-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default, on Kirkwood SoC DCache Lnd ICache line lengths are 32 bytes long Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Cc: Prafulla Wadaskar <prafulla@marvell.com> Signed-off-by: Michael Walle <michael@walle.cc> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | kirkwood: drop empty asm-offsets.s fileMike Frysinger2011-11-03-0/+0
| | | | | | | | | | | | | | | | | | | | | This generated file does not belong in the tree -> punt. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * | am335x: Drop board_sysinfo structTom Rini2011-11-03-7/+0
| | | | | | | | | | | | | | | | | | This isn't used presumably should be a typedef if needed later. Signed-off-by: Tom Rini <trini@ti.com>
| * | mx31: add ESD control registersHelmut Raiger2011-11-03-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | This allows to initialize DDR memory in C code. Currently all mx31 boards use assembler code (lowlevel_init.S) Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mx31: define pins and init for UART2 and CSPI3Helmut Raiger2011-11-03-0/+32
| | | | | | | | | | | | | | | Signed-off-by: Helmut Raiger <helmut.raiger@hale.at> Acked-by: Stefano Babic <sbabic@denx.de>
| * | mx31: Introduce mx31_set_gpr functionFabio Estevam2011-11-03-0/+54
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Introduce mx31_set_gpr function for setting the GPR (General Purpose Register) on MX31. This function can be useful for setting a group of pins into tied to some specific peripherals. Reuse this function from the linux kernel. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| * | MX35: Drop unnecessary prototypes from imx-regs.hStefano Babic2011-11-03-4/+0
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | MX35: factorize common assembly codeStefano Babic2011-11-03-0/+140
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | MX35: add reset cause as provided by other i.MXStefano Babic2011-11-03-2/+29
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | MX35: add pins definition for UART3Stefano Babic2011-11-03-0/+3
| | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
| * | MX35: added ESDC structure to imx-regsStefano Babic2011-11-03-0/+30
| |/ | | | | | | | | | | | | | | The structure and PLL defines are added to the imx-regs.h file and dropped from board header files. Signed-off-by: Stefano Babic <sbabic@denx.de>
* | arch/powerpc/cpu/mpc8260/spi.c: Fix GCC 4.6 build warningsWolfgang Denk2011-11-07-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | Fix: spi.c: In function 'spi_init_r': spi.c:279:22: warning: variable 'cp' set but not used [-Wunused-but-set-variable] spi.c: In function 'spi_xfer': spi.c:361:22: warning: variable 'cp' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de>
* | arch/powerpc/lib/bat_rw.c: Fix GCC 4.6 build warningWolfgang Denk2011-11-07-1/+2
| | | | | | | | | | | | | | | | | | | | | | Fix: bat_rw.c: In function 'write_bat': bat_rw.c:38:6: warning: variable 'batn' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Kumar Gala <galak@kernel.crashing.org> Cc: Andy Fleming <afleming@gmail.com>
* | mpc8220/i2c.c: Fix GCC 4.6 build warningWolfgang Denk2011-11-07-4/+2
| | | | | | | | | | | | | | | | | | | | Fix: i2c.c: In function 'wait_for_bb': i2c.c:109:16: warning: variable 'temp' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | mpc8260/i2c.c: replace PRINTD() by debug()Wolfgang Denk2011-11-07-49/+40
| | | | | | | | | | | | | | | | | | | | | | | | This also fixes some GCC 4.6 build warnings like: i2c.c: In function 'i2c_init': i2c.c:221:26: warning: variable 'txbd' set but not used [-Wunused-but-set-variable] i2c.c:221:19: warning: variable 'rxbd' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | mpc8260/i2c.c: CodingStyle cleanupWolfgang Denk2011-11-07-270/+264
| | | | | | | | | | | | | | | | | | Make (mostly) checkpatch clean (don't convert to use I/O accessors yet, so there will be "Use of volatile is usually wrong" warnings left. Also accept some other harmless checkpatch warnings. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Heiko Schocher <hs@denx.de>
* | mpc8220/fec.c: Fix GCC 4.6 build warningWolfgang Denk2011-11-07-3/+3
| | | | | | | | | | | | | | | | | | Fix: fec.c: In function 'mpc8220_fec_recv': fec.c:733:8: warning: variable 'frame' set but not used [-Wunused-but-set-variable] Signed-off-by: Wolfgang Denk <wd@denx.de>
generated by cgit v1.1 at 2024-11-08 15:53:50 +0000