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| * | | | powerpc/corenet: Move CONFIG_FSL_CORENET out of board header fileYork Sun2013-08-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move CONFIG_FSL_CORENET define to config_mpc85xx.h. It is not board specific feature and belongs to SoC header. Signed-off-by: York Sun <yorksun@freescale.com>
| * | | | powerpc/t4: Correct LIODN assignment for SRIOLiu Gang2013-08-09-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For T4 platform, the SRIO LIODN registers are in SRIO address space and not in GUTs. Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
| * | | | powerpc/b4860: Correct LIODN assignment for SRIOLiu Gang2013-08-09-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For B4, the SRIO LIODN registers are in SRIO address space and not in GUTs. Signed-off-by: Liu Gang <Gang.Liu@freescale.com>
| * | | | powerpc/srio: Update the SRIO LIODN registers and ID table macroLiu Gang2013-08-09-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some PowerPC platforms, LIODN registers for SRIO ports are in SRIO register address space. So the ccsr_rio structure should be updated for those LIODN registers. In addition, add a new macro "SET_SRIO_LIODN_BASE" to create the SRIO LIODN ID table based on the SRIO LIODN register address. Signed-off-by: Liu Gang <Gang.Liu@freescale.com> Acked-by: York Sun <yorksun@freescale.com>
* | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-mipsTom Rini2013-08-13-150/+160
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| * | | | | MIPS: bootm: drop obsolete Qemu specific bootm implementationDaniel Schwierzeck2013-08-13-66/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Qemu specific bootm implementation was intended for a special Qemu target in Linux kernel. But this target has been dropped in v2.6.25-rc1 by commit 302922e5f6901eb6f29c58539631f71b3d9746b8 Author: Ralf Baechle <ralf@linux-mips.org> Date: Tue Jan 29 10:15:02 2008 +0000 [MIPS] Qemu: Remove platform. The Qemu platform was originally implemented to have an easily supportable platform until Qemu reaches a state where it emulates a real world system. Since the latest release Qemu is capable of emulating the MIPSsim and Malta platforms, so this goal has been reached. The Qemu plaform is also rather underfeatured so less useful than a Malta emulation. Thus the special bootm implementation is obsolete by now and can be dropped. The Qemu support in U-Boot is going to be replaced by MIPS Malta board support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: add YAMON style Linux preparation/jump code for Qemu MaltaDaniel Schwierzeck2013-08-13-2/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: add support for generic relocation of init ramdisksDaniel Schwierzeck2013-08-13-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All linux kernels after v2.6 require a page-aligned location of an external init ramdisk. Enable CONFIG_SYS_BOOT_RAMDISK_HIGH to support this with the generic U-Boot relocation code. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: refactor initialisation of kernel environmentDaniel Schwierzeck2013-08-13-33/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move initialisation of Linux environment to separate functions. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: refactor initialisation of kernel cmdlineDaniel Schwierzeck2013-08-13-47/+83
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move initialisation of Linux command line to separate functions. Also add support for bootm subcommand 'cmdline'. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: add support for LMBDaniel Schwierzeck2013-08-13-0/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is required for init ramdisk relocation and device tree support. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: optimize kernel entry callDaniel Schwierzeck2013-08-13-7/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix signature of kernel entry function. Mark the kernel entry with __noreturn for better code optimisation. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | | | | MIPS: bootm: fix checkpatch.pl warningsDaniel Schwierzeck2013-08-13-6/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
* | | | | | Merge branch 'master' of git://www.denx.de/git/u-boot-videoTom Rini2013-08-12-115/+4
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| * | | | | exynos: video: change mipi dsi write function parameters correctlyDonghwa Lee2013-08-12-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch have changed mipi dsi write functions' parameters correctly so that type cast operations were removed. And mipi dsi payload is composed with array of panel commands to improve readability. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com>
| * | | | | video: Encapsulate font in video_font_data.hMarek Vasut2013-08-12-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch moves all the font configuration values into video_font_data.h so they are all in the right place with the font. The video_font.h now only includes video_font_data.h and will allow us to select and include different font once more fonts are added. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> [agust: fixed build warning for mcc200] Signed-off-by: Anatolij Gustschin <agust@denx.de>
| * | | | | arm, am33xx: add clk_get prototypeHeiko Schocher2013-08-10-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the clk_get() function is needed for the da8xx-fb video driver, which is used on the am3xx based siemens boards. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
| * | | | | video, da8xx: move da8xx-fb.h to drivers/videoHeiko Schocher2013-08-10-113/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the da8xx-fb driver works also on am335x boards. So move the da8xx-fb.h file from arch/arm/include/asm/arch-davinci to drivers/video, so this driver can used from am335x based boards. Also add WVGA panel_type. Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
| * | | | | dma: apbh: Add special circular mode for LCDMarek Vasut2013-08-09-0/+2
| | |_|_|/ | |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add special function that executes a specially crafted circular DMA descriptor. The function doesn't wait for the descriptor to finish the transfer, since the descritor never finishes. This is useful when operating a SmartLCD through the LCDIF interface, as the LCDIF does not give us any means to have continuous refresh of the SmartLCD. Instead, the RUN bit in the LCDIF CTRL register must be triggered manually. This can be worked around by starting an DMA transfer which continuously sets the RUN bit. This function allows starting exactly such transfer. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Anatolij Gustschin <agust@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
* | | | | Merge branch 'master' of git://git.denx.de/u-boot-spiTom Rini2013-08-12-0/+7
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| * | | | microblaze: Call spi_init functionMichal Simek2013-08-08-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialization spi. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net> Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
| * | | | spi: Add zynq spi controller driverJagannadha Sutradharudu Teki2013-08-07-0/+2
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Zynq spi controller driver supports 2 buses and 3 chipselects on each bus. Signed-off-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com> Acked-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | | nds32: introduce DMA allocation APIken kuo2013-08-09-0/+33
|/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not compile for the adp-ag101 boards since commit a8f9cd1893bef05b92f63242228607b45821c4a7 (net: update FTGMAC100 for MMU/D-cache support) The driver assumes that the DMA allocation API are provided by all architectures. This is not the case for nds32 and it causes a build error. This patch adds DMA allocation API to avoid the errors. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com> Cc: Andes <uboot@andestech.com> Signed-off-by: Andes <uboot@andestech.com>
* | | config: don't define CONFIG_ARCH_DEVICE_TREEStephen Warren2013-08-02-57/+0
| | | | | | | | | | | | | | | | | | | | | Now that nothing uses CONFIG_ARCH_DEVICE_TREE, stop defining it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | blackfin: Fix using gd->baudrate before setting its valueAxel Lin2013-07-31-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Current code uses gd->baudrate before setting its value. Besides, I got below build warning which is introduced by commit ddb5c5be "blackfin: add baudrate to bdinfo". board.c:235:3: warning: passing argument 1 of 'simple_strtoul' makes pointer from integer without a cast [enabled by default] include/vsprintf.h:27:7: note: expected 'const char *' but argument is of type 'unsigned int' This patch ensures we get the baudrate setting before using it. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | | blackfin: gpio: Use proper mask for comparing functionAxel Lin2013-07-31-5/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The function return from P_FUNCT2MUX(per) takes 2 bits, however for BF537_FAMILY with offset != 1 the function is 1 bit. Also has small refactor for better readability. In portmux_setup(), it looks odd having "muxreg &= ~(3 << 1);" while in current code we do muxreg |= (function << offset);. Signed-off-by: Axel Lin <axel.lin@ingics.com>
* | | blackfin: gpio: Unreserve gpio in special_gpio_free()Axel Lin2013-07-31-2/+2
| |/ |/| | | | | | | | | | | In special_gpio_free(), call unreserve() rather than reserve() to release gpio. Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-nds32Tom Rini2013-07-25-23/+309
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| * | nds32: Enable FPU if the version of CPU supportedken kuo2013-07-25-0/+52
| | | | | | | | | | | | | | | | | | | | | | | | | | | Some version of Andes core support FPU coprocessor, if this is the case, and toolchain support FPU instruction set, we should enable it at low level initialization time. Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: Update <asm/io.h> and <asm/setup.h> with SPDX license identifiersTom Rini2013-07-25-6/+2
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | nds32: Convert Makefiles to use COBJS-y styleken kuo2013-07-25-13/+16
| | | | | | | | | | | | | | | Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: ag101/ag102: Fix setting lastdec and now valuesAxel Lin2013-07-24-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The timer3 counter unit for lastdesc and now values are inconsistent in current code. The unit of "readl(&tmr->timer3_counter) / (CONFIG_SYS_CLK_FREQ / 2)" is second. However, CONFIG_SYS_HZ is defined as 1000 in board config file. This means the accuracy of "lastdec" and "now" should be in millisecond, thus fix the equation to set lastdec and now variables accordingly. Signed-off-by: Axel Lin <axel.lin@ingics.com>
| * | nds32: Enable the function of passing parameters to Linuxken kuo2013-07-24-0/+192
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add a header file, setup.h, which copy from Linux source code, this file contain structures are used to pass initialisation parameters to Linux. Enable this function on adp-ag101/adp-ag101p target Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: Enable two banks of SDRAM on Andes boardken kuo2013-07-24-1/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | The original adp-ag101/adp-ag101p initialize only one bank(64MB) by default at boot time, but it is not enough for some application, so increasing to two banks(128M). Signed-off-by: Kuan-Yu Kuo <ken.kuoky@gmail.com> Cc: Macpaul Lin <macpaul@gmail.com>
| * | nds32: introduce macros for bit manipulationGabor Juhos2013-07-24-0/+37
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not compile for the adp-ag101 boards since commit f6c3b34697bf8bf05cb4e81c2fd3cadb9a98daea (mmc: update Faraday FTSDC010 for rw performance) The driver assumes that the bit manipulation macros are provided by all architectures. This is not the case for nds32 and it causes a build error like this: ftsdc010_mci.c: In function 'ftsdc010_clkset': ftsdc010_mci.c:118: warning: implicit declaration of function 'setbits_le32' ftsdc010_mci.c:123: warning: implicit declaration of function 'clrbits_le32' drivers/mmc/libmmc.o: In function `ftsdc010_request': /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:243: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:234: undefined reference to `clrbits_le32' drivers/mmc/libmmc.o: In function `ftsdc010_clkset': /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:118: undefined reference to `clrbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:121: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32' /devel/u-boot.git/drivers/mmc/ftsdc010_mci.c:123: undefined reference to `setbits_le32' The patch adds bit manipulation macros for the nds32 architecture to avoid the errors. The macros are copied from the ARM implementation. Compile tested only. Cc: Kuo-Jung Su <dantesu@faraday-tech.com> Cc: Macpaul Lin <macpaul@andestech.com> Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-07-25-45/+76
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflict over SPDX changes means that one change was effectively dropped as it was fixing typos in a removed hunk of text. Conflicts: arch/mips/cpu/mips64/start.S Signed-off-by: Tom Rini <trini@ti.com>
| * | MIPS: mips32/cache.S: use v1 register for indirect function callsGabor Juhos2013-07-24-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: store cache line size in t8 registerGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: save return address in t9 registerGabor Juhos2013-07-24-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/cache.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: rework relocation info checkGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Make it similar to the code in mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: use t8 register for dynamic relocationGabor Juhos2013-07-24-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save gd in s0 registerGabor Juhos2013-07-24-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save relocation offset in s1 registerGabor Juhos2013-07-24-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: xburst/start.S: save relocation address in s2 registerGabor Juhos2013-07-24-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips{32,64}/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/start.S: rework relocation info checkGabor Juhos2013-07-24-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | Make it similar to the code in mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/start.S: use t8 register for dynamic relocationGabor Juhos2013-07-24-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Synchronize the code with mips64/start.S, in order to allow further unifications. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/cache.S: remove superfluous register assignmentGabor Juhos2013-07-24-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The t4 register already holds the cache line size, and the value of the register is not changed in mips_init_icache. Get the cache line size value from t4 for mips_init_dcache as well and remove the superfluous assignment of t5 register. Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
| * | MIPS: mips64/interrupt.c: remove superfluous includeGabor Juhos2013-07-24-1/+0
| | | | | | | | | | | | | | | | | | | | | Nothing is used from asm/mipsregs.h. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: mips32/time.c: fix checkpatch errors/warningsGabor Juhos2013-07-24-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Checking mips32/time.c with checkpatch.pl shows this: arch/mips/cpu/mips32/time.c:30: WARNING: line over 80 characters arch/mips/cpu/mips32/time.c:57: ERROR: return is not a function, parentheses are not required total: 1 errors, 1 warnings, 0 checks, 85 lines checked Fix the code to make checkpatch.pl happy. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * | MIPS: qemu-malta: setup GT64120 registers as done by YAMONGabor Juhos2013-07-24-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Move the GT64120 register base to 0x1be00000 and setup PCI BAR registers as done by the original YAMON bootloader. This is needed for running Linux kernel. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
generated by cgit v1.1 at 2024-10-31 09:33:23 +0000