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| | * | | am33xx: Add am33xx_spl_board_init function, callTom Rini2013-09-20-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to allow for a further call-out in spl_board_init. Call this am33xx_spl_board_init and add a __weak version. This function may be used to scale the MPU frequency up, depending on board needs. Signed-off-by: Tom Rini <trini@ti.com>
| * | | | ARM: use r9 for gdJeroen Hofstee2013-09-23-12/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To be more EABI compliant and as a preparation for building with clang, use the platform-specific r9 register for gd instead of r8. note: The FIQ is not updated since it is not used in u-boot, and under discussion for the time being. The following checkpatch warning is ignored: WARNING: Use of volatile is usually wrong: see Documentation/volatile-considered-harmful.txt Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | | | ARM,relocate: do not use r9Jeroen Hofstee2013-09-23-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | r9 is a platform-specific register in ARM EABI and not per definition a general purpose register. Do not use it while relocating so it can be used for gd. cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * | | | ARM: refactor compiler options in config.mkMasahiro Yamada2013-09-23-22/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Every ARM cpu config.mk (arch/arm/cpu/{CPUDIR}/config.mk) defines: PLATFORM_RELFLAGS += -fno-common -ffixed-r8 -msoft-float So, this patch moves the common compiler options to arch/arm/config.mk. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | | arm: zynq: Fix timer loadaddressMichal Simek2013-09-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Reload address was written to the counter register instead of load register. The problem happens when timer expires but never reload to ~0UL (it is downcount timer). Reported-by: Stephen MacMahon <stephenm@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | | | arm: prevent using movt/movw address loadsJeroen Hofstee2013-09-23-2/+6
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The movt/movw instruction can be used to hardcode an memory location in the instruction itself. The linker starts complaining about this if the compiler decides to do so: "relocation R_ARM_MOVW_ABS_NC against `a local symbol' can not be used" and it is not support by U-boot as well. Prevent their use by requiring word relocations. This allows u-boot to be build at other optimalization levels then -Os. Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Cc: TigerLiu@viatech.com.cn Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Simon Glass <sjg@chromium.org>
| * | | ARM: s3c44b0: remove remainders of dead boardMasahiro Yamada2013-09-19-795/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Because commit 5dc5f36 removed B2 board support, arch/arm/cpu/s3c44b0/* and arch/arm/include/asm/arch-s3c44b0/* are not necessary anymore. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Andrea Scian <andrea.scian@dave-tech.it>
| * | | arm: dma_alloc_coherent: malloc() -> memalign()Kuo-Jung Su2013-09-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Even though the MMU/D-cache is off, some DMA engines still expect strict address alignment. For example, the incoming Faraday FTMAC110 & FTGMAC100 ethernet controllers expect the tx/rx descriptors should always be aligned to 16-bytes boundary. Signed-off-by: Kuo-Jung Su <dantesu@faraday-tech.com> CC: Albert ARIBAUD <albert.u.boot@aribaud.net>
| * | | arm: spl: Do not set the stack pointer twiceMasahiro Yamada2013-09-14-3/+0
| | |/ | |/| | | | | | | | | | | | | | | | Because the stack pointer is already set in arch/arm/lib/crt0.S, we do not need to set it in arch/arm/lib/spl.c. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | ARM: atmel: add RNDIS gadget supportBo Shen2013-09-24-0/+13
| | | | | | | | | | | | | | | | | | Add RNDIS gadget support to test atmel usba udc driver Signed-off-by: Bo Shen <voice.shen@atmel.com>
* | | ARM: atmel: correct UDPHS nameBo Shen2013-09-24-1/+1
| | | | | | | | | | | | | | | | | | | | | Correct the UDPHS name from UDHPS Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Marek Vasut <marex@denx.de>
* | | USB: gadget: add atmel usba udc driverBo Shen2013-09-24-0/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add atmel usba udc driver support, porting from Linux kernel The original code in Linux Kernel information is as following commit e01ee9f509a927158f670408b41127d4166db1c7 Author: Jingoo Han <jg1.han@samsung.com> Date: Tue Jul 30 17:00:51 2013 +0900 usb: gadget: use dev_get_platdata() Use the wrapper function for retrieving the platform data instead of accessing dev->platform_data directly. Signed-off-by: Bo Shen <voice.shen@atmel.com>
* | | Sound: I2S: Replacing I2S1 with I2S0 channel.Dani Krishna Mohan2013-09-24-0/+6
| | | | | | | | | | | | | | | | | | | | | This patch makes required changes to make use of I2S0 channel instead of I2S1 channel on exynos5250. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* | | ARM: Added I2S0 clocks for audioDani Krishna Mohan2013-09-24-23/+75
| | | | | | | | | | | | | | | | | | | | | | | | This patch makes the necessary changes for making use of I2S0 channel instead of I2S1 channel on smdk board. This changes are done to maintain the uniformity to use I2S0 channel. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* | | DTS: Addition of I2S0 channel and replacing I2S1Dani Krishna Mohan2013-09-24-0/+19
| | | | | | | | | | | | | | | | | | | | | This patch enables default I2S0 channel.And I2S platform parameter has been moved to a common file viz exynos5.dtsi. Signed-off-by: Dani Krishna Mohan <krishna.md@samsung.com>
* | | SPDX: fix IBM-pibs license identifierWolfgang Denk2013-09-20-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SPDX License List version 1.19 now contains an official entry for the IBM-pibs license. However, instead of our suggestion "ibm-pibs", the SPDX License List uses "IBM-pibs", with the following rationale: "The reason being that all other SPDX License List short identifiers tend towards using capital letters unless spelling a word. I'd prefer to be consistent to this end". Change the license IDs to use the official name. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | | arm: omap5: echi: Add GPL-2.0+ SPDX-License-IdentifierNobuhiro Iwamatsu2013-09-20-14/+1
| | | | | | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* | | Cosmetic: Fix a number of typos, no functional changes.Robert P. J. Day2013-09-20-2/+2
| | | | | | | | | | | | | | | | | | | | | Fix various misspellings of things like "environment", "kernel", "default" and "volatile", and throw in a couple grammar fixes. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-09-13-0/+32
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| * | powerpc/mpc85xx: Add workaround for erratum A-005125York Sun2013-09-10-0/+32
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In a very rare condition, a system hang is possible when the e500 core initiates a guarded load to PCI / PCIe /SRIO performs a coherent write to memory. Please refer to errata document for more details. This erratum applies to the following SoCs and their variants, if any. BSC9132 BSC9131 MPC8536 MPC8544 MPC8548 MPC8569 MPC8572 P1010 P1020 P1021 P1022 P1023 P2020 C29x Signed-off-by: York Sun <yorksun@freescale.com> CC: Scott Wood <scottwood@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-12-6/+23
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| * | Merge branch 'u-boot-samsung/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-11-6/+23
| |\ \ | | |/ | |/| | | | | | | Conflicts: tools/Makefile
| | * arm:mmc:goni/exynos: Fix wrong mmc base register devices offset.Przemyslaw Marczak2013-09-11-2/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On s5pc1xx mmc devices offset is multiply of 0x100000, wrong value was 0x10000. Register offset always points to mmc 0 before this change. Add macro definition of mmc dev register offset to s5pc1xx and exynos mmc. Signed-off-by: Przemyslaw Marczak <p.marczak@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> CC: Minkyu Kang <mk7.kang@samsung.com> Acked-by: Jaehoon Chung <jh80.chung at samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| | * arm:exynos:gpio: fix s5p_gpio_part_max for exynos4x12Piotr Wilczek2013-08-23-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix wrong value returned by 's5p_gpio_part_max' function for Exynos4412. Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-i2cTom Rini2013-09-09-1/+7
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| * | | powerpc/mpc85xx: Fix the I2C bus speed error on p1022Tang Yuantian2013-09-09-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The source clock frequency of I2C bus on p1022 is the platform(CCB) clock, not CCB/2. The wrong source clock frequency leads to wrong I2C bus speed setting. so, fixed it. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com>
| * | | SPL: P1022DS: switch to new multibus/multiadapter supportYing Zhang2013-09-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | - Added section "u_boot_list" in arch/powerpc/cpu/mpc85xx/u-boot-spl.lds - Use the function i2c_init_all instead of i2c_init Signed-off-by: Ying Zhang <b40530@freescale.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2013-09-06-90/+779
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| * | socfpga: Creating driver for Reset ManagerChin Liang See2013-09-06-31/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Consolidating reset code into reset_manager.c. Also separating reset configuration for virtual target and real hardware Cyclone V development kit Signed-off-by: Chin Liang See <clsee@altera.com> Reviewed-by: Pavel Machek <pavel@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Pavel Machek <pavel@denx.de> Cc: Dinh Nguyen <dinguyen@altera.com> Cc: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| * | arm: lds: Remove libgcc eabi exception handling tablesMichal Simek2013-09-05-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove ARM eabi exception handling tables (for frame unwinding). AFAICT, u-boot stubs away the frame unwiding routines, so the tables will more or less just consume space. It should be OK to remove them. Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-05-33/+460
| |\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: drivers/serial/serial.c The conflict above was a trivial case of adding one init function in each branch, and manually resolved in merge.
| | * | i.MX6: Set and clear the gating bits for Phase Fractional DividersEric Nelson2013-08-31-0/+28
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This addresses silicon errata ERR006282 as described in this document: https://community.freescale.com/docs/DOC-94581 Also implemented in Freescale's 2009.08-based release: http://git.freescale.com/git/cgit.cgi/imx/uboot-imx.git/ Commit id: b7c5badf94ffbe6cd0845efbb75e16e05e3af404 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | i.MX6: Correct ANATOP_PFD (Phase Fractional Divider) register declarationsEric Nelson2013-08-31-23/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some _CLKGATE_MASK and _FRAC_MASK macros were wrong for PFD_480 and the PFD_528 macros were missing. Fortunately, the incorrect macros weren't being used. Since both the PFD_480 and PFD_528 registers have the same structure, and the fields are identical for [0..3] in bytes [0..3], so a single set of macros will suffice. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | i.MX6: Add convenience macros cpu_type(rev) and is_cpu_type(cpu)Eric Nelson2013-08-31-0/+7
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * | ARM: mxs: rename function that sets AUTO_RESTART flagHector Palacios2013-08-31-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The AUTO_RESTART flag of HW_RTC_PERSISTENT0 register will power up the chip automatically 180ms after power down. This bit must be enabled by the boot loader to ensure the target can start upon hardware reset or watchdog reset even when powered from a battery. Currently the function named 'mxs_power_clear_auto_restart()' is setting this flag although the 'clear' in its name suggest the opposite. This patch renames the function to 'mxs_power_set_auto_restart()' and removes the comment about EVK revision A which was confusing because the function indeed was setting the flag. Signed-off-by: Hector Palacios <hector.palacios@digi.com>
| | * | ARM: mxs: tools: Add mkimage support for MXS bootstreamMarek Vasut2013-08-31-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add mkimage support for generating and verifying MXS bootstream. The implementation here is mostly a glue code between MXSSB v0.4 and mkimage, but the long-term goal is to rectify this and merge MXSSB with mkimage more tightly. Once this code is properly in U-Boot, MXSSB shall be deprecated in favor of mkimage-mxsimage support. Note that the mxsimage generator needs libcrypto from OpenSSL, I therefore enabled the libcrypto/libssl unconditionally. MXSSB: http://git.denx.de/?p=mxssb.git;a=summary The code is based on research presented at: http://www.rockbox.org/wiki/SbFileFormat Signed-off-by: Marek Vasut <marex@denx.de> Cc: Tom Rini <trini@ti.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br>
| | * | imx: add status reporting for HAB statusStefano Babic2013-08-31-4/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add functions to report the HAB (High Assurance Boot) status of e.g. i.MX6 CPUs. This is taken from git://git.freescale.com/imx/uboot-imx.git branch imx_v2009.08_3.0.35_4.0.0 cpu/arm_cortexa8/mx6/generic.c include/asm-arm/arch-mx6/mx6_secure.h Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | ARM: mxs: Added application UART driverAndreas Wass2013-08-21-0/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver makes it possible to use an application UART as the U-Boot output console for Freescale i.MX23/i.MX28 devices. Signed-off-by: Andreas Wass <andreas.wass@dalelven.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
| * | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-22/+177
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| | * | | arm, am335x: add watchdog supportHeiko Schocher2013-08-28-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add TI OMAP 16xx & 24xx/34xx 32KHz (non-secure) watchdog support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@ti.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net>
| | * | | arm, am335x: add some missing registers and defines for lcd and epwm supportHeiko Schocher2013-08-28-1/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add missing register defines in struct cm_perpl epwmss0clkctrl epwmss2clkctrl lcdcclkstctrl - add missing register defines in struct cm_dpll clklcdcpixelclk - add struct pwmss_regs - add struct pwmss_ecap_regs - add LCD Controller base LCD_CNTL_BASE - add PWM0 controller base PWMSS0_BASE Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Tom Rini <trini@ti.com>
| | * | | arm, am33xx: add defines for gmii_sel_register bitsHeiko Schocher2013-08-28-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Acked-by: Mugunthan V N <mugunthanvnm@ti.com>
| | * | | omap5: Expand CONFIG_SPL_MAX_SIZE and comment upon SRAM_SCRATCH_SPACE_ADDRTom Rini2013-08-28-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After examining both TRMs and doing some experimentation, we can rely on using the start of the download area for CONFIG_SPL_TEXT_BASE and then move SRAM_SCRATCH_SPACE_ADDR up, just like am335x. This is required for peripheral boot modes such as UART. Signed-off-by: Tom Rini <trini@ti.com>
| | * | | am33xx: Correct and expand comments on CONFIG_SPL_MAX_SIZETom Rini2013-08-28-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We had been allowing the max size to be larger than actually allowed by the ROM. Expand the commentary here to explain why we set these locations. Signed-off-by: Tom Rini <trini@ti.com>
| | * | | arm: omap3: fix SRAM copy and execution sequenceAlbert ARIBAUD2013-08-28-11/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix size calculation in copy of go_to_speed into SRAM. Use SRAM_CLK_CODE in call to SRAM-based go_to_speed. Signed-off-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
| | * | | ARM: OMAP4470: Add Elpida EDB8164B3PF memory configurationLubomir Popov2013-08-28-7/+34
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4470 SDP SoM has EDB8164B3PF PoP memory on board. This memory has 4Gb x 2CS = 8Gb configuration. Add configuration for runtime calculation and precalculated cases. Patch is based on a draft Lubomir's patch [1]. [1] http://lists.denx.de/pipermail/u-boot/2013-April/150851.html Signed-off-by: Lubomir Popov <lpopov@mm-sol.com> [taras@ti.com: cleaned up patch and fixed precalculated values] Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | | ARM: OMAP4470: Add voltage and dpll dataTaras Kondratiuk2013-08-28-1/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | OMAP4470 reference design uses TWL6032 PMIC with a following connection scheme: VDD_CORE = TWL6032 SMPS2 VDD_MPU = TWL6032 SMPS1 VDD_IVA = TWL6032 SMPS5 Set voltage and frequency values according to OMAP4470 Data Manual Operating Condition Addendum v0.7 Signed-off-by: Taras Kondratiuk <taras@ti.com>
| | * | | ARM: OMAP4470: Add OMAP4470 identificationTaras Kondratiuk2013-08-28-0/+5
| | | |/ | | |/| | | | | | | | | Signed-off-by: Taras Kondratiuk <taras@ti.com>
| * | | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-09-04-3/+32
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| | * | | arm: sama5d3: fix smc cs related registers offsetBo Shen2013-08-22-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the smc cs related registers start at 0x600 and loop with 5 registers so the reserved register should be in at91_smc structure while no in at91_cs structure. So fix it Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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