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* am33xx: Move the call to ddr_pll_config, make it take the frequencyTom Rini2012-09-01-3/+5
| | | | | | | | Depending on if we have DDR2 or DDR3 on the board we will need to call ddr_pll_config with a different value. This call can be delayed slightly to the point where we know which type of memory we have. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Pass to config_ddr the type of memory that is connectedTom Rini2012-09-01-20/+31
| | | | | | | | | We need to pass in the type of memory that is connected to the board. The only reliable way to do this is to know what type of board we are running on (which later will be knowable in s_init()). For now, pass in the value of DDR2. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Make config_cmd_ctrl / config_ddr_data take const structsTom Rini2012-09-01-61/+48
| | | | | | | | | Rework the EMIF4/DDR code slightly to setup the structs that config_cmd_ctrl and config_ddr_data take to be setup at compile time and mark them as const. This lets us simplify the calling path slightly as well as making it easier to deal with DDR3. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Rework DDR2 EMIF initalization slightlyTom Rini2012-09-01-15/+2
| | | | | | | With the previous bugfix we now don't need to set two different REF_CTRL values and instead set the final value. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Bugfix to config_sdram()Tom Rini2012-09-01-2/+1
| | | | | | | When we change SDRAM_CONFIG this triggers a refresh based on all of the parameters that we have programmed so we must do this last. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Remove extra check in enable_ddr_clocksTom Rini2012-09-01-5/+0
| | | | | | | We do not need to check for EMIF_GCLK and L3_GCLK being active. This was a hold-over from bringup and no longer required. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Convert to using <asm/emif.h> to describe the EMIFTom Rini2012-09-01-41/+15
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Remove DMM_BASE defineTom Rini2012-09-01-1/+0
| | | | | | The am33xx does not have a DMM, so don't define the base. Signed-off-by: Tom Rini <trini@ti.com>
* am33xx: Enable gpio0 clockTom Rini2012-09-01-0/+4
| | | | Signed-off-by: Tom Rini <trini@ti.com>
* OMAP3: mem: Add Numonyx OneNAND 200MHz timing informationJavier Martinez Canillas2012-09-01-0/+29
| | | | Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org>
* am33xx: pin mux defintions for CPSW switchChandan Nath2012-09-01-0/+2
| | | | | | | | | This patch adds pin mux settings for CPSW switch found on TI AM335X based boards (MII and RGMII modes). Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split pinmux into separate patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* am33xx: CPSW init and definitionsChandan Nath2012-09-01-1/+23
| | | | | | | | | This patch adds platform-specific initialization for CPSW switch on TI AM33XX SoCs. Signed-off-by: Chandan Nath <chandan.nath@ti.com> [Ilya: split init out of original patch] Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* arm/davinci/da850: add uart0 pinmuxMikhail Kshevetskiy2012-09-01-0/+7
| | | | | Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Tested-by: Sughosh Ganu <urwithsughosh@gmail.com>
* arm/davinci: fix DDR2/mDDR memory controller initialization for Omap L138Mikhail Kshevetskiy2012-09-01-7/+20
| | | | | | | | | follow section 15.2.13.1 (Initializing Following Device Power Up or Reset) of OMAP-L138 DSP+ARM Processor Technical Reference Manual Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@gmail.com> Acked-by: Christian Riesch <christian.riesch@omicron.at> Tested-by: Christian Riesch <christian.riesch@omicron.at>
* Revert "arm: armv7: add compile option -mno-unaligned-access if available"Albert ARIBAUD2012-09-01-2/+0
| | | | | | This reverts commit 5347560f5427bcdd48a563b62180481606ac8044, which was applied only to get release 2012.07 functional on as many ARM targets as possible despite mis-aligned accesses.
* omap: am335x_evm: enable i2c1 channelSteve Sakoman2012-09-01-0/+5
| | | | | | | This patch sets up pinmux, enables fclk, and defines CONFIG_I2C_MULTI_BUS Signed-off-by: Steve Sakoman <steve@sakoman.com>
* da850/omap-l138: Add support to read u-boot image from MMC/SDLad, Prabhakar2012-09-01-0/+5
| | | | | | | | | | | | | | | DA850/OMAP-L138 does not support strict MMC/SD boot mode. SPL will be in SPI flash and U-Boot image will be in MMC/SD card. SPL will do the low level initialization and then loads the u-boot image from MMC/SD card. Define CONFIG_SPL_MMC_LOAD macro in the DA850/OMAP-L138 configuration file to enable this feature. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* arm, davinci: perform check for initializing global data and serial initLad, Prabhakar2012-09-01-6/+9
| | | | | | | | | | | initialize baudrate, flags, data and serial initialization, only when CONFIG_SPL_LIBCOMMON_SUPPORT is defined. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com> Acked-by: Christian Riesch <christian.riesch@omicron.at>
* da850/omap-l138: Add MMC support for DA850/OMAP-L138Lad, Prabhakar2012-09-01-0/+15
| | | | | | | | | This patch adds support for MMC/SD on DA850/OMAP-L138. Tested-by: Christian Riesch <christian.riesch@omicron.at> Signed-off-by: Lad, Prabhakar <prabhakar.lad@ti.com> Signed-off-by: Rajashekhara, Sudhakar <sudhakar.raj@ti.com> Signed-off-by: Hadli, Manjunath <manjunath.hadli@ti.com>
* omap: am33xx: enable gpio supportSteve Sakoman2012-09-01-1/+75
| | | | | | | | | | | This patch uses the code in omap-common to support gpio modules 1-3 on am33xx based boards. It adds base address and register definitions, enables clocks to the modules, and enables building the common gpio code for CONFIG_AM33XX as well as CONFIG_OMAP Signed-off-by: Steve Sakoman <steve@sakoman.com>
* Consolidate bootcount code into drivers/bootcountStefan Roese2012-09-01-218/+1
| | | | | | | | | | | | | | | | | | | This patch moves all bootcount implementations into a common directory: drivers/bootcount. The generic bootcount driver is now usable not only by powerpc platforms, but others as well. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Heiko Schocher <hs@denx.de> Cc: Valentin Longchamp <valentin.longchamp@keymile.com> Cc: Christian Riesch <christian.riesch@omicron.at> Cc: Manfred Rudigier <manfred.rudigier@omicron.at> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de> Tested-by: Valentin Longchamp <valentin.longchamp@keymile.com> Tested-by: Christian Riesch <christian.riesch@omicron.at> Acked-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* mpc5xxx: add GPIO port configurationAnatolij Gustschin2012-09-01-0/+14
| | | | | | | Add posibility for board specifig GPIO configurations using various CONFIG_SYS_ macros. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* sh: tmu: Removed arch/sh/include/asm/clk.hNobuhiro Iwamatsu2012-08-21-31/+0
| | | | | | | | | asm/clk.h was included get_peripheral_clk_rate function. But this is not used from anywhere. This removed asm/clk.h, and deleted include line from arch/sh/lib/time.c Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* sh: tmu: Changed switch statement to shift operationNobuhiro Iwamatsu2012-08-21-30/+18
| | | | | | | | | Calculation of the bit position using switch statement can substitute shift operation using ffs. And removed unsed macro and variable. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* sh: tmu: Changed TMU driver using array of structuresNobuhiro Iwamatsu2012-08-21-151/+26
| | | | | | | | | This changed into access using array of structure from access to the register using the definition of the register by macro. And removed white space. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* nds32: fix unused pmu_init warningMike Frysinger2012-08-11-0/+2
| | | | | | | | | | | Fixes the build-time warning: board.c: At top level: board.c:106: warning: 'pmu_init' defined but not used This makes the ifdef logic at the call site match the logic at the function definition. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* nds32: delete unused local variableMike Frysinger2012-08-11-1/+0
| | | | | | | | Fixes the build-time warning: board.c: In function 'board_init_r': board.c:304: warning: unused variable 's' Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* nds32: drop bi_enetaddr from global dataMike Frysinger2012-08-11-1/+0
| | | | | | | Nothing is using this, so punt it from the gd. Seems to just be a copy & paste wart from the initial port. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* openrisc: Work around potential relocation issuesJulius Baxter2012-08-09-6/+13
| | | | | | | | | | When reset code is in flash, the jump instructions emitted by the compiler are relative instead of absolute jumps. A fix to the reset code to make correct jumps to the beginning of code relocated to RAM have also been added. Signed-off-by: Julius Baxter <juliusbaxter@gmail.com>
* powerpc: Fix declaration type for I/O functionsPrabhakar Kushwaha2012-08-09-10/+10
| | | | | | | | | Prototype declaration of I/O operation functions are not correct. as both 'extern' and function definition are at same place. Chage protoype declaration as static. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* powerpc:Fix return type & parameter passed for I/O functionsPrabhakar Kushwaha2012-08-09-15/+15
| | | | | | | | | | | | Return type of in_8, in_be16 and in_le16 should not be'int'. Update it to type u8/u16/u32. Although 'unsigned' for in_be32 and in_le32 is correct. But to make return type uniform across the file changed to u32 Similarly, parameter passed to out_8, out_be16, out_le16 ,out_be32 & out_le32 should not be 'int'.Change it to type u8/u16/u32. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
* global_data: unify global flag definesMike Frysinger2012-08-09-181/+14
| | | | | | | All the global flag defines are the same across all arches. So unify them in one place, and add a simple way for arches to extend for their needs. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-08-09-22/+29
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNs powerpc/mpc85xx: Ignore E bit for BSC9130/1 powerpc/sgmii: To support PHY link state auto detect in SGMII mode powerpc/85xx: improve definition of BR_PHYS_ADDR macro powerpc/p2041: configure the CPLD lane_mux according to RCW powerpc/ddr: fix fsl_ddr_get_dimm_params compile error powerpc/corenet: fix compile error when CONFIG_SYS_NO_FLASH is defined powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GB powerpc/p1022ds: fix DIU/LBC switching with NAND enabled powerpc/p1022ds: add support for SPI and SD boot Signed-off-by: Wolfgang Denk <wd@denx.de>
| * powerpc/85xx: use CONFIG_SYS_FSL_PCIE_COMPAT macro when setting the PCI LIODNsTimur Tabi2012-08-08-14/+14
| | | | | | | | | | | | | | | | | | | | The SET_PCI_LIODN() macro takes a compatible property string as a parameter, so that it knows which PCI device tree node to look for. The calls to these macros are using a hard-coded string, but we already have the CONFIG_SYS_FSL_PCIE_COMPAT macro which contains the same string, so we should use that. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: Ignore E bit for BSC9130/1York Sun2012-08-08-2/+0
| | | | | | | | | | | | | | | | Commit 48f6a5c34 removed E bit. BSC9130/1 were left out due to patch apply timing. Remove them now. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/85xx: improve definition of BR_PHYS_ADDR macroTimur Tabi2012-08-08-3/+3
| | | | | | | | | | | | | | | | The BR_PHYS_ADDR(x) macro was missing parentheses around "x" in the macro definition, so callers had to supply their own parenthesis. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/ddr: fix fsl_ddr_get_dimm_params compile errorShaohui Xie2012-08-08-1/+1
| | | | | | | | | | | | | | | | | | | | fsl_ddr_get_dimm_params() should be wrapped by CONFIG_SYS_DDR_RAW_TIMING, otherwise, when using fixed_sdram() instead of using SPD, it will cause compile error. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Acked-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc8xxx: fix workaround for errata DDR111 and DDR134 for DDR over 4GBYork Sun2012-08-08-2/+11
| | | | | | | | | | | | | | | | | | The fix for errata workaround is to avoid covering physical address 0xff000000 to 0xffffffff during the implementation. Early commit eb672e92 works until DDR size exceeds 4GB. This fix works for DDR size up to 64GB. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | sh: modify checkcpu() for SH-4AYoshihiro Shimoda2012-08-08-0/+4
|/ | | | | | | | Even if using CPU is SH-4A, the previous code always put "SH4". This patch fixes it. Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* Merge branch 'master' of git://git.denx.de/u-boot-i2cWolfgang Denk2012-07-31-15/+289
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-i2c: km/common: remove printfs for i2c deblocking code CONFIG: SMDK5250: I2C: Enable I2C I2C: Add support for Multi channel I2C: Modify the I2C driver for EXYNOS5 I2C: Move struct s3c24x0_i2c to a common place. EXYNOS: PINMUX: Add pinmux support for I2C EXYNOS5: define EXYNOS5_I2C_SPACING EXYNOS: Add I2C base address. EXYNOS: CLK: Add i2c clock mx6qsabrelite: add i2c multi-bus support imx-common: add i2c.c for bus recovery support i.mx53: add definition for I2C3_BASE_ADDR i.mx: iomux-v3.c: move to imx-common directory i.mx: iomux-v3.h: move to imx-common include directory iomux-v3: remove include of mx6x_pins.h mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support mxc_i2c: add bus recovery support mxc_i2c: prep work for multiple busses support mxc_i2c: add i2c_regs argument to i2c_imx_stop mxc_i2c: add retries mxc_i2c: check for arbitration lost mxc_i2c: change slave addr if conflicts with destination. mxc_i2c: don't disable controller after every transaction mxc_i2c: place i2c_reset code inline mxc_i2c: place imx_start code inline mxc_i2c: remove redundant read mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into wait_for_sr_state mxc_i2c.c: code i2c_probe as a 0 length i2c_write mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write mxc_i2c: create i2c_init_transfer mxc_i2c: clear i2sr before waiting for bit mxc_i2c: create tx_byte function mxc_i2c: remove ifdef of CONFIG_HARD_I2C mxc_i2c: fix i2c_imx_stop i2c: deblock i2c bus also if accessed before realocation Signed-off-by: Wolfgang Denk <wd@denx.de>
| * I2C: Move struct s3c24x0_i2c to a common place.Rajeshwari Shinde2012-07-31-10/+0
| | | | | | | | | | | | | | | | | | | | struct s3c24x0_i2c is being moved to common local header file so that the same can be used by s3c series and exynos series SoCs. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * EXYNOS: PINMUX: Add pinmux support for I2CRajeshwari Shinde2012-07-31-0/+60
| | | | | | | | | | | | | | This patch adds pinmux code for I2C. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * EXYNOS5: define EXYNOS5_I2C_SPACINGRajeshwari Shinde2012-07-31-0/+2
| | | | | | | | | | | | | | | | This patch defined EXYNOS5_I2C_SPACING used to calculate I2C channel base address. Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * EXYNOS: Add I2C base address.Rajeshwari Shinde2012-07-31-0/+3
| | | | | | | | | | | | | | | | This patch adds the base address for I2C. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * EXYNOS: CLK: Add i2c clockRajeshwari Shinde2012-07-31-0/+34
| | | | | | | | | | | | | | | | | | This adds i2c clock information for EXYNOS5. Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com> Acked-by: Simon Glass <sjg@chromium.org>
| * imx-common: add i2c.c for bus recovery supportTroy Kisky2012-07-31-1/+186
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * i.mx53: add definition for I2C3_BASE_ADDRTroy Kisky2012-07-31-0/+1
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * i.mx: iomux-v3.c: move to imx-common directoryTroy Kisky2012-07-31-2/+2
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * i.mx: iomux-v3.h: move to imx-common include directoryTroy Kisky2012-07-31-2/+2
| | | | | | | | Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com>
| * iomux-v3: remove include of mx6x_pins.hTroy Kisky2012-07-31-1/+0
| | | | | | | | | | | | | | This include is not needed. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Acked-by: Jason Liu <r64343@freescale.com>
generated by cgit v1.1 at 2024-11-11 22:56:43 +0000