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* armv7: Add ST-Ericsson u8500 archJohn Rigby2011-06-01-0/+767
| | | | | | | | Based on ST-Ericsson internal git repo. Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org> Signed-off-by: John Rigby <john.rigby@linaro.org> CC: Albert Aribaud <albert.aribaud@free.fr>
* S5PC2XX: clock: support pwm clock for evt1 (cpu revision 1)Minkyu Kang2011-05-26-20/+26
| | | | | | | The source of pwm clock is fixed at evt1. And some registers for pwm clock are removed. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: add set_mmc_clk for external clock controlJaehoon Chung2011-05-26-0/+41
| | | | | | | | | | | This patch added set_mmc_clk for external clock control. c210 didn't support host clock control. So We need external_clock_control function for c210. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5PC2XX: Support the cpu revisionMinkyu Kang2011-05-26-1/+13
| | | | | | | | S5PC210 SoC have two cpu revisions, and have some difference. So, support the cpu revision for each revision. Signed-off-by: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* S5P:SROM config code moved to s5p-common directoryChander Kashyap2011-05-26-17/+68
| | | | | | | | | SROM config code is made common for S5P series of boards. smdkc100.c now refers to s5p-common/sromc.c for SROM related subroutines. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* S5P: GPIO Macro Values Corrected.Chander Kashyap2011-05-26-6/+5
| | | | | | | | S5PC2XX: Macro values for Pull Up and Driver Strength were wrong. S5PC1XX: Macro values for Driver Strength were wrong. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* MX31: drop warnings due to missing prototype for mxc_watchdog_reset()Stefano Babic2011-05-23-0/+1
| | | | Signed-off-by: Stefano Babic <sbabic@denx.de>
* MX31: Make get_reset_cause() static and drop unreachable codeStefano Babic2011-05-23-5/+1
| | | | | | | | get_reset_cause() should not be exported. Drop code in the function after return statement that can generate warnings due to unreachable code. Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MX53: Handle silicon revision 2.1 caseFabio Estevam2011-05-23-7/+3
| | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* Minor coding style cleanup.Wolfgang Denk2011-05-19-4/+2
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2011-05-18-859/+753
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (40 commits) avr32: add ATAG_BOARDINFO at91: reworked support for otc570 board at91: reworked support for meesc board hammerhead: move CONFIG_SYS_TEXT_BASE to header mimc200: move CONFIG_SYS_TEXT_BASE to header favr-32-ezkit: move CONFIG_SYS_TEXT_BASE to header atstk100x: move CONFIG_SYS_TEXT_BASE to header atngw100: move CONFIG_SYS_TEXT_BASE to header mimc200: fix "#define XXXX 1" hammerhead: fix "#define XXXX 1" favr-32-ezkit: fix "#define XXXX 1" atstk1006: fix "#define XXXX 1" atstk1004: fix "#define XXXX 1" atstk1003: fix "#define XXXX 1" atstk1002: fix "#define XXXX 1" atngw100: fix "#define XXXX 1" avr32: use single linker script avr32/config.mk: simplify PLATFORM_RELFLAGS avr32: fix linking Add support for Bluewater Systems Snapper 9260 and 9G20 modules ...
| * avr32: add ATAG_BOARDINFOAndreas Bießmann2011-05-18-0/+19
| | | | | | | | | | | | | | | | | | This patch adds a new ATAG_BORADINFO to U-Boot. This tag is intended to hand over the bd->bi_board_number to the linux kernel for early stage board information like a board revision or other kind of board specific decisions necessary before the linux peripherial drivers are up. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| * avr32: use single linker scriptAndreas Bießmann2011-05-18-0/+74
| | | | | | | | | | | | | | This patch move the atstk100x linker script to $(CPUDIR) and delete other pure copies of this file in each board directory. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| * avr32/config.mk: simplify PLATFORM_RELFLAGSAndreas Bießmann2011-05-18-0/+2
| | | | | | | | | | | | | | This patch removes PLATFORM_RELFLAGS from board specific config.mk files and define them in arch specific config.mk file. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| * avr32: fix linkingAndreas Bießmann2011-05-18-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch fixes following error: ---8<--- avr32-linux-ld: --gc-sections and -r may not be used together --->8--- Since 8aba9dceebb14144e07d19593111ee3a999c37fc all avr32 boards are broken due to linking error as seen above. Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| * at91: fixed at91sam9263 system fileDaniel Gorsulowski2011-05-18-37/+18
| | | | | | | | Signed-off-by: Daniel Gorsulowski <Daniel.Gorsulowski@esd.eu>
| * remove __attribute__ ((packed)) in at91 headersJens Scharsig2011-05-18-8/+8
| | | | | | | | | | | | | | * remove __attribute__ ((packed)) to prevent byte access to soc registers in some gcc version Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de>
| * at91rm9200: fix lowlevel_init() SMRDATA sizeJens Scharsig2011-05-18-2/+6
| | | | | | | | | | | | | | * use start/end label for initialization tables instead of fix values Signed-off-by: Jens Scharsig <js_at_ng@scharsoft.de> Acked-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * AT91: fix timer.c - remove reset_timer()Reinhard Meyer2011-05-18-16/+11
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: remove LEGACY from at91_rstc.hReinhard Meyer2011-05-18-25/+0
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: change includes from asm/arch/io.h to asm/io.hReinhard Meyer2011-05-18-51/+7
| | | | | | | | | | | | and remove the now unused asm/arch-at91/io.h Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: cleanup at91sam9260_matrix.h to struct SoC accessReinhard Meyer2011-05-18-57/+45
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: fix related at91 system/driver filesReinhard Meyer2011-05-18-51/+33
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: fix related arch-at91 header filesReinhard Meyer2011-05-18-29/+15
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: cleanup hardware.h, remove memory-map.hReinhard Meyer2011-05-18-100/+32
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: rework at91sam9g45.hReinhard Meyer2011-05-18-118/+107
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: rework at91sam9263.hReinhard Meyer2011-05-18-118/+100
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: rework at91sam9261.hReinhard Meyer2011-05-18-85/+102
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * AT91: rework at91sam9260.hReinhard Meyer2011-05-18-120/+132
| | | | | | | | Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
| * avr32: fixup definitions to ATMEL_BASE_xxxAndreas Bießmann2011-05-18-56/+56
| | | | | | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
| * avr32: rename memory-map.h -> hardware.hAndreas Bießmann2011-05-18-8/+8
| | | | | | | | Signed-off-by: Andreas Bießmann <biessmann@corscience.de>
* | nios2: Make STANDALONE_LOAD_ADDR configurable per boardThomas Chou2011-05-16-1/+1
|/ | | | | | | | | | | Follow commit 8ae86b76c648d8bef97241c78e2fddb1c4f164d3 which changed the variable name. Fix this error, nios2-elf-ld: invalid hex number `-o' Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* powerpc/mpc8xxx: reword max tCKmin messageYork Sun2011-05-13-3/+3
| | | | | | | | Reword "The DIMM max tCKmin is ..." to "The DDR clock is faster than the slowest DIMM(s) can support". Fixed interger type in printf as well. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: fix compatible property for the L2 cache nodeTimur Tabi2011-05-13-10/+19
| | | | | | | | | The compatible property for the L2 cache node (on 85xx systems that don't have a CPC) was using a value for the property length that did not match the actual length of the property. Signed-off-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-05-12-0/+100
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| * PPC405EX CHIP_21 erratumSteven A. Falco2011-05-12-0/+100
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | APM errata CHIP_21 for the 405EX/EXr (from the rev 1.09 document dated 4/27/11) states that rev D processors may wake up with the wrong feature set. This patch implements the APM-proposed workaround. To enable this patch for your board, add the appropriate define for your CPU to your board header file. See kilauea.h for more information. The following variants are supported: #define CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_NO_SECURITY #define CONFIG_SYS_4xx_CHIP_21_405EXr_SECURITY Please note that if you select the wrong define, your board will not boot, and JTAG will be required to recover. Tested on custom boards using: CONFIG_SYS_4xx_CHIP_21_405EX_NO_SECURITY <sfalco@harris.com> CONFIG_SYS_4xx_CHIP_21_405EX_SECURITY <eibach@gdsys.de> Signed-off-by: Steve Falco <sfalco@harris.com> Acked-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Kirkwood: allow to override CONFIG_SYS_TCLKSimon Guinot2011-05-11-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch allow to override CONFIG_SYS_TCLK from board configuration files. This is needed for the Network Space v2 which use a non standard core clock frequency (166MHz instead of 200MHz for a 6281 SoC). As a possible enhancement for 6281 and 6282 devices, TCLK could be dynamically detected by checking the Sample at Reset register bit 21. Additionally this patch fix a typo. Signed-off-by: Simon Guinot <sguinot@lacie.com> Acked-by: Prafulla Wadaskar <Prafulla@marvell.com>
* | MX31: change return value of get_cpu_revStefano Babic2011-05-11-14/+19
| | | | | | | | | | | | | | | | | | | | Drop warnings in get_cpu_rev and changes the return value (a u32 instead of char * is returned) of the function to be coherent with other processors. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundel <dzu@denx.de> CC: Fabio Estevam <fabio.estevam@freescale.com>
* | MX31: removed warning due to missing prototypeStefano Babic2011-05-11-0/+1
|/ | | | | | | Drop warning caused by missing prototype for mxc_hw_watchdog_reset(). Signed-off-by: Stefano Babic <sbabic@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsWolfgang Denk2011-05-10-208/+95
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| * MIPS: Move timer code to arch/mips/cpu/$(CPU)/Shinya Kuribayashi2011-05-10-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Current timer routines (arch/mips/lib/timer.c) are implemented assuming that MIPS32 coprocessor (CP0) resources, Counter and Compare registers in this case, are available. But this doesn't always work. We need to make sure that all MIPS-based systems don't necessarily use CP0 counter/compare registers as time keeping resources. And some MIPS variant processors might come with different hardware specs with genuine MIPS32 CP0 registers. With this change, each $(CPU)/ directory can have its own timer code. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * MIPS: Introduce --gc-sections for MIPSDaniel Schwierzeck2011-05-10-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | All architectures but MIPS are using --gc-sections on final linking. This patch introduces that feature for MIPS to reduce the memory and flash footprint. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Thomas Lange <thomas@corelatus.se> Cc: Vlad Lungu <vlad.lungu@windriver.com> Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * MIPS: Coding style cleanups on common assembly filesShinya Kuribayashi2011-05-07-107/+93
| | | | | | | | | | | | | | | | | | | | Fix style issues and alignments globally. No logical changes. - Replace C comments with AS line comments where possible - Use ifndef where possible, rather than if !defined for simplicity - An instruction executed in a delay slot is now indicated by a leading space, not by C comment Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
| * MIPS: Remove mips_cache_lock() featureShinya Kuribayashi2011-05-07-100/+0
| | | | | | | | | | | | | | | | | | As requested in commit e1390801a3c1a2b6d12fa90be368efc19f5b9bfd ([MIPS] Request for the 'mips_cache_lock()' removal), such feature is no longer needed for current MIPS implementation of U-Boot, and no one in the tree uses it for years. Signed-off-by: Shinya Kuribayashi <skuribay@pobox.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-05-10-3/+1
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| * mpc83xx: restrict UTMI PHY configuration to 831x partsKim Phillips2011-04-04-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | i.e, to those parts that have PHY_CLK_VALID bits in their USB CONTROL registers: mpc8308 WU_INT, PHY_CLK_SEL, USB_EN, WU_INT_EN, ULPI_INT_EN mpc831x PHY_CLK_VALID, WU_INT, CLKIN_SEL, PHY_CLK_SEL, UTMI_PHY_EN, PLL_RESET, REFSEL, OTG_PORT, KEEP_OTG_ON, LSF_EN, USB_EN, ULPI_INT_EN mpc834x USB_EN, ULPI_INT1_EN (MPH only), ULPI_INT0_EN mpc837x USB_EN, ULPI_INT_EN (mpc832x, mpc8360 don't have a USB_EHCI_FSL compatible controller) this prevents non-831x parts from never completing cpu_init_f(), because the (non-existent) PHY_CLK_VALID bit never gets set. Reported-by: Andre Schwarz <andre.schwarz@matrix-vision.de> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Tested-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-04-30-57/+518
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| * | fsl-ddr: Fix mixed-case macro namesKyle Moffett2011-04-29-9/+9
| | | | | | | | | | | | | | | Signed-off-by: Kyle Moffett <Kyle.D.Moffett@boeing.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc: eSPI and eSPI controller supportMingkai Hu2011-04-29-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Mingkai Hu <Mingkai.hu@freescale.com> Singed-off-by: Jerry Huang <Chang-Ming.Huang@freescale.com> Signed-off-by: Shaohui Xie <b21989@freescale.com> Cc: Mike Frysinger <vapier@gentoo.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Change timebase divisor to be defined per processorKumar Gala2011-04-28-5/+12
| | | | | | | | | | | | | | | | | | | | | | | | Introduce new CONFIG_SYS_FSL_TBCLK_DIV on 85xx platforms because different SoCs have different divisor amounts. All the PQ3 parts are /8, the P4080/P4080 is /16, and P2040/P3041/P5020 are /32. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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