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| * | | | x86: Emit post codes in startup code for ChromebooksSimon Glass2014-11-21-1/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On x86 it is common to use 'post codes' which are 8-bit hex values emitted from the code and visible to the user. Traditionally two 7-segment displays were made available on the motherboard to show the last post code that was emitted. This allows diagnosis of a boot problem since it is possible to see where the code got to before it died. On modern hardware these codes are not normally visible. On Chromebooks they are displayed by the Embedded Controller (EC), so it is useful to emit them. We must enable this feature for the EC to see the codes, so add an option for this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Build a .rom file which can be flashed to an x86 machineSimon Glass2014-11-21-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On x86 machines U-Boot needs to be added to a large ROM image which is then flashed onto the target board. The ROM has a particular format so it makes sense for U-Boot to build this image automatically. Unfortunately it relies on binary blobs so we cannot require this for the default build as yet. Create a u-boot.rom output file for this purpose. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Add chromebook_link boardSimon Glass2014-11-21-0/+298
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board is a 'bare' version of the existing 'link 'board. It does not require coreboot to run, but is intended to start directly from the reset vector. This initial commit has place holders for a wide range of features. These will be added in follow-on patches and series. So far it cannot be booted as there is no ROM image produced, but it does build without errors. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Allow timer calibration to work on ivybridgeSimon Glass2014-11-21-11/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately MSR_FSB_FREQ is not available on this CPU, and the PIT method seems to take up to 50ms which is much too long. For this CPU we know the frequency, so add another special case for now. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-21-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The references of CONFIG_SYS_COREBOOT in arch/x86/cpu/coreboot/Makefile are redundant because the build system descends into the directory only when CONFIG_SYS_COREBOOT is defined. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Replace fill_processor_name() with cpu_get_name()Simon Glass2014-11-21-15/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This implementation has a 'cpu' prefix and returns a pointer to the string, avoiding the need for copying. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Remove unnecessary find_fdt(), prepare_fdt() functionsSimon Glass2014-11-21-29/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These are no-longer needed so drop them. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Add processor functions to halt and get stack pointerSimon Glass2014-11-21-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a function to get the stack pointer and another to halt the CPU. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Fix a warning with gcc 4.4.4Simon Glass2014-11-21-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This warning appears even though it seems that the compiler could work it out. Fix it. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Save TSC frequency in the global dataBin Meng2014-11-21-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Return the saved TSC frequency in get_tbclk_mhz(). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Add quick TSC calibration via PITBin Meng2014-11-21-0/+159
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use the same way that Linux does for quick TSC calibration via PIT when calibration via MSR fails. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Do TSC MSR calibration only for known/supported CPUsBin Meng2014-11-21-7/+108
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Using MSR_PLATFORM_INFO (0xCE) to calibrate TSR will cause #GP on processors which do not have this MSR. Instead only doing the MSR calibration for known/supported CPUs. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * | | | x86: Do CPU identification in the early phaseBin Meng2014-11-21-47/+398
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The CPU identification happens in x86_cpu_init_f() and corresponding fields are saved in the global data for later use. Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Save the BIST value on resetSimon Glass2014-11-21-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The built in self test value is available in register eax on start-up. Save it so that it can be accessed later. Unfortunately we must wait until the global_data is available before we can do this, so there is a little bit of shuffling to keep it around. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Fix up some missing prototypesSimon Glass2014-11-21-8/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some functions are missing prototypes. Fix those that are specific to x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Use the standard arch_cpu_init() functionSimon Glass2014-11-21-7/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of an x86-specific cpu_init_f() function, use the normal U-Boot one for this purpose. Also remove a useless/misleading comment. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Use the standard dram_init() functionSimon Glass2014-11-21-9/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Instead of having an x86-specific DRAM init function, adjust things so we can use the normal one. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Tidy up global descriptor table setupSimon Glass2014-11-21-3/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code is a little muddled, so tidy it up. Make sure that we put the GDT in the right place and set it up properly. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Invalidate TLB as early as possibleSimon Glass2014-11-21-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We should invalidate the TLB right at the start to ensure that we don't get false address translations even though paging is disabled. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Remove board_init16() call which is not usedSimon Glass2014-11-21-9/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This allows a board to do very early init, but no boards need to do this. We may as well drop this feature. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | | | x86: Remove REALMODE_BASE which is no longer usedSimon Glass2014-11-21-1/+0
| |/ / / | | | | | | | | | | | | | | | | | | | | | | | | This was missed when the real mode support was dropped. Remove it. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
* | | | sandbox: Prepare API change for files greater than 2GBSuriyan Ramasami2014-11-23-10/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change the internal sandbox functions to use loff_t for file offsets. Signed-off-by: Suriyan Ramasami <suriyan.r@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | tegra: do not descend into empty directoriesMasahiro Yamada2014-11-23-54/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some tegra makefiles only contain a dummy line to generate a built-in.o. Let's do not descend into such directories. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
* | | | kbuild: use SoC-specific CONFIG to descend into SoC directoryMasahiro Yamada2014-11-23-14/+60
| | | | | | | | | | | | | | | | | | | | | | | | Use "obj-$(CONFIG_FOO) += foo/" where it is possible. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | x86: use CONFIG_SYS_COREBOOT to descend into coreboot/ directoryMasahiro Yamada2014-11-23-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The references of CONFIG_SYS_COREBOOT in arch/x86/cpu/coreboot/Makefile are redundant because the build system descends into the directory only when CONFIG_SYS_COREBOOT is defined. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Acked-by: Simon Glass <sjg@chromium.org>
* | | | kbuild: Descend into SOC directory from CPU directoryMasahiro Yamada2014-11-23-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some CPUs of some architectures have SOC directories. At present, the build system directly descends into SOC directories from the top Makefile, but it should generally descend into each directory from its parent directory. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | ARM: bcm: Enable five Cygnus boardsSteve Rae2014-11-23-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | bcm911360_entphn bcm911360_entphn-ns bcm911360k bcm958300k-ns bcm958305k - updates to support Cygnus and NSP board families better - add functions so CONFIG_ARMV7_NONSEC can be enabled on Cygnus boards Signed-off-by: Steve Rae <srae@broadcom.com>
* | | | linux/kernel.h: sync min, max, min3, max3 macros with LinuxMasahiro Yamada2014-11-23-27/+37
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has never cared about the type when we get max/min of two values, but Linux Kernel does. This commit gets min, max, min3, max3 macros synced with the kernel introducing type checks. Many of references of those macros must be fixed to suppress warnings. We have two options: - Use min, max, min3, max3 only when the arguments have the same type (or add casts to the arguments) - Use min_t/max_t instead with the appropriate type for the first argument Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Pavel Machek <pavel@denx.de> Acked-by: Lukasz Majewski <l.majewski@samsung.com> Tested-by: Lukasz Majewski <l.majewski@samsung.com> [trini: Fixup arch/blackfin/lib/string.c] Signed-off-by: Tom Rini <trini@ti.com>
* | | | include: move various macros to include/linux/kernel.hMasahiro Yamada2014-11-20-10/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot has imported various utility macros from Linux scattering them to various places without consistency. In include/common.h are min, max, min3, max3, ARRAY_SIZE, ALIGN, container_of, DIV_ROUND_UP, etc. In include/linux/compat.h are min_t, max_t, round_up, round_down, etc. We also have duplicated defines of min_t in some *.c files. Moreover, we are suffering from too cluttered include/common.h. This commit moves various macros that originate in include/linux/kernel.h of Linux to their original position. Note: This commit simply moves the macros; the macros roundup, min, max, min2, max3, ARRAY_SIZE are different from those of Linux at this point. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | replace DIV_ROUND with DIV_ROUND_CLOSESTMasahiro Yamada2014-11-20-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Linux-compatible macro DIV_ROUND_CLOSEST is a bit more flexible and safer than DIV_ROUND. For example, foo = DIV_ROUND_CLOSEST(x, y++) works expectedly, but foo = DIV_ROUND(x, y++) does not. (y is incremented twice.) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | ARM: remove CONFIG_ARM1136 definesMasahiro Yamada2014-11-20-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CPU_ARM1136 was introduced into Kconfig by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). This commit removes all the defines of CONFIG_ARM1136 and replaces the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM1136. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | ARM: remove CONFIG_ARM926EJS definesMasahiro Yamada2014-11-20-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CPU_ARM926EJS was introduced into Kconfig by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). This commit removes all the defines of CONFIG_ARM926EJS and replaces the only reference in arch/arm/lib/cache.c with CONFIG_CPU_ARM926EJS. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | ARM: remove CONFIG_ARM920T definesMasahiro Yamada2014-11-20-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | CONFIG_CPU_ARM920T was introduced into Kconfig by commit 2e07c249a67e (kconfig: arm: introduce symbol for ARM CPUs). This commit removes all the defines of CONFIG_ARM920T and replaces the only reference in drivers/usb/host/ohci-hcd.c with CONFIG_CPU_ARM920T. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | | | ARM: remove CONFIG_ARMV7 definesMasahiro Yamada2014-11-20-1/+0
|/ / / | | | | | | | | | | | | | | | | | | | | | Some (not all) of ARMv7 boards define CONFIG_ARMV7, which is useless. Besides, it is never referenced. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc5xxxTom Rini2014-11-19-0/+15
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| * | | powerpc: mpc52xx: Clear GD in the main U-Boot stage for SPL usageStefan Roese2014-11-19-0/+15
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When an MPC5200 based board is used with SPL support, the main U-Boot needs to clear the GD (global data) struct again. Otherwise the generic board init code in board_init_f (when CONFIG_SYS_GENERIC_BOARD is defined) will not initialize all GD variables correctly. Resulting in a hangup on the a4m2k board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
* | | mpc83xx: Add gdsys hrcon boardDirk Eibach2014-11-19-0/+4
|/ / | | | | | | | | | | | | | | | | | | | | | | | | The gdsys hrcon board is based on a Freescale MPC8308 SOC. It boots from NOR-Flash, kernel and rootfs are stored on SD-Card. On board peripherals include: - 1x GbE (optional) - Lattice ECP3 FPGA connected via eLBC and PCIe Signed-off-by: Dirk Eibach <dirk.eibach@gdsys.cc> Signed-off-by: Stefan Roese <sr@denx.de>
* | ARM: atmel: add sama5d4 xplained ultra board supportBo Shen2014-11-17-0/+5
| | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display (optional, disabled by default) - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: add sama5d4ek board supportBo Shen2014-11-17-9/+294
| | | | | | | | | | | | | | | | | | | | | | The code for this board supports following features: - Boot media support: NAND flash/SD card/SPI flash - Support LCD display - Support ethernet - Support USB mass storage Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, spl, at91: add spl support for the corvus boardHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91, spl: add spl support for the taurus boardHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | replaces the at91bootstrap code with SPL code. make the spl image with: ./tools/mkimage -T atmelimage -d spl/u-boot-spl.bin spl/boot.bin this writes the length of the spl image into the 6th execption vector. This is needed from the ROM bootloader. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, spl, at91: add at91sam9260 and at91sam9g45 spl supportHeiko Schocher2014-11-17-97/+430
| | | | | | | | | | | | | | | | | | | | | | add support for using spl code on at91sam9260 and at91sam9g45 based boards. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> [adopt Bo's change in spl.c] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: add missing ddr2 cr register MPDDRC_CR_EBISHARE defineHeiko Schocher2014-11-17-0/+1
| | | | | | | | | | | | Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: compile mpddrc ram init code also for AT91SAM9M10G45Heiko Schocher2014-11-17-2/+15
| | | | | | | | | | | | | | | | | | | | | | | | - compile mpddrc ram init code also for AT91SAM9M10G45 based boards. - in CONFIG_SAMA5D3 case, look for the ATMEL_MPDDRC_CR_DECOD_INTERLEAVED in the cr configuration Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91, mpddrc: fix typo in ddr2_init()Heiko Schocher2014-11-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | use the configure value for computing the ba_off value not the value from the cr register. This leaded in a wrong ram configuration on the upcoming corvus spl board support. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | arm, at91: generate boot.bin file for all atmel SoCHeiko Schocher2014-11-17-3/+1
| | | | | | | | | | | | | | | | | | | | generate the boot.bin file for all atmel SoC (arm920, arm926, armv7) Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Andreas Bießmann <andreas.devel@googlemail.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com> [fix subject] Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: spl: make css field configurableBo Shen2014-11-17-2/+4
| | | | | | | | | | | | | | | | | | The clock source for master clock can be slow clock, main clock, plla clock or upll clock. So, make the clock source selection field in mckr can be configured. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | ARM: atmel: spl: make initialization more stableBo Shen2014-11-17-0/+4
| | | | | | | | | | | | | | | | We need to make sure the main clock ready field in MCFR is set after switch to main crystal oscillator. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-shTom Rini2014-11-17-31/+83
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| * | sh: Move SH_32BIT to KconfigNobuhiro Iwamatsu2014-11-17-0/+9
| | | | | | | | | | | | | | | | | | | | | This moves SH_32BIT to Kconfig, and removes SH_32BIT from config files. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
generated by cgit v1.1 at 2025-01-02 22:00:00 +0000