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| * ARM64: zynqmp: Add support for zc1751 with DC cardsMichal Simek2016-04-13-1/+572
| | | | | | | | | | | | Support ZynqMP zc1751 with DC cards. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add support for ZCU102 platformMichal Simek2016-04-13-1/+878
| | | | | | | | | | | | Add new board support. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Do not setup DM_ETH/GPIO/MMC by default for all boardsMichal Simek2016-04-13-2/+0
| | | | | | | | | | | | | | There are mini configurations which need to be fit to OCM that's why these options shouldn't be enabled by default. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing nand node for ep108Punnaiah Choudary Kalluri2016-04-13-0/+35
| | | | | | | | | | | | | | Add missing nand node for ep108. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added OOB timing settings in zynqmp-ep108.dtsAnurag Kumar Vulisha2016-04-13-0/+9
| | | | | | | | | | | | | | | | This patch adds the sata port phy OOB timing values in the sata device-tree node. Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use 64bit size cell format for memory nodeMichal Simek2016-04-13-4/+4
| | | | | | | | | | | | Enable option to support more then 4GB memories in single size block. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix DWC3 binding with the kernelMichal Simek2016-04-13-10/+42
| | | | | | | | | | | | Use the same binding as is used in mainline Linux kernel. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add serdes address space dp driverMichal Simek2016-04-13-1/+2
| | | | | | | | | | | | For run time serdes adjustment. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align register descriptionMichal Simek2016-04-13-2/+5
| | | | | | | | | | | | Separate register space and put it on more lines. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dp: Add default properties to zynqmp.dtsiHyun Kwon2016-04-13-0/+3
| | | | | | | | | | | | | | Add some default properties to zynqmp.dtsi. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use correct addresses in node namesHyun Kwon2016-04-13-2/+2
| | | | | | | | | | | | | | Reflect actual silicon addresses in DT node names. Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Align node address with parent node for dpdmaMichal Simek2016-04-13-6/+6
| | | | | | | | | | | | Use right addresses for channel names Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add backward compatible string for uartMichal Simek2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | Mainline kernel has no r1p12 compatible string that's why console stops to work with the latest DTS files. Append generic compatible string. Keep in your mind that using this generic compatible string not all uart features will be available. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Fix coding style for pcieMichal Simek2016-04-13-4/+4
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Extend pcie node to support legacy interruptsBharat Kumar Gogada2016-04-13-0/+10
| | | | | | | | | | | | | | | | Modifying device tree node to support legacy interrupts. Signed-off-by: Bharat Kumar Gogada <bharatku@xilinx.com> Signed-off-by: Ravi Kiran Gummaluri <rgummal@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add interrupt-controller property to gpio nodesMichal Simek2016-04-13-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add ddrc node in dtsNaga Sureshkumar Relli2016-04-13-0/+7
| | | | | | | | | | | | | | | | | | This patch adds ddrc memory controller node in dts. size mentioned in dts is 0x30000, because we need to access DDR_QOS INTR registers located at fd090208 from this driver. Signed-off-by: Naga Sureshkumar Relli <nagasure@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added clocks to DTVNSL Durga2016-04-13-0/+8
| | | | | | | | | | | | | | | | | | ZynqMP DMA's main clock and apb clock are added in zynqmp DT. Signed-off-by: VNSL Durga <vnsldurg@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Acked-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com>
| * ARM64: zynqmp: Add CCI-400 nodeMichal Simek2016-04-13-0/+19
| | | | | | | | | | | | Add CCI-400 node to DTSI. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing interrupt-parent to PMU nodeMichal Simek2016-04-13-0/+1
| | | | | | | | | | | | | | | | | | ZynqMP is not using global interrupt-parent setting that's why it has to be listed in every node separately. PMU node missed it and this patch is adding it. Reported-by: John Linn <John.Linn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: DT: Add power domainsSoren Brinkmann2016-04-13-0/+210
| | | | | | | | | | | | | | | | | | | | Add power-domains to the DT and attach devices to them. The power-domains are all logical domains as understood by firmware. Each PD is identified by a unique identifier that the platform firmware understands. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Added broken-tuning property to SD, eMMC nodesP L Sai Krishna2016-04-13-0/+2
| | | | | | | | | | | | | | | | This patch adds broken-tuning property to SD and eMMC nodes. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Sync GEM nodes with LinuxMichal Simek2016-04-13-12/+4
| | | | | | | | | | | | | | | | Remove jumbo properties which are handled in the driver directly and use mainline compatible string which is already handled by the driver. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Hook up the GEMs to the SMMUEdgar E. Iglesias2016-04-13-0/+8
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Correct IRQ nr for the SMMUEdgar E. Iglesias2016-04-13-5/+5
| | | | | | | | | | Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add 8-bit bus width property.P L Sai Krishna2016-04-13-0/+1
| | | | | | | | | | | | | | This patch add 8-bit bus width property to eMMC node. Signed-off-by: P L Sai Krishna <lakshmis@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: dt: Change qspi node compatible stringRanjit Waghmode2016-04-13-1/+1
| | | | | | | | | | | | | | | | This patch makes compatible string as "m25p80" for qspi node in ep108 device tree file Signed-off-by: Ranjit Waghmode <ranjit.waghmode@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Add missing mmc aliasesMichal Simek2016-04-13-0/+2
| | | | | | | | | | | | Add missing mmc aliases. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM64: zynqmp: Use C pre-processor for includes in dtsAlistair Francis2016-04-13-2/+2
| | | | | | | | | | | | | | | | | | | | Change the dtsi include code to use the C pre-processor #include instead of the device tree /include/. This brings all ZynqMP device trees inline with each other. Signed-off-by: Alistair Francis <alistair.francis@xilinx.com> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix usb phy node for ZyboMichal Simek2016-04-13-1/+1
| | | | | | | | | | | | Compatible property should be the first. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Extend microzed board supportMichal Simek2016-04-13-1/+37
| | | | | | | | | | | | | | Add missing DT nodes and enable USB. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: Add missing qspi for xm013Michal Simek2016-04-13-1/+6
| | | | | | | | | | | | Add missing qspi node and make qspi as spi0. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Create empty line below headersMichal Simek2016-04-13-0/+1
| | | | | | | | | | | | Sync with others zynq DTS files. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align spi and qspi node locationsMichal Simek2016-04-13-37/+37
| | | | | | | | | | | | | | Keep nodes alphabelitally sorted. Signed-off-by: Michal Simek <michal.simek@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com>
| * ARM: zynq: zc706: Add adv7511 on i2c busChristian Kohn2016-04-13-0/+15
| | | | | | | | | | | | | | | | Add missing adv7511 and configure to match Base TRD. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Reviewed-by: Nathan Rossi <nathan@nathanrossi.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: zc702: Add adv7511 on i2c busChristian Kohn2016-04-13-0/+15
| | | | | | | | | | | | | | Add bindings for adv7511. Signed-off-by: Christian Kohn <christian.kohn@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: DT: Add ethernet phy reset informationPunnaiah Choudary Kalluri2016-04-13-0/+2
| | | | | | | | | | | | | | Added phy reset gpio information for gem0. Signed-off-by: Punnaiah Choudary Kalluri <punnaia@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Fix bootargs in board dtsiMichal Simek2016-04-13-8/+8
| | | | | | | | | | | | | | | | - Sync with Linux kernel - Remove rootfs - Remove earlyprintk Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Align devcfg nodeMichal Simek2016-04-13-0/+4
| | | | | | | | | | | | | | | | - Have compatible string as the first property - Sync with Linux kernel dtsi - Add missing interrupt properties Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: Updated devicetree bindings for Zynq 7000 platformMoritz Fischer2016-04-13-0/+1
| | | | | | | | | | | | | | | | Added addtional bindings required for FPGA Manager operation of the Xilinx Zynq Devc configuration interface. Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: dts: zynq: Add devicetree entry for Xilinx Zynq reset controller.Moritz Fischer2016-04-13-0/+7
| | | | | | | | | | | | Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com> Signed-off-by: Olof Johansson <olof@lixom.net> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * ARM: zynq: Add interrupt-controller property to gpio nodesMichal Simek2016-04-13-0/+2
| | | | | | | | | | | | | | | | GPIO driver supports an input interrupt that's why gpio node itself can be labeled as interrupt controller. Reported-by: John Linn <linnj@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-04-13-48/+100
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| * | imx: mx7d: move MX7D to Kconfig entryPeng Fan2016-03-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX7D in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX7D to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX7D" to boards using i.MX7 Dual. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | imx: mx6sx: move MX6SX to Kconfig entryPeng Fan2016-03-26-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If including MX6SX in CONFIG_SYS_EXTRA_OPTIONS, CONFIG_ROM_UNIFIED_SECTIONS will not effect.So move MX6SX to Kconfig entry from CONFIG_SYS_EXTRA_OPTIONS to "select MX6SX" to boards using i.MX6 SoloX. Signed-off-by: Peng Fan <van.freenix@gmail.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: mx6: Add CCV xPress board supportStefan Roese2016-03-26-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add support for the CCV xPress board which is equipped with the i.MX6UL. And provides the following interfaces: - 128MiB DDR - UART - I2C - eMMC (with booting) - Ethernet - USB This patch adds two build targets. One with and one without SPL. The non-SPL version is used for loading U-Boot via USB (imx_usb_loader). Signed-off-by: Stefan Roese <sr@denx.de> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | arm: mx6: Add UART8 base address for i.MX6ULStefan Roese2016-03-26-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add the base address for the i.MX6UL so that this UART can be used. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ye Li <ye.li@nxp.com> Cc: Fabio Estevam <fabio.estevam@nxp.com> Cc: Stefano Babic <sbabic@denx.de>
| * | warp7: Add initial supportFabio Estevam2016-03-26-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the basic support for Warp7 board. For more information about this reference design, please visit: https://www.element14.com/community/docs/DOC-79058/l/warp-7-the-next-generation-wearable-reference-platform Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
| * | mx27: 16-bit wide watchdog registersLeonid Iziumtsev2016-03-25-7/+7
| | | | | | | | | | | | | | | | | | | | | Make the watchdog registers 16-bit wide, as they are according to TRM. Signed-off-by: Leonid Iziumtsev <leonid.iziumtsev@se.atlascopco.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
| * | arm: imx6: Switch DDR3 calibration to wait_for_bit()Marek Vasut2016-03-25-32/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | Switch the DDR3 calibration from ad-hoc implementation of wait_for_bit() to generic implementation of wait_for_bit(). Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
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