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| * | armv8: move reset branch into boot hookAndre Przywara2017-01-04-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The boot0 hook we have so far is applied _after_ the initial branch to the "reset" entry point. An upcoming change requires even this branch to be changed, so we apply the hook macro at the earliest point, and have the branch in the hook file as well. This is no functional change at this point, just refactoring to simplify upcoming patches. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | armv8: add simple sdelay implementationAndre Przywara2017-01-04-0/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | The sunxi DRAM setup code needs an sdelay() implementation, which wasn't defined for armv8 so far. Shamelessly copy the armv7 version and adjust it to work in AArch64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | SPL: make struct spl_image 64-bit safeAndre Przywara2017-01-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since entry_point and load_addr are addresses, they should be represented as longs to cover the whole address space and to avoid warning when compiling the SPL in 64-bit. Also adjust debug prints to add the 'l' specifier, where needed. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | move UL() macro from armv8/mmu.h into common.hAndre Przywara2017-01-04-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The UL() macro is pretty useful in sharing constants between assembly and C files while still being able to specify a type for C. Move the macro from an armv8 specific header into a common header file to be able to use it by arm code (for instance) as well. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | armv8: add lowlevel_init.SAndre Przywara2017-01-04-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards that call s_init() when the SPL runs, we are expected to setup an early stack before calling this C function. Implement the proper AArch64 version of this based on the ARMv7 code. This allows sunxi boards to setup the basic peripherals even with a 64-bit SPL. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | armv8: prevent using THUMBAndre Przywara2017-01-04-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The predominantely 32-bit ARM targets try to compile the SPL in Thumb mode to reduce code size. The 64-bit AArch64 instruction set does not know an alternative, concise encoding, so the Thumb build option should only be set for 32-bit targets. Likewise -marm machine options are only valid for ARMv7 targets. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
| * | sun6i: Restrict some register initialization to Allwinner A31 SoCAndre Przywara2017-01-04-1/+5
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These days many Allwinner SoCs use clock_sun6i.c, although out of them only the (original sun6i) A31 has a second MBUS clock register. Also the requirement for setting up the PRCM PLL_CTLR1 register to provide the proper voltage seems to be a property of older SoCs only as well. Restrict the MBUS initialization to this SoC only to avoid writing bogus values to (undefined) registers in other chips. I can only verify that the PLL voltage setup is not needed for H3 and A64, so for now we only spare those two SoCs. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Alexander Graf <agraf@suse.de> Reviewed-by: Chen-Yu Tsai <wens@csie.org> Reviewed-by: Simon Glass <sjg@chromium.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | am335x: configs: Use ISW_ENTRY_ADDR to set SPL_TEXT_BASEAndrew F. Davis2017-01-08-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | The SPL load address changes based on boot type in HS devices, ISW_ENTRY_ADDR is used to set this address for AM43xx based SoCs for similar reasons. Add this same logic for AM33xx devices. Also make the default value for ISW_ENTRY_ADDR correct for GP devices based on SoC, HS devices already pick the correct value in their defconfig. Signed-off-by: Andrew F. Davis <afd@ti.com>
* | arm: mach-omap2: Fix secure file generationAndrew F. Davis2017-01-08-19/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When TI_SECURE_DEV_PKG is not defined we warn that the file '*_HS' was not generated but generate an unsigned one anyway, first fix this warning to say that it was generated but not secured. When the user then exports TI_SECURE_DEV_PKG after getting this warning, and tries to re-build, 'make' will detect the build artifacts as unchanged and so assume they do not need to be re-generated. This causes it to fail to sign the files and it will pack unsigned files into the final image, even though TI_SECURE_DEV_PKG is now correctly defined and working. Fix this by using FORCE on the targets causes them to be re-run even if the dependent files have not changed. This then causes another issue. We currently rename the signed dtb files to overwrite the non-signed ones. We do this so the 'mkimage' tool gives the packaged dtb sections the correct name. If we do not rename the files then SPL will not find them during boot. Fix this by renaming the dtb files by appending _HS to the end of the filename, after the ".dtb", this causes them to still be named correctly in the FIT blob. Signed-off-by: Andrew F. Davis <afd@ti.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-tegraTom Rini2017-01-04-31/+592
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| * | ARM: dts: tegra: Sync paz00 with Linux 4.8Misha Komarovskiy2017-01-03-29/+568
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Sync with Linux 4.8 dts plus vdd_bl regulator to fix backlight start, display timings and USB controller aliases fix. Signed-off-by: Misha Komarovskiy <zombah@gmail.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Warren <twarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | colibri_t20: fix ulpi reset polarityMarcel Ziswiler2017-01-03-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix ULPI reset polarity which caused a hard hang on Colibri T20 upon attempting to start the USB subsystem: This fixes my late commit d5a24d8b53d350364bd429b7104ec369b817e4b8 (colibri_t20: fix usb operation and controller order) inadvertently having overwritten Stephen's previous commit 2f6a7e8ce5df8b99d84bfd486c6f99d92322ce04 (ARM: tegra: fix USB ULPI PHY reset signal inversion confusion). While at it also fix comment about on-module USB port. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | apalis_t30: comment about disabled pcie nodesMarcel Ziswiler2017-01-03-0/+2
| | | | | | | | | | | | | | | | | | | | | Add a comment about the disabled PCIe port nodes. Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: tegra: allow passing cboot DTB to the kernelStephen Warren2017-01-03-0/+18
| |/ | | | | | | | | | | | | | | | | | | | | | | | | Some users may wish to pass the cboot-supplied DTB to the booted kernel rather than having U-Boot load the DTB itself. To allow this, expose the address of the cboot-supplied DTB in environment variable $fdt_addr. At least when using extlinux.conf, if the user doesn't explicitly specify which DTB to pass to the kernel, U-Boot passes the DTB referred to by this variable. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* | powerpc: mpc85xx: Move macro CONFIG_SYS_PPC64 to KconfigYork Sun2017-01-04-5/+11
| | | | | | | | | | | | Use Kconfig option SYS_PPC64 instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_FSL_QORIQ_CHASSIS* to KconfigYork Sun2017-01-04-10/+21
| | | | | | | | | | | | Use Kconfig option to select chassis version. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: E6500: Move macro CONFIG_E6500 to KconfigYork Sun2017-01-04-9/+16
| | | | | | | | | | | | Use Kconfig option E6500 and clean up existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Remove unused ifdef in config headerYork Sun2017-01-04-19/+1
| | | | | | | | | | | | | | After most config options are moved to Kconfig, the unused ifdef or elif can be removed. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Move CONFIG_SYS_FSL_DDR_VER to KconfigYork Sun2017-01-04-12/+17
| | | | | | | | | | | | Use Kconfig to select DDR version instead of using config header. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Merge macro CONFIG_NUM_DDR_CONTROLLERS and CONFIG_SYS_NUM_DDR_CTRLSYork Sun2017-01-04-19/+19
| | | | | | | | | | | | | | | | These two macros are used for the same thing, the total number of DDR controllers for a given SoC. Use SYS_NUM_DDR_CTRLS in Kconfig and merge existing usage. Signed-off-by: York Sun <york.sun@nxp.com>
* | ddr: fsl: Move macro CONFIG_NUM_DDR_CONTROLLERS to KconfigYork Sun2017-01-04-26/+0
| | | | | | | | | | | | | | | | Use option NUM_DDR_CONTROLLERS in ddr Kconfig and clean up existing usage in ls102xa and fsl-layerscape. Remove all powerpc macros in config header and board header files. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-159/+319
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | mmc: move CONFIG_SYS_FSL_ERRATUM_ESDHC* to KconfigYork Sun2017-01-04-22/+38
| | | | | | | | | | | | | | | | | | | | Add option SYS_FSL_ERRATUM_ESDHC111, SYS_FSL_ERRATUM_ESDHC13, SYS_FSL_ERRATUM_ESDHC135, SYS_FSL_ERRATUM_ESDHC_A001 to mmc Kconfig. Move existing macros to related Kconfig. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate bk4r1] Signed-off-by: Tom Rini <trini@konsulko.com>
* | arm: layerscape: Move CONFIG_SYS_FSL_ERRATUM_* to KconfigYork Sun2017-01-04-24/+48
| | | | | | | | | | | | Use Kconfig to select errata workaround. Signed-off-by: York Sun <york.sun@nxp.com>
* | fsl_ddr: Move DDR config options to driver KconfigYork Sun2017-01-04-122/+76
| | | | | | | | | | | | | | | | | | Create driver/ddr/fsl/Kconfig and move existing options. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate sbc8641d, xpedite537x and MPC8536DS, run a moveconfig.py -s] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: T104xQDS: Remove macro CONFIG_T104xD4QDSYork Sun2017-01-04-1/+0
| | | | | | | | | | | | Remove this macro. It was added by e622d9ed but actually wasn't used. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T2080RDB: Remove macro CONFIG_T2080RDBYork Sun2017-01-04-1/+1
| | | | | | | | | | | | Use TARGET_T2080RDB from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T2080QDS: Remove macro T2080QDSYork Sun2017-01-04-1/+1
| | | | | | | | | | | | Use TARGET_T2080QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: T1040QDS: Remove macro CONFIG_T1040QDSYork Sun2017-01-04-1/+1
| | | | | | | | | | | | Use TARGET_T1040QDS from Kconfig instead. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Remove variant SoCs T1020/T1022/T1013/T1014York Sun2017-01-04-23/+5
| | | | | | | | | | | | | | Remove these SoCs from Kconfig because they don't have individual configuration. Clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move CONFIG_SYS_FSL_SEC_LE and _BE to KconfigYork Sun2017-01-04-13/+41
| | | | | | | | | | | | | | Use Kconfig option to set little- or big-endian access to secure boot and trust architecture. Signed-off-by: York Sun <york.sun@nxp.com>
* | crypto: Move SYS_FSL_SEC_COMPAT into driver KconfigYork Sun2017-01-04-34/+82
| | | | | | | | | | | | | | Instead of define CONFIG_SYS_FSL_SEC_COMPAT in header files for PowerPC and ARM SoCs, move it to Kconfig under the driver. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_PPC_E500_DEBUG_TLB to KconfigYork Sun2017-01-04-14/+41
| | | | | | | | | | | | | | | | Use Kconfig SYS_PPC_E500_DEBUG_TLB and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com> [trini: Migrate 8572] Signed-off-by: Tom Rini <trini@konsulko.com>
* | powerpc: mpc85xx: Move CONFIG_SYS_NUM_TLBCAMS to KconfigYork Sun2017-01-04-7/+8
| | | | | | | | | | | | Use Kconfig option for SYS_NUM_TLBCAMS and clean up existing macros. Signed-off-by: York Sun <york.sun@nxp.com>
* | powerpc: E500: Move CONFIG_E500 and CONFIG_E500MC to KconfigYork Sun2017-01-04-0/+30
|/ | | | | | Use Kconfig option for E500 and E500MC macros. Signed-off-by: York Sun <york.sun@nxp.com>
* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2017-01-02-60/+114
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| * Makefile: preserve output for images that can contain HAB BlocksSven Ebenfeld2017-01-02-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To being able to sign created binaries, we need to know the HAB Blocks for that image. Especially for the imximage type the HAB Blocks are only available during creation of the image. We want to preserve the information until we get to sign the files. In the verbose case we still get them printed out instead of writing to log files. Cc: sbabic@denx.de v2-Changes: - No usage of MKIMAGEOUTPUT_$(@F) macro. - Predefine default value /dev/null in every involved Makefile. Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
| * arm: imx: add HAB authentication of image to SPL bootSven Ebenfeld2017-01-02-59/+107
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When using HAB as secure boot mechanism on Wandboard, the chain of trust breaks immediately after the SPL. As this is not checking the authenticity of the loaded image before jumping to it. The HAB status output will not be implemented in SPL as it adds a lot of strings that are only required in debug cases. With those it exceeds the maximum size of the available OCRAM (69 KiB). The SPL MISC driver support must be enabled, so that the driver can use OTP fuse to check if HAB is enabled. Cc: sbabic@denx.de v2-Changes: None Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
| * arm: imx: remove bmode , hdmidet and dek commands from SPLSven Ebenfeld2017-01-02-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | These files are blowing up the SPL and should not be required there as the SPL delivers no command console. Because building fails for mx27 and mx31 machines with SPL build, we remove the linker flag for them from the Makefile. Nothing is built for them to be linked in that directory. Cc: sbabic@denx.de v2 Changes: - Remove mx27 and mx31 from Makefile during SPL build as nothing is built for them in that directory. And removing the commands with the libs-y directive lead to linker failures. e.g. "armv5te-ld.bfd: cannot find arch/arm/imx-common/built-in.o: No such file or directory)" Signed-off-by: Sven Ebenfeld <sven.ebenfeld@gmail.com> Reviewed-by: George McCollister <george.mccollister@gmail.com> Tested-by: George McCollister <george.mccollister@gmail.com>
* | arm: am57xx: cl-som-am57x: add initial board supportDmitry Lifshitz2017-01-02-0/+4
|/ | | | | | | | | | | | | | | | | | | | Features supported : * Serial console * SPI Flash * MMC/SD Card * eMMC storage * SATA * PCA9555 - GPIO expander over I2C5 bus * USB Use spl alternate boot device feature to define fallback to the main boot device as it is defined by hardware. Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il> [uri.mashiach@compulab.co.il: Adjust to v2016.11] Signed-off-by: Uri Mashiach <uri.mashiach@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* mmc: move some SDHCI related options to KconfigMasahiro Yamada2016-12-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While I moved the options, I also renamed them so that they are all prefixed with MMC_SDHCI_. This commit was created in the following steps. [1] Rename with the following command find . -name .git -prune -o ! -path ./scripts/config_whitelist.txt \ -type f -print | xargs sed -i -e ' s/CONFIG_MMC_SDMA/CONFIG_MMC_SDHCI_SDMA/g s/CONFIG_BCM2835_SDHCI/CONFIG_MMC_SDHCI_BCM2835/g s/CONFIG_KONA_SDHCI/CONFIG_MMC_SDHCI_KONA/g s/CONFIG_MV_SDHCI/CONFIG_MMC_SDHCI_MV/g s/CONFIG_S5P_SDHCI/CONFIG_MMC_SDHCI_S5P/g s/CONFIG_SPEAR_SDHCI/CONFIG_MMC_SDHCI_SPEAR/g ' [2] create the Kconfig entries in drivers/mmc/Kconfig [3] Move the options by the following command tools/moveconfig.py -y MMC_SDHCI_SDMA MMC_SDHCI_BCM2835 \ MMC_SDHCI_KONA MMC_SDHCI_MV MMC_SDHCI_S5P MMC_SDHCI_SPEAR [4] Sort drivers/mmc/Makefile for readability Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com>
* Update Maintainer and Author's email addressAjay Bhargav2016-12-27-3/+3
| | | | | | | | I am not longer using my old email address "ajay.bhargav@einfochips.com". For U-Boot development email address is now updated to contact@8051projects.net Signed-off-by: Ajay Bhargav <contact@8051projects.net>
* ARM: revive CONFIG_USE_ARCH_MEMCPY/MEMSET for UniPhier and TegraMasahiro Yamada2016-12-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit be72591bcd64 ("Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig") is misconversion. The original logic in include/configs/uniphier.h was as follows: #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64) #define CONFIG_USE_ARCH_MEMSET #define CONFIG_USE_ARCH_MEMCPY #endif This means those configs were enabled when building U-Boot proper, but disabled when building SPL. Likewise for Tegra. Now "depends on !SPL" prevents any boards with SPL support from reaching these options. This changed the behavior for UniPhier and Tegra SoC family. Please notice these two options only control the U-Boot proper build. As you see arch/arm/Makefile, ARM-specific memset/memcpy are never compiled for SPL. So, __HAVE_ARCH_MEMCPY/MEMSET should not set for SPL. Fixes: be72591bcd64 ("Kconfig: Move USE_ARCH_MEMCPY/MEMSET to Kconfig") Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Fabio Estevam <fabio.estevam@nxp.com>
* x86: Add file names from Kconfig in CMC/FSP/VGA nodes in u-boot.dtsiBin Meng2016-12-26-0/+3
| | | | | | | | Since we already have a bunch of Kconfig options for CMC/FSP/VGA file names, add these from Kconfig in the corresponding dts nodes. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* x86: quark: Fix build error for quark-based boardsBin Meng2016-12-26-0/+17
| | | | | | | | | With the conversion to use binman to build x86 boards, Intel Galileo board does not build anymore due to missing ucode entry. In fact ucode is not needed for quark-based boards. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* Merge branch 'master' of git://git.denx.de/u-boot-sunxiTom Rini2016-12-23-0/+45
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| * sunxi: fix SID read on H3Icenowy Zheng2016-12-20-0/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | H3 SID controller has some bug, which makes the initial SID value at SUNXI_SID_BASE wrong when boot. Change the SID retrieve code to call the SID Controller directly on H3, which can get the correct value, and also fix the SID value at SUNXI_SID_BASE, so that it can be used by further operations. Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Reviewed-by: Jagan Teki <jagan@openedev.com>
* | arm: dts: s5pc1xx-goni: add the pmic node for using DMJaehoon Chung2016-12-22-0/+165
| | | | | | | | | | | | | | | | To use driver-model adds the pmic node for max8998. This is used as kerel device-tree in Linux. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arm64: mvebu: Fix A8K memory mapping and add documentationKonstantin Porotchkin2016-12-21-13/+45
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix the MMU mapping for A8K device family: - Separate A7K and A8K memory mappings - Fix memory regions by including IO mapping for all 3 PCIe interfaces existing on each connected CP110 controller Add A8K memory mapping documentation with all regions configured by Marvell ATF. Change-Id: I9c930569b1853900f5fba2d5db319b092cc7a2a6 Signed-off-by: Konstantin Porotchkin <kostap@marvell.com> Signed-off-by: Stefan Roese <sr@denx.de> Cc: Stefan Roese <sr@denx.de> Cc: Nadav Haklai <nadavh@marvell.com> Cc: Neta Zur Hershkovits <neta@marvell.com> Cc: Omri Itach <omrii@marvell.com> Cc: Igal Liberman <igall@marvell.com> Cc: Haim Boot <hayim@marvell.com> Cc: Hanna Hawa <hannah@marvell.com>
* | Merge git://git.denx.de/u-boot-mpc85xxTom Rini2016-12-20-25/+36
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