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| * arm: dts: am335x-evm: add tick-timer to chosen nodeMugunthan V N2016-01-20-0/+1
| | | | | | | | | | | | | | Specify timer2 to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am335x-boneblack: add tick-timer to chosen nodeMugunthan V N2016-01-20-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am437x-gp-evm: add tick-timer to chosen nodeMugunthan V N2016-01-20-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: dts: am437x-sk-evm: add tick-timer to chosen nodeMugunthan V N2016-01-20-0/+1
| | | | | | | | | | | | | | Specify which timer to be used as tick-timer in chosen node. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
| * arm: omap-common: do not build timer when CONFIG_TIMER definedMugunthan V N2016-01-20-0/+6
| | | | | | | | | | | | | | | | | | | | To prepare timer driver to DM/DT conversion do not build the exiting timer driver when CONFIG_TIMER is defined. But since omap's SPL doesn't support DM yet so built timer driver only for SPL build when CONFIG_TIMER is defined. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-i2c; branch 'master' of ↵Tom Rini2016-01-21-12/+16
|\ \ | | | | | | | | | git://git.denx.de/u-boot-nds32
| * | nds32: Fix compile error.rick2016-01-21-12/+16
| | | | | | | | | | | | | | | | | | | | | Fix compile error with gcc 4.9.3 Signed-off-by: rick <rick@andestech.com> Cc: Andes <uboot@andestech.com>
* | | sunxi: Add support for the I2C controller which is part of the PRCMJelle van der Waa2016-01-21-0/+30
| |/ |/| | | | | | | | | | | | | | | | | | | Signed-off-by: Jelle van der Waa <jelle@vdwaa.nl> [hdegoede@redhat.com: Minor cleanups] Signed-off-by: Hans de Goede <hdegoede@redhat.com> applied with fixing 2 checkpatch warnings: WARNING: please, no space before tabs Signed-off-by: Heiko Schocher <hs@denx.de>
* | stm32: move stm32 specific code to mach-stm32Vikas Manocha2016-01-20-6/+37
| | | | | | | | | | | | | | This patch moves stm32 sources at one place, with this armv7m now contains only generic stuff. Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
* | armv7: Add missing newline after OMAP die IDLadislav Michl2016-01-20-2/+2
| | | | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Enric Balletbo Serra <enric.balletbo@collabora.com>
* | m68k: M54418TWR: drop board/freescale/m54418twr/config.mkMasahiro Yamada2016-01-20-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The board/freescale/m54418twr/config.mk defined TEXT_BASE, which has the same value as CONFIG_SYS_TEXT_BASE. The TEXT_BASE is referenced by two files: - arch/m68k/cpu/mcf5445x/start.S and include/ - include/configs/M54418TWR.h Replace the references with CONFIG_SYS_TEXT_BASE and delete board/freescale/m54418twr/config.mk. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Angelo Dureghello <angelo at sysam.it>
* | arm, ubifs: fix gcc5.x compiler warningHeiko Schocher2016-01-20-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | compiling U-Boot for openrd_base_defconfig with gcc 5.x shows the following warning: CC fs/ubifs/super.o In file included from fs/ubifs/ubifs.h:35:0, from fs/ubifs/super.c:37: fs/ubifs/super.c: In function 'atomic_inc': ./arch/arm/include/asm/atomic.h:55:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ fs/ubifs/super.c: In function 'atomic_dec': ./arch/arm/include/asm/atomic.h:64:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/sb.o [...] CC fs/ubifs/lpt.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt.c:35: fs/ubifs/lpt.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/lpt_commit.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/lpt_commit.c:26: fs/ubifs/lpt_commit.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/scan.o CC fs/ubifs/lprops.o CC fs/ubifs/tnc.o In file included from include/linux/bitops.h:123:0, from include/common.h:20, from include/ubi_uboot.h:17, from fs/ubifs/ubifs.h:37, from fs/ubifs/tnc.c:30: fs/ubifs/tnc.c: In function 'test_and_set_bit': ./arch/arm/include/asm/bitops.h:57:2: warning: 'flags' is used uninitialized in this function [-Wuninitialized] local_irq_save(flags); ^ CC fs/ubifs/tnc_misc.o Fix it. Signed-off-by: Heiko Schocher <hs@denx.de>
* | ARM: uniphier: remove unneeded if conditionalsMasahiro Yamada2016-01-20-8/+2
| | | | | | | | | | | | | | The if block does the same as the else block does. The conditional is not necessary at all. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: move UMC register macros to umc-regs.hMasahiro Yamada2016-01-20-48/+27
| | | | | | | | | | | | The umc-proxstream2.c defiens the same macros as in umc-regs.h. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: set active ways to really enable outer cacheMasahiro Yamada2016-01-20-0/+2
| | | | | | | | | | | | Each way must be unlocked to make it effective. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: fix range invalidate for outer cacheMasahiro Yamada2016-01-20-0/+23
| | | | | | | | | | | | | | If invalidate operation is invoked against a cache-unaliged region, the both ends of the region should be flushed, not invalidated. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: factor out outer cache sync as a helper functionMasahiro Yamada2016-01-20-4/+8
| | | | | | | | | | | | Avoid repeating the same code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | ARM: uniphier: refactor outer cache operation slightlyMasahiro Yamada2016-01-20-2/+4
| | | | | | | | | | | | Improve readability without changing the behavior. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | armv8: cavium: Add ThunderX 88xx board definitionSergey Temerkhanov2016-01-19-2/+7
| | | | | | | | | | | | | | | | | | This commit adds basic Cavium ThunderX 88xx board definitions and support. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> [trini: Drop CONFIG_SYS_GENERIC_BOARD define] Signed-off-by: Tom Rini <trini@konsulko.com>
* | armv8: cavium: Add the device tree for ThunderXSergey Temerkhanov2016-01-19-0/+395
| | | | | | | | | | | | | | | | | | This commit adds the FDT for the ThunderX family of SoCs Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | armv8: Add Secure Monitor/Hypervisor Call (SMC/HVC) infrastructureSergey Temerkhanov2016-01-19-0/+97
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds functions issuing calls to secure monitor or hypervisore. This allows using services such as Power State Coordination Interface (PSCI) provided by firmware, e.g. ARM Trusted Firmware (ATF) The SMC call can destroy all registers declared temporary by the calling conventions. The clobber list is "x0..x17" because of this Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Corey Minyard <cminyard@mvista.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Mateusz Kulikowski <mateusz.kulikowski@gmail.com>
* | armv8: New MMU setup code allowing to use 48+ bits PA/VASergey Temerkhanov2016-01-19-6/+199
| | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds code which sets up 2-level page tables on ARM64 thus extending available VA space. CPUs implementing 64k translation granule are able to use direct PA-VA mapping of the whole 48 bit address space. It also adds the ability to reset the SCTRL register at the very beginning of execution to avoid interference from stale mappings set up by early firmware/loaders/etc. Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com>
* | armv8: Add read_mpidr() functionSergey Temerkhanov2016-01-19-0/+11
| | | | | | | | | | | | | | | | | | | | This patch adds the read_mpidr() function which returns the MPIDR_EL1 register value Signed-off-by: Sergey Temerkhanov <s.temerkhanov@gmail.com> Signed-off-by: Radha Mohan Chintakuntla <rchintakuntla@cavium.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | x86: quark: Fix boot breakageBin Meng2016-01-19-11/+16
| | | | | | | | | | | | | | | | | | With driver model timer conversion, quark based board does not boot any more as mdelay() is called during quark_pcie_early_init() which is before driver model gets initialized. Fix this breakage. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | Add more SPDX-License-Identifier tagsTom Rini2016-01-19-492/+46
| | | | | | | | | | | | | | | | | | In a number of places we had wordings of the GPL (or LGPL in a few cases) license text that were split in such a way that it wasn't caught previously. Convert all of these to the correct SPDX-License-Identifier tag. Signed-off-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2016-01-16-1005/+2361
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| * | MIPS: implement bit manipulating I/O accessorsDaniel Schwierzeck2016-01-16-0/+55
| | | | | | | | | | | | | | | | | | | | | Add support for functions clrbits_X(), setbits_X() and clrsetbits_X() on MIPS. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: fix SPDX license identifier in remaining arch header filesDaniel Schwierzeck2016-01-16-55/+32
| | | | | | | | | | | | | | | | | | | | | Add a SPDX license identifier to MIPS header files where it is still missing. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync processor and register definitions with linux-4.4Daniel Schwierzeck2016-01-16-553/+1211
| | | | | | | | | | | | | | | | | | | | | Update definitions for processor, registers as well as assemby macros. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: sync I/O related header files with linux-4.4Daniel Schwierzeck2016-01-16-364/+941
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Mainly sync asm/io.h to get a working ioremap() implementation as well as the full set of I/O accessors. Pull in additional header files to make this work. Furthermore port over the directory 'arch/mips/include/asm/mach-generic/' with contains default definitions for I/O and memory spaces and default implementations for mapping those spaces. All files in that directory can be overwritten by a SoC/machine. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: kconfig: add option for MIPS_L1_CACHE_SHIFTDaniel Schwierzeck2016-01-16-10/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add Kconfig symbol for L1 cache shift like the kernel does. The value of CONFIG_SYS_CACHELINE_SIZE is not a reliable source for ARCH_DMA_MINALIGN anymore, because it is optional on MIPS. If CONFIG_SYS_CACHELINE_SIZE is not defined by a board, the cache sizes are automatically detected and ARCH_DMA_MINALIGN would be set to 128 Bytes. The default value for CONFIG_MIPS_L1_CACHE_SHIFT is 5 which corresponds to 32 Bytes. All current MIPS boards already used that value. While on it, fix the Malta board to use a value of 6 like the kernel port does. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: Kconfig: optimize gcc -march and -mtune setupDaniel Schwierzeck2016-01-16-15/+24
| | | | | | | | | | | | | | | | | | | | | | | | Move setup of -march to arch/mips/Makefile and follow the design on ARM. Also add a possibility to chose specific CPU tune options. Signed-off-by: Wills Wang <wills.wang@live.com> Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: au1x00: move SoC header files to arch/mips/mach-au1x00/include/mach/Daniel Schwierzeck2016-01-16-3/+3
| | | | | | | | | | | | Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: Kconfig: refactor machine setupDaniel Schwierzeck2016-01-16-1/+6
| | | | | | | | | | | | | | | | | | | | | | | | Refactor machine setup like it is done on ARM. While on it, also support "include <mach/file.h" for machine specific header files. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: add initial infrastructure for device-tree filesDaniel Schwierzeck2016-01-16-0/+43
| | | | | | | | | | | | | | | | | | | | | | | | Prepare sub-folder for device-tree files. Make support for device-tree on MIPS available in Kbuild/Kconfig. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com> Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com>
| * | MIPS: do not build position-independent executables for SPLDaniel Schwierzeck2016-01-16-4/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | SPL binaries are usually linked to a fixed address in SRAM. Furthermore SPL binaries do not need to relocate itself. Thus do not build them as position-independent binaries which helps to largely reduce the size of SPL binaries. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: create .text sub-sections for assembler functionsDaniel Schwierzeck2016-01-16-1/+3
| | | | | | | | | | | | | | | | | | | | | | | | Put all functions coded in assembly in sub-sections of section .text. This allows the linker to garbage collect unused assembly functions too. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: fix annotation of _start and relocate_codeDaniel Schwierzeck2016-01-16-7/+11
| | | | | | | | | | | | | | | | | | | | | Correctly annotate _start and relocate_code as functions to produce more readable disassembly code generated by objdump. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
| * | MIPS: add asm/gpio.h to fix compilation error with CONFIG_CMD_GPIO.Purna Chandra Mandal2016-01-16-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | With CONFIG_CMD_GPIO compilation reports error. common/cmd_gpio.c:13:22: fatal error: asm/gpio.h: No such file or directory #include <asm/gpio.h> ^ Signed-off-by: Purna Chandra Mandal <purna.mandal@microchip.com> Reviewed-by: Chin Liang See <clsee@altera.com> Reviewed-by: Simon Glass <sjg@chromium.org>
* | | socfpga: Modify qts-filter args to allow input for bsp generated files and ↵Dalon Westergreen2016-01-16-31/+45
|/ / | | | | | | | | | | | | | | | | | | | | | | quartus project directories The hps_isw_handoff and bsp/generated folders are typically not in the same path.This patch adds support for specifying the different input directories for the bsp and quartus projects. Signed-off-by: Dalon Westergreen <dwesterg@gmail.com> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Chin Liang See <clsee@altera.com>
* | eth-raw-os.c: Add cast to bind(2) callTom Rini2016-01-15-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | With more recent gcc versions we otherwise get an error like: note: expected 'const struct sockaddr *' but argument is of type 'struct sockaddr_in *' and the common solution here is to cast, rather than re-work the code. Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | Fix GCC format-security errors and convert sprintfs.Ben Whitten2016-01-14-6/+6
| | | | | | | | | | | | | | | | | | | | | | With format-security errors turned on, GCC picks up the use of sprintf with a format parameter not being a string literal. Simple uses of sprintf are also converted to use strcpy. Signed-off-by: Ben Whitten <ben.whitten@gmail.com> Acked-by: Wolfgang Denk <wd@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-x86Tom Rini2016-01-14-101/+3092
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| * | x86: qemu: remove cpu node in device treeMiao Yan2016-01-13-14/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | Remove 'cpu' node in device tree for QEMU targets, and let U-Boot detect and fix up those information at runtime. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: qemu: fix cpu device in smp bootMiao Yan2016-01-13-11/+72
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently, when booting with more that one CPU enabled, U-Boot scans 'cpu' node in device tree and calculates CPU number. This does not scale well as changing CPU number also requires modifying .dts and re-compiling U-Boot. This patch uses fw_cfg interface provided by QEMU to detect online CPU number at runtime, and dynamically adds 'cpu' device to U-Boot's driver model. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: use actual CPU number for allocating memoryMiao Yan2016-01-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use actual CPU number, instead of maximum cpu configured, to allocate stack memory in 'load_sipi_vector' Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: fix a typo in function nameMiao Yan2016-01-13-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | Rename 'find_cpu_by_apid_id' to 'find_cpu_by_apic_id'. This should be a typo. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: qemu: add a cpu uclass driver for qemu targetMiao Yan2016-01-13-5/+62
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a cpu uclass driver for qemu. Previously, the qemu target gets cpu number from board dts files, which are manually created at compile time. This does not scale when more cpus are assigned to guest as the dts files must be modified as well. This patch adds a cpu uclass driver for qemu targets to directly read online cpu number from firmware. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: qemu: add fw_cfg supportMiao Yan2016-01-13-1/+380
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QEMU fw_cfg interface allows the guest to retrieve various data information from QEMU. For example, APCI/SMBios tables, number of online cpus, kernel data and command line, etc. This patch adds support for QEMU fw_cfg interface. Signed-off-by: Miao Yan <yanmiaobest@gmail.com> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com>
| * | x86: ivybridge: Add macros for LPC decode rangesBin Meng2016-01-13-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | Add several macros for LPC decode registers on PCH. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-15 02:07:55 +0000