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* arm64: fsl-layerscape: add get_svr and IS_SVR_REV helperSriram Dash2016-06-13-0/+14
| | | | | | | | Adds get_svr and IS_SVR_REV helpers for ARMv8 platforms, similar to PPC and ARMv7. Signed-off-by: Sriram Dash <sriram.dash@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
* siemens,am33x: add draco etamin boardHeiko Schocher2016-06-09-0/+5
| | | | | | | | | | | | | In the draco CPU board family, etamin is a new variant with bigger flash and more RAM. Due to new flash that uses larger pages (4K) some changes are necessary because it impacts the MTD partition layout and the ubi mount parameters. Signed-off-by: Samuel Egli <samuel.egli@siemens.com> Signed-off-by: Heiko Schocher <hs@denx.de> [trini: Move BOOTDELAY into defconfig, just always be 3 now] Signed-off-by: Tom Rini <trini@konsulko.com>
* mtd: nand: omap: allow to switch to BCH16Heiko Schocher2016-06-09-2/+4
| | | | | | | support in omap_nand_switch_ecc() also an eccstrength from 16. Signed-off-by: Heiko Schocher <hs@denx.de>
* am335x, shc: add support for the am335x based bosch shc boardHeiko Schocher2016-06-09-0/+9
| | | | | | | | | | | | | | | | | | | | | | | U-Boot SPL 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:40:06) SHC C3-Sample MPU reference clock runs at 6 MHz Setting MPU clock to 594 MHz Enabling Spread Spectrum of 18 permille for MPU Trying to boot from MMC reading u-boot.img reading u-boot.img U-Boot 2016.03-rc3-00019-g6dfb4c2-dirty (Mar 09 2016 - 07:05:35 +0100) Watchdog enabled I2C: ready DRAM: 512 MiB reloc off 1f783000 MMC: OMAP SD/MMC: 0, OMAP SD/MMC: 1 Net: cpsw U-Boot# Signed-off-by: Heiko Schocher <hs@denx.de>
* armv7: omap-common: make SPL board_mmc_init() weakHeiko Schocher2016-06-09-1/+1
| | | | | | | make this function weak, so board code can setup in SPL MMC init with board special values. Signed-off-by: Heiko Schocher <hs@denx.de>
* arm, am335x: Enable Spread Spectrum for the MPUHeiko Schocher2016-06-09-1/+76
| | | | | | | | Enable Spread Spectrum for the MPU by calculating the required values and setting the registers accordingly. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* am335x: add some missing CM_CLKMODE_DPLL_SSC macrosHeiko Schocher2016-06-09-0/+3
| | | | | | | | | | add missing CM_CLKMODE_DPLL_SSC_ACK_MASK, CM_CLKMODE_DPLL_SSC_DOWNSPREAD_MASK and CM_CLKMODE_DPLL_SSC_TYPE_MASK defines. Used for enabling spread spectrum. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* arm, am335x: add some missing GPIO register definitionsHeiko Schocher2016-06-09-0/+2
| | | | | | | | | add missing: OMAP_GPIO_IRQSTATUS_SET_0 and OMAP_GPIO_IRQSTATUS_SET_1 registers. Signed-off-by: Heiko Schocher <hs@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
* ARM: uniphier: insert dsb barrier to ensure visibility of storeMasahiro Yamada2016-06-09-2/+2
| | | | | | | | | | | | I noticed secondary CPUs sometimes fail to wake up, and the root cause is that the sev instruction wakes up slave CPUs before the preceding the register write is observed by them. The read-back of the accessed register does not guarantee the order. In order to ensure the order between the register write and the sev instruction, a dsb instruction should be executed prior to the sev. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: do not overwrite fdt_file environmentMasahiro Yamada2016-06-09-0/+3
| | | | | | | | This code auto-detects the best-match FDT file name, but it should respect the user's choice if "fdt_file" environment is found in a saved set of environments. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: check return code of setenv()Masahiro Yamada2016-06-09-3/+1
| | | | | | Because setenv() may fail, it is better to check its return code. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: fix boot mode for PH1-LD11Masahiro Yamada2016-06-09-1/+18
| | | | | | | This function is shared between PH1-LD11 and PH1-LD20. The difference is the boot-mode latch for the USB boot mode. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* ARM: uniphier: support eMMC boot for PH1-LD11 and PH1-LD20Masahiro Yamada2016-06-09-3/+154
| | | | | | | | The Boot ROM on PH1-LD11/LD20 exports built-in APIs to load images from an eMMC device. They are useful to reduce the memory footprint of SPL, rather than compiling the whole MMC framework. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* Merge http://git.denx.de/u-boot-samsungTom Rini2016-06-06-19/+452
|\ | | | | | | | | | | | | | | Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: configs/peach-pi_defconfig configs/peach-pit_defconfig
| * ARM: exynos: Fix build error if SERIAL is disabled in SPLMarek Vasut2016-05-26-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If CONFIG_SPL_SERIAL_SUPPORT is not defined in include/configs/exynos5-common.h the following error is produced during the build of the SPL: arch/arm/mach-exynos/built-in.o: In function `do_lowlevel_init': ...u-boot/arch/arm/mach-exynos/lowlevel_init.c:221: undefined reference to `debug_uart_init' Add additional condition to check if SPL build is in progress and in that case check if CONFIG_SPL_SERIAL_SUPPORT is also set before enabling the debug UART. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Convert several boards to driver model for videoSimon Glass2016-05-25-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update several boards to use driver model for video. This involves changes to the EDP and FIMD (frame buffer) drivers. Existing PWM, simple-panel and pwm-backlight drivers are used. These work without additional configuration since they use the device tree settings in the same way as Linux. Boards converted are: - snow - spring - peach-pit - peach-pi All have been tested. Not converted: - MIPI display driver - s5pc210_universal - smdk5420 - smdk5250 - trats - trats2 Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Rename edp_device_info to exynos_dp_privSimon Glass2016-05-25-2/+2
| | | | | | | | | | | | | | | | | | Rename this function to better fit with driver model. It is the private data for the exynos EDP driver. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: dts: Add display-related device tree fragmentsSimon Glass2016-05-25-3/+196
| | | | | | | | | | | | | | | | | | | | | | | | Bring in device tree pieces related to display from Linux 4.4 for: - snow - peach_pit - peach_pi - spring Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Simplify calling of exynos_dp_phy_ctrl()Simon Glass2016-05-25-2/+2
| | | | | | | | | | | | | | | | This function controls enabling the EDP PHY. Rename it and drop the existing weak functions, which are confusing. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: Allow PWM0 pinmux to be set upSimon Glass2016-05-25-0/+6
| | | | | | | | | | | | | | | | This is commonly used for LCD backlight control. Add pinmux support for it on exynos5250 and 5420. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: dts: Add pwm device tree nodeSimon Glass2016-05-25-0/+14
| | | | | | | | | | | | | | Add this node from Linux v4.4 so that PWMs can be used in U-Boot. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: pwm: Add a driver for the exynos5 PWMSimon Glass2016-05-25-0/+3
| | | | | | | | | | | | | | | | This driver supports the standard PWM API. There are 5 PWMs. Four are used normally and the last is normally used as a timer. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Move mipi_lcd_device_dt into a functionSimon Glass2016-05-25-1/+1
| | | | | | | | | | | | | | | | | | In preparation for making this a parameter, move it into the function that sets it up. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Move struct exynos_platform_mipi_dsim into vidinfoSimon Glass2016-05-25-2/+3
| | | | | | | | | | | | | | | | | | Put the pointer to this structure in struct vidinfo so that we can reference it without it being global. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Remove use of vidinfo_t typedefSimon Glass2016-05-25-1/+2
| | | | | | | | | | | | | | | | | | Use 'struct vidinfo' instead so that we can change this to a struct with a different name in future. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * exynos: video: Drop dead codeSimon Glass2016-05-25-2/+0
| | | | | | | | | | | | | | | | | | | | We always use device tree with video, so can drop these #ifdefs. Some of the hardware addresses are not needed either. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Anatolij Gustschin <agust@denx.de> Acked-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * board: samsung: add initial Espresso7420 board supportThomas Abraham2016-05-25-0/+44
| | | | | | | | | | | | | | | | | | | | Espresso7420 is a development/evaluation board for Exynos7420 SoC. It includes multiple onboard compoments (EMMC/Codec) and various interconnects (USB/HDMI). Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: exynos: add support for Exynos7420 SoCThomas Abraham2016-05-25-0/+135
| | | | | | | | | | | | | | | | | | Add support for Exynos7420 SoC. The Exynos7420 SoC has four Cortex-A57 and four Cortex-A53 CPUs and includes various peripheral controllers. Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * arm: exynos: realign the code to allow support for newer 64-bit platformsThomas Abraham2016-05-25-6/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | The existing Exynos 32-bit platform support needs to be realigned in order to support newer 64-bit Exynos platforms. The driver model will be utlized for drivers on the 64-bit Exynos platforms and so some of the older platform support code would not be required for the newer 64-bit Exynos platforms. Cc: Minkyu Kang <mk7.kang@samsung.com> Signed-off-by: Thomas Abraham <thomas.ab@samsung.com> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
* | arm/arm64: implement a boot header capabilityAndre Przywara2016-06-06-0/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some SPL loaders (like Allwinner's boot0, and Broadcom's boot0) require a header before the actual U-Boot binary to both check its validity and to find other data to load. Sometimes this header may only be a few bytes of information, and sometimes this might simply be space that needs to be reserved for a post-processing tool. Introduce a config option to allow assembler preprocessor commands to be inserted into the code at the appropriate location; typical assembler preprocessor commands might be: .space 1000 .word 0x12345678 Signed-off-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Steve Rae <srae@broadcom.com> Commit Notes: Please note that the current code: start.S (arm64) and vectors.S (arm) already jumps over some portion of data already, so this option basically just increases the size of this region (and the resulting binary). For use with Allwinner's boot0 blob there is a tool called boot0img[1], which fills the header to allow booting A64 based boards. For the Pine64 we need a 1536 byte header (including the branch instruction) at the moment, so we add this to the defconfig. [1] https://github.com/apritzel/pine64/tree/master/tools END Reviewed-by: Tom Rini <trini@konsulko.com>
* | Remove unneeded remnants of bcopy().Robert P. J. Day2016-06-06-9/+0
| | | | | | | | | | | | | | Since bcopy() is no longer used, delete all remaining references to it. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca>
* | armv7: fix order of OMAP die ID printingLadislav Michl2016-06-06-2/+2
| | | | | | | | | | Signed-off-by: Ladislav Michl <ladis@linux-mips.org> Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
* | arm: Introduce setjmp/longjmpAlexander Graf2016-06-06-0/+99
| | | | | | | | | | | | | | | | | | | | | | To quit an EFI application we will need logic to jump to the caller of a function without returning from the function we called into, so we need setjmp/longjmp functionality. This patch introduces a trivial implementation of these that I verified works on armv7, thumb2 and aarch64. Signed-off-by: Alexander Graf <agraf@suse.de>
* | Fix to davinci_nand.h to place CEnCFG registers at correctPeter Howard2016-06-06-4/+6
| | | | | | | | Signed-off-by: Peter Howard <phoward@gme.net.au>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-microblazeTom Rini2016-06-06-1/+219
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| * | ARM64: zynqmp: Extend page_table_sizeMichal Simek2016-06-06-0/+5
| | | | | | | | | | | | | | | | | | | | | 0xc000 is not sufficient page table size if dc4 with 4 gems is enabled. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | ARM64: zynqmp: Add support for zc1751-dc4Michal Simek2016-06-06-0/+213
| | | | | | | | | | | | | | | | | | zc1751-dc4 contains four GEMs. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
| * | microblaze: Move MSR instruction selection to KconfigMichal Simek2016-06-06-1/+1
| | | | | | | | | | | | | | | | | | Select MSR instructions via Kconfig instead of xparameters.h. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | | arm: lib: Fix fix push/pop-section directivesMarek Vasut2016-06-04-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Repair typos in the previous "arm: lib: fix push/pop-section directives" patch, which prevented VCMA9 board from building. Signed-off-by: Marek Vasut <marex@denx.de> Fixes: b2f1858455e9 ("arm: lib: fix push/pop-section directives") Cc: Tom Warren <twarren@nvidia.com> Cc: Simon Glass <sjg@chromium.org> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Stephen Warren <swarren@nvidia.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2016-06-04-14/+38
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| * | | dm: test: Add GPIO open drain testsmario.six@gdsys.cc2016-06-03-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add some tests for the new open drain setting feature of the GPIO uclass, and extend the capabilities of the sandbox GPIO driver accordingly. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | dm: gpio: Add driver for MPC85XX GPIO controllermario.six@gdsys.cc2016-06-03-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a driver for the built-in GPIO controller of the MPC85XX SoC (probably supporting other PowerQUICC III SoCs as well). Each GPIO bank is identified by its own entry in the device tree, i.e. gpio-controller@fc00 { #gpio-cells = <2>; compatible = "fsl,pq3-gpio"; reg = <0xfc00 0x100> } By default, each bank is assumed to have 32 GPIOs, but the ngpios setting is honored, so the number of GPIOs for each bank in configurable to match the actual GPIO count of the SoC (e.g. the 32/32/23 banks of the P1022 SoC). The usual functions of GPIO drivers (setting input/output mode and output value setting) are supported. The driver has been tested on MPC85XX, but it is likely that other PowerQUICC III devices will work as well. Signed-off-by: Mario Six <mario.six@gdsys.cc> Reviewed-by: Simon Glass <sjg@chromium.org> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | arch/powerpc: Simplify some calculations using ARRAY_SIZE() macro.Robert P. J. Day2016-06-03-14/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Replace a number of array length calculations with the ARRAY_SIZE() macro, for clarity. Signed-off-by: Robert P. J. Day <rpjday@crashcourse.ca> Reviewed-by: York Sun <york.sun@nxp.com>
* | | | Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriqTom Rini2016-06-04-4/+674
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| * | | | armv8: ls1012a: Add support of ls1012afrdm boardPrabhakar Kushwaha2016-06-03-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A FREEDOM (LS1012AFRDM) is a high-performance development platform, with a complete debugging environment. The LS1012AFRDM board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@nxp.com> Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1012a: Add support of ls1012ardb boardPrabhakar Kushwaha2016-06-03-1/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Reference Design System (LS1012ARDB) is a high-performance development platform, with a complete debugging environment. The LS1012ARDB board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: ls1012a: Add support of ls1012aqds boardPrabhakar Kushwaha2016-06-03-1/+268
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | QorIQ LS1012A Development System (LS1012AQDS) is a high-performance development platform, with a complete debugging environment. The LS1012AQDS board supports the QorIQ LS1012A processor and is optimized to support the high-bandwidth DDR3L memory and a full complement of high-speed SerDes ports. Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Pratiyush Mohan Srivastava <pratiyush.srivastava@nxp.com> Signed-off-by: Abhimanyu Saini <abhimanyu.saini@nxp.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: fsl-layerscape: Add support of QorIQ LS1012A SoCPrabhakar Kushwaha2016-06-03-0/+182
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The QorIQ LS1012A processor, optimized for battery-backed or USB-powered, integrates a single ARM Cortex-A53 core with a hardware packet forwarding engine and high-speed interfaces to deliver line-rate networking performance. This patch add support of LS1012A SoC along with - Update platform & DDR clock read logic as per SVR - Define MMDC controller register set. - Update LUT base address for PCIe - Avoid L3 platform cache compilation - Update USB address, errata - SerDes table - Added CSU IDs for SDHC2, SAI-1 to SAI-4 Signed-off-by: Calvin Johnson <calvin.johnson@nxp.com> Signed-off-by: Makarand Pawagi <makarand.pawagi@mindspeed.com> Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: fsl-layerscape: Organize SoC overview at common locationPrabhakar Kushwaha2016-06-03-0/+86
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SoC overviews are getting repeated across board folders. So, Organize SoC overview at common location i.e. fsl-layerscape/doc Also move README.lsch2 and README.lsch3 in same folder. Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
| * | | | armv8: fsl-layerscape: fix compile warning "rcw_tmp"Prabhakar Kushwaha2016-06-03-1/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c: In function ‘get_sys_info’: arch/arm/cpu/armv8/fsl-layerscape/fsl_lsch2_speed.c:29:6: warning: unused variable ‘rcw_tmp’ [-Wunused-variable] u32 rcw_tmp; Signed-off-by: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
generated by cgit v1.1 at 2024-11-08 16:28:19 +0000