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| * | | x86: Dont clobber %eax after getting memory sizeGraeme Russ2010-10-07-3/+2
| | | | | | | | | | | | | | | | By using another register, reduce code size by one instruction
| * | | x86: Don't clobber %ebxGraeme Russ2010-10-07-7/+12
| | | | | | | | | | | | | | | | %ebx will hold low-level boot flags and must be preserved
| * | | x86: Remove usage of %ebp as a return pointerGraeme Russ2010-10-07-10/+10
| | | | | | | | | | | | | | | | Using %ebp as a return pointer prevents creating 'load anywhere' images
| * | | x86: Move ECC initialisation outside RAM initialisationGraeme Russ2010-10-07-14/+14
| | | | | | | | | | | | | | | | | | | | To allow for 'load anywhere' images, the %ebp return pointer 'hack' must be removed, so we cannot have two 'calls' to get_mem_size
| * | | x86: Remove progress indication in low-level initGraeme Russ2010-10-07-42/+2
| | | | | | | | | | | | | | | | | | | | Progress indication is not relocation friendly so remove it in preperation for full relocatability support
| * | | x86: Fix %ss and %esp in register structure for interruptsGraeme Russ2010-10-07-4/+45
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| * | | x86: Change compiler optionsGraeme Russ2010-10-07-17/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change to: - reparam=3 - no-from-pointer - no-stack-protector - preferred-stack-boundary=2 - no-top-level-reorder These options make the code a little smaller and faster
| * | | x86: Coding Style CleanupGraeme Russ2010-10-07-373/+362
| | | | | | | | | | | | | | | | Perform some basic code cleanups of the x86 files
| * | | x86: Move loading of GTD to C codeGraeme Russ2010-10-07-96/+57
| | | | | | | | | | | | | | | | | | | | Linux has C macros and code to load the GTD after switching to Protected Mode. Using these greatly simplifies the assembler code
| * | | x86: use gc sections to reduce image sizeGraeme Russ2010-10-07-0/+3
| | | | | | | | | | | | | | | | | | | | Follow the discussion of Charles Manning and Mike Frysinger. Using gc_sections helps reduce image size.
| * | | x86: zboot updateGraeme Russ2010-10-07-5/+13
| | | | | | | | | | | | | | | | | | | | | | | | The header of recent Linux Kernels includes the size of the image, and therefore is not needed to be passed to zboot. Still process the third parameter (size of image) in the event that an older kernel is being loaded
| * | | x86: Make CONFIG_RELOC_FIXUP_WORKS generic for all x86 boardsGraeme Russ2010-10-07-0/+2
| | |/ | |/| | | | | | | | | | Relocation is not board-specific for the x86 architectrure, so CONFIG_RELOC_FIXUP_WORKS can be defined globally in the config.h
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-10-11-5/+14
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| * | | powerpc/85xx: fix rev.2 job queue LIODN error stormKim Phillips2010-10-07-4/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | pumping line-rate traffic though a p4080 rev.2, which is configured to encrypt packets prior to forwarding through an IPsec tunnel, gets this error: of_platform ffe302000.jq: DECO: desc idx 22: LIODN error. DECO was trying to share from itself or from another DECO but the two Non-SEQ LIODN values didn't match or the "shared from" DECO's Descriptor required that the SEQ LIODNs be the same and they aren't. Since high traffic rates cause DECOs to begin to start sharing shared descriptors amongst themselves, and DECOs inherit job queue LIODNs when accessing shared descriptors, and a recently discovered rev.2 h/w erratum requires all sharing job queues in a partition have same liodn assignment, reassign the first job queue's liodn assignment to the rest. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | | powerpc/p4080: Add new CPC register - HDBCR0Kumar Gala2010-10-07-1/+4
| |/ / | | | | | | | | | | | | | | | Manual was updated to add a new register for disabling CDQ speculation. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | PowerPC: change board specific early pci_init() into generic.Andre Schwarz2010-10-06-5/+4
| | | | | | | | | | | | Signed-off-by: Andre Schwarz <andre.schwarz@matrix-vision.de>
* | | PCU_E: remove code for yet another corpseWolfgang Denk2010-10-06-7/+2
|/ / | | | | | | | | | | | | The PCU_E board has long reached EOL, and support for it is no longer relevant in current versions of U-Boot. Remove it. Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-blackfinWolfgang Denk2010-10-05-23035/+9619
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| * | Blackfin: fix MMC init output alignmentMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: propagate target cpu defines when building embedded envMike Frysinger2010-10-02-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Since we're no longer extracting the env from the target ELF file (since upstream wouldn't take that change), we're back to the problem of cpu defines not properly propagating to the env setup stage. So the embedded env built by the host compiler doesn't match the one that is linked into the u-boot env. Reported-by: Vivi Li <vivi.li@analog.com> Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: cmd_gpio: accept upper case pin namesMike Frysinger2010-10-02-2/+3
| | | | | | | | | | | | | | | | | | | | | The intention all along was to accept pin names irrelevant of their case. But I guess I forgot to test/implement support for that. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: cmd_gpio: return gpio value to callerMike Frysinger2010-10-02-1/+1
| | | | | | | | | | | | | | | | | | | | | Make the GPIO command usable in a scripting environment by returning the GPIO value rather than always 0. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: cmd_gpio: document/extend input sub-optionMike Frysinger2010-10-02-14/+13
| | | | | | | | | | | | | | | | | | | | | | | | The input sub command was missing from the help text, and it didn't show the actual value currently read on the GPIO. This allows people to read the value of input pins. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: move CONFIG_BFIN_CPU to board config.mkMike Frysinger2010-10-02-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The CONFIG_BFIN_CPU option is largely used in the build system, so move it out of the board config.h and into the board config.mk. It'd be nice to keep everything in the config.h, but the patch to extract that value early was rejected. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf561: merge headersMike Frysinger2010-10-02-1930/+1906
| | | | | | | | | | | | | | | | | | | | | Only the BF561 port was using the common dual core headers, so merge them into the BF561 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf533: merge headersMike Frysinger2010-10-02-1342/+1293
| | | | | | | | | | | | | | | | | | | | | Only the BF533 port was using the common extended headers, so merge them into the BF533 specific headers. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: unify core MMRsMike Frysinger2010-10-02-3456/+350
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf52x: unify arch header duplicationMike Frysinger2010-10-02-2316/+6
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bf537: unify arch header duplicationMike Frysinger2010-10-02-295/+6
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: punt old *p style volatile MMR definesMike Frysinger2010-10-02-13223/+0
| | | | | | | | | | | | | | | | | | These are unused now, so punt them to clean things up. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: punt headers for non-existent BF541Mike Frysinger2010-10-02-448/+0
| | | | | | | | | | | | | | | | | | There is no BF541 processor variant, so punt headers for it. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: bfin_spi: add optional DMA supportMike Frysinger2010-10-02-0/+75
| | | | | | | | | | | | | | | | | | | | | | | | This moves the last piece from the old spi_flash driver to the new SPI framework -- optional DMA RX support. This typically cuts speeds by ~40% at the cost of additional ~300 bytes. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add support for BF51x partsMike Frysinger2010-10-02-0/+2498
| | | | | | | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
| * | Blackfin: add support for BF538/BF539 processorsMike Frysinger2010-10-02-0/+3464
| |/ | | | | | | Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2010-10-05-36/+204
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| * | ppc4xx: Remove some testing hacks from ppc4xx.hStefan Roese2010-10-04-17/+0
| | | | | | | | | | | | | | | | | | | | | I accidentally left these hacks in the code while doing the big header cleanup. Let's remove it now. Signed-off-by: Stefan Roese <sr@denx.de>
| * | ppc4xx: Add defines for COM3 & COM4 (UART2 & UART3) on 440EPx/GRxStefan Roese2010-10-04-0/+2
| | | | | | | | | | | | Signed-off-by: Stefan Roese <sr@denx.de>
| * | APM821xx: Add CPU supportTirumala Marri2010-10-04-19/+202
| |/ | | | | | | | | | | | | | | | | APM821XX is a new line of SoCs which are derivatives of PPC44X family of processors. This patch adds support of CPU, cache, tlb, 32k ocm, bootstraps, PLB and AHB bus. Signed-off-by: Tirumala R Marri <tmarri@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'next' of git://git.denx.de/u-boot-videoWolfgang Denk2010-10-05-55/+7
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| * fsl_diu_fb: further refactoring of FSL DIU codeAnatolij Gustschin2010-09-25-55/+7
| | | | | | | | | | | | | | | | Move common code to the fsl_diu_fb.c file and remove obsolete code from board files (aria, mpc8610hpcd and pdm360ng). Move fsl_diu_fb.h file to the include directory. Signed-off-by: Anatolij Gustschin <agust@denx.de>
* | Merge branch 'next' of /home/wd/git/u-boot/nextWolfgang Denk2010-09-28-1201/+7646
|\ \ | |/ | | | | | | | | | | Conflicts: include/ppc4xx.h Signed-off-by: Wolfgang Denk <wd@denx.de>
| * 83xx: Remove warmboot parameter from PCI init functionsPeter Tyser2010-09-23-6/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | This change lays the groundwork for the BOOTFLAG_* flags being removed. This change has the small affect of delaying 100ms on PCI initialization after a warm boot as opposed to the optimal 1ms on some boards. Signed-off-by: Peter Tyser <ptyser@xes-inc.com> included the mpc8308_p1m board. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: fix pcie build warningKim Phillips2010-09-23-1/+1
| | | | | | | | | | | | | | | | Configuring for MPC8308RDB board... pcie.c: In function 'mpc83xx_pcie_register_hose': pcie.c:143: warning: assignment makes pointer from integer without a cast Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx: add support for setting PCIE clocksIlya Yanok2010-09-23-0/+12
| | | | | | | | | | | | | | | | This patch adds support for setting PCIE clocks in cpu_init.c by providing CONFIG_SYS_SCCR_PCIEXP{1,2} in configuration. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * mpc83xx/pcie: make it compile with PCIE2 unconfiguredIlya Yanok2010-09-23-13/+25
| | | | | | | | | | | | | | | | MPC8308 has only one PCIE host controller so we want it to compile without CONFIG_SYS_PCIE2_CFG_{BASE,SIZE} defined. Signed-off-by: Ilya Yanok <yanok@emcraft.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * ppc4xx: Disable trace broadcast for 44x non debug modeVictor Gallardo2010-09-23-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | By default the trace broadcast is enabled on 44x systems. To reduce power consumption when instruction tracing is not needed, disable trace broadcast. Check External Debug Mode (EDM) bit to detect if it should be disabled or not. Resetting system via a debugger will set the DBCR0[EDM] bit. Resetting via u-boot or OS will not. Signed-off-by: Victor Gallardo <vgallardo@apm.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Cleanup of PVR detection code in cpu.cStefan Roese2010-09-23-71/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch cleans the PVR detection code in check_cpu() up a bit. Basically the strings are better seperated, resulting in an easier to understand and maintain code version. The #ifdef's couldn't be removed easily because of two reasons: - Some SoC revisions have the same PVR, so need a way to differentiate between those two SoC's. - In some case statements registers only available in this SoC variant are referenced. Instead I moved the CONFIG_440 #ifdef a bit, so that 405 platforms don't add this 440 detection code and vice versa. Resulting in this U-Boot image size change: 405EX (Kilauea): 408 bytes less 440EPx (Sequoia): 604 bytes less 460EX (Canyonlands): 564 bytes less Signed-off-by: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de>
| * Remove unused CONFIG_SERIAL_SOFTWARE_FIFO featureStefan Roese2010-09-23-22/+0
| | | | | | | | | | | | | | | | | | This patch removes the completely unused CONFIG_SERIAL_SOFTWARE_FIFO feature from U-Boot. It has only been implemented for PPC4xx and was not used at all. So let's remove it and make the code smaller and cleaner. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de>
| * ppc4xx: Use common NS16550 driver for PPC4xx UARTStefan Roese2010-09-23-716/+242
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch removes the PPC4xx UART driver. Instead the common NS16550 driver is used, since all PPC4xx SoC's use this peripheral device. The file 4xx_uart.c now only implements the UART clock calculation function which also sets the SoC internal UART divisors. All PPC4xx board config headers are changed to use this common NS16550 driver now. Tested on these boards: acadia, canyonlands, katmai, kilauea, sequoia, zeus Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Big header cleanup part 2, mostly PPC405 relatedStefan Roese2010-09-23-845/+610
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This cleanup is done by creating header files for all SoC versions and moving the SoC specific defines into these special headers. This way the common header ppc405.h and ppc440.h can be cleaned up finally. As a part from this cleanup, the GPIO definitions for PPC405EP are corrected. The high and low parts of the registers (for example CONFIG_SYS_GPIO0_OSRL vs. CONFIG_SYS_GPIO0_OSRH) have been defined in the wrong order. This patch now fixes this issue by switching these xxxH and xxxL values. This brings the GPIO 405EP port in sync with all other PPC4xx ports. Signed-off-by: Stefan Roese <sr@denx.de>
generated by cgit v1.1 at 2024-11-08 18:03:37 +0000