| Commit message (Collapse) | Author | Age | Lines |
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MFP macros for UART3 updated.
Signed-off-by: Ajay Bhargav <ajay.bhargav@einfochips.com>
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auto gen asm-offsets.h for mb86r0x
Signed-off-by: Matthias Weisser <weisserm@arcor.de>
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Signed-off-by: Heiko Schocher <hs@denx.de>
Acked-by: Detlev Zundel <dzu@denx.de>
cc: Albert Aribaud <albert.u.boot@aribaud.net>
cc: <macpaul@gmail.com>
cc: Wolfgang Denk <wd@denx.de>
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Rework for AT91SAM9263 SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <uboot@emk-elektronik.de>
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Fix at91sam9261_matrix.h according to the new scheme.
Signed-off-by: Hong Xu <hong.xu@atmel.com>
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Rework for AT91SAM9RL SoC, makes it build again.
Based on the work for AT91SAM9260-EK.
V4: US->USART, cosmetics
Signed-off-by: Hong Xu <hong.xu@atmel.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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Signed-off-by: Asen Dimov <dimov@ronetix.at>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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Bits 0..3 in cs_mask = CS0..CS3 in SPI mode require it to be peripheral
Bits 4..7 in cs_mask = CS0..CS3 in GPIO mode require it to be output
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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The CONFIG_AT91RM9200_USART is an remnant of
18ed5e9550810e2fc5bf2c757aee47774609651c which deleted the
at91rm9200_usart driver.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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The CONFIG_AT91_LEGACY warning became obsolete due to complete removal of
at91rm9200 arch code in arm920t.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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The big "ARM: remove broken boards" series deletes all boards using
obsolete arm920t/at91rm9200 arch code. Therefore we can safely remove
this code now.
Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
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Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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TPS62361 is the new power supply used in OMAP4460 that
supplies vdd_mpu.
VCORE1 from Phoenix supplies vdd_core and VCORE2 supplies
vdd_iva. VCORE3 is not used in OMAP4460.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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- Add mkimage support for OMAP boot image
- Add support for OMAP boot image(MLO) generation in the new
SPL framework
Signed-off-by: John Rigby <john.rigby@linaro.org>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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- Add MMC raw and FAT mode boot support for OMAP
- Provide a means by which parameters passed by ROM-code
can be saved in u-boot.
- Save boot mode related information passed by OMAP4 ROM-code
and use it to determine where to load the u-boot from
- Assumes that the image has a mkimage header. Gets the
payload size and load address from this header. If the
header is not detected assume u-boot.bin as payload
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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- Provide alternate implementations of board_init_f()
board_init_r() for OMAP spl.
- Provide linker script
- Initialize global data
- Add serial console support
- Update CONFIG_SYS_TEXT_BASE to allow for SPL's bss and move
it to board config header from config.mk
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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- Allow SPL to have .bss disjoint from rest of the image
- Allow for .bss setup in CONFIG_SPL_BUILD case too.
- Take care of the special case where relocation offset = 0.
- Compile out exception handling code and install a simpler
vector
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Identify SDRAM devices connected to EMIF automatically:
LPDDR2 devices have some Mode Registers that provide details
about the device such as the type, density, bus width
etc. EMIF has the capability to read these registers. If there
are no devices connected to a given chip-select reading mode
registers will return junk values. After reading as many such
registers as possible and matching with expected ranges of
values the driver can identify if there is a device connected
to the respective CS. If we identify that a device is connected
the values read give us complete details about the device.
This along with the base AC timings specified by JESD209-2
allows us to do a complete automatic initialization of
SDRAM that works on all boards.
Please note that the default AC timings specified by JESD209-2
will be safe for all devices but not necessarily optimal. However,
for the Elpida devices used on Panda and SDP the default timings
are both safe and optimal.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Calculate EMIF register values based on AC timing parameters
from the SDRAM datasheet and the DDR frequency rather than
using the hard-coded values.
For a new board the user doen't have to go through the tedious
process of calculating the register values. Instead, just
provide the AC timings from the device data sheet as input
and the driver will automatically calculate the register values.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Add support for the SDRAM controller (EMIF).
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Add support for:
1. DPLL locking
2. Initialization of clock domains and clock modules
3. Setting up the right voltage on voltage rails
This work draws upon previous work done for x-loader by:
Santosh Shilimkar <santosh.shilimkar@ti.com>
Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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- separate mux settings into essential and non essential parts
- essential part is board independent as of now(so move it
to SoC directory). Will help in having single SPL for all
boards.
- Non-essential part(the pins not essential for u-boot to function)
need to be phased out eventually.
- Correct mux data by aligning to the latest settings in x-loader
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The basic hardware init of OMAP4(s_init()) can happen in 4
different contexts:
1. SPL running from SRAM
2. U-Boot running from FLASH
3. Non-XIP U-Boot loaded to SDRAM by SPL
4. Non-XIP U-Boot loaded to SDRAM by ROM code using the
Configuration Header feature
What level of hw initialization gets done depends on this
context. Add a utility function to find this context.
Signed-off-by: Aneesh V <aneesh@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Some of the LPSC constants were incorrect, and some were missing. This
commit fixes the incorrect constants (which were not used anywhere in
the tree) and adds all constants for both DA830 and DA850, as per the
TI datasheets.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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There are two main sets of LPSC constants, depending on the processor
family. The DA8xx constants were given in an enum whereas the non-DA8xx
constants were preprocessor defines. This commit switches the DA8xx
constants to defines for consistency.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The function davinci_emac_mii_mode_sel() is defined in
board/davinci/common/misc.c for any DA8xx CPU which has
CONFIG_DRIVER_TI_EMAC enabled. However, the prototype was only being
declared in <include/asm/arch/davinci_misc.h> for the DA850 EVM board.
This patch declares it for all DA8xx CPUs where CONFIG_DRIVER_TI_EMAC
is enabled.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Add a generic GPIO driver for the DaVinci DA8xx processors. It is turned
on by defining CONFIG_DA8XX_GPIO and fulfills the generic GPIO interface
specified in <asm/gpio.h> . The driver has support for both manipulating
GPIO pins as well as automatically configuring the pin multiplexor
registers to set the pin function to GPIO.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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In preparation for a generic GPIO driver for the DA8xx processors,
rename <asm/arch/gpio_defs.h> to <asm/arch/gpio.h> and fix up all files
which include it.
Signed-off-by: Laurence Withers <lwithers@guralp.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The array of strings corresponding to cpu revision is
used only when CONFIG_DISPLAY_CPUINFO is selected - in
the function print_cpuinfo().
Enclose definition of this array in #ifdef...#endif for
the same.
Signed-off-by: Sanjeev Premi <premi@ti.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The SHARP LQ084S3LG01 is a TFT LCD used on the P1022DS (revision "C") board.
This device only supports 800x600 resolution, so if that resolution is selected,
assume that this is the device. The device is attached to the LVDS port
on the P1022DS board.
The existing 800x600 entry (for the PDM360NG board) is actually 800x480,
so we fix that. To support two different 800x resolutions, the Y-resolution
is now passed to fsl_diu_init() and both values are used to pick the proper
fb_videomode structure.
The data for the 800x600 video mode is originally from Jiang Yutang.
Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Jiang Yutang <b14898@freescale.com>
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* 'master' of git://git.denx.de/u-boot-blackfin:
Blackfin: jtag-console: fix timer usage
Blackfin: switch to common display_options()
Blackfin: serial: move early debug strings into .rodata section
Blackfin: adi boards: also set stderr to nc with helper
Blackfin: update anomaly lists to latest public info
Blackfin: serial: convert to bfin_{read,write} helpers
Blackfin: split out async setup
Blackfin: adi boards: enable pretty flash progress output
Blackfin: drop unused dma.h header from start code
Blackfin: portmux: allow header to be included in assembly files
Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: enable mmc_spi support
Blackfin: cm-bf537e/cm-bf537u/tcm-bf537: update network settings
Blackfin: sync MMR read/write helpers with Linux
Blackfin: gpio: optimize free path a little
Blackfin: post: setup default CONFIG_SYS_POST_WORD_ADDR
Blackfin: uart: fix printf warning
Blackfin: add init.elf helper code
Blackfin: dont reset SWRST on newer bf526 parts
Blackfin: adi boards: enable multi serial support by default
Blackfin: uart: add multiple serial support
Blackfin: uart: move debug buffers into local bss
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Reported-by: Graeme Russ <graeme.russ@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Use common code to output the version string rather than doing it
ourselves.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Rewrite the assembly serial_early_puts() helper to place the strings
in the .rodata section rather than embedding them directly in the
.text section. Using .text is a little simpler, but it doesn't let
people execute out of internal L1 sram (since core reads don't work
on those regions).
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Since the serial struct declares the sizes for us, no need to hardcode
them in the accessor functions. Let the bfin_{read,write} helpers do
it for us.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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We really only need to tweak the async banks in the initcode if the
processor is booting out of it, otherwise we can wait until later
on in the CPU booting setup.
This also makes testing in the sim and early bring up over JTAG work
much smoother when the initcode gets bypassed.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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When we aren't doing resource tracking, the gpio_free() function is a
stub that simply returns, so pull this logic up a level and make it an
inline stub in the header. Now we don't have to waste time at any of
the call sites.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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Set the default post word location to an L1 data location for all
Blackfin parts so things "just work" for most people.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The code uses %i to printf a size_t when it should use %zu, otherwise
we get a warning from gcc about it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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This creates a standalone ELF that executes just the Blackfin initcode.
This is useful for people who want to program the low level aspects of
the CPU (memory/clocks/etc...) and can easily be used with JTAG for
quick booting while developing.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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The bug in the BF526 rom when doing a software reset exists only in older
silicon versions, so don't clear SWRST on newer parts.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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