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* arm: rmobile: Do not create a symbolic link to sh timerMasahiro Yamada2013-11-17-7/+1
| | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
* powerpc: mpc824x: Do not create a symbolic link to bedbug_603e.cMasahiro Yamada2013-11-17-6/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: mpc83xx: Do not create a symbolic link to ddr-gen2.cMasahiro Yamada2013-11-17-5/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: mpc83xx: delete unused rulesMasahiro Yamada2013-11-17-6/+0
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Makefile: rename all libraries to built-in.oMasahiro Yamada2013-11-17-1/+1
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* powerpc: move mpc8xxx entry under arch/powerpc/cpu/Masahiro Yamada2013-11-17-0/+9
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* Makefile: make directories by Makefile.buildMasahiro Yamada2013-11-17-6/+0
| | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* TI:omap: Update u-boot-spl.lds for i2c multibus/multiadapter updateTom Rini2013-11-15-1/+2
| | | | | | | | | | | In 6789e84 we update u-boot-spl.lds for OMAP to ensure we include adapter information, as we use i2c during SPL. However, the regex used also means we included commands that may have been built. On omap5_uevm this leads to a failure as we include the command from the do_tca642x command, and fail to link. The fix is to restrict our regex to only the i2c list parts. Signed-off-by: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2013-11-14-13/+50
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| * powerpc/85xx: fix broken cpu "clock-frequency" propertyLaurentiu TUDOR2013-11-13-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When indexing freqProcessor[] we use the first value in the cpu's "reg" property, which on new e6500 cores IDs the threads. But freqProcessor[] should be indexed with a core index so, when fixing "the clock-frequency" cpu node property, access the freqProcessor[] with the core index derived from the "reg' property. If we don't do this, last half of the "cpu" nodes will have broken "clock-frequency" values. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * powerpc/t4240: fix per pci endpoint liodn offsetsLaurentiu TUDOR2013-11-13-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the code that builds the pci endpoint liodn offset list so that it doesn't overlap with other liodns and doesn't generate negative offsets like: fsl,liodn-offset-list = <0 0xffffffcd 0xffffffcf 0xffffffd1 0xffffffd3 0xffffffd5 0xffffffd7 0xffffffd9 0xffffffdb>; The update consists in adding a parameter to the function that builds the list to specify the base liodn. On PCI v2.4 use the old base = 256 and, on PCI 3.0 where some of the PCIE liodns are larger than 256, use a base = 1024. The version check is based on the PCI controller's version register. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * powerpc/t4240: set pcie liodn in the correct registerLaurentiu TUDOR2013-11-13-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | The liodn for the T4240's PCIE controller is no longer set through a register in the guts register block but with one in the PCIE register block itself. Use the already existing SET_PCI_LIODN_BASE macro that puts the liodn in the correct register. Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Cc: Scott Wood <scottwood@freescale.com> Cc: York Sun <yorksun@freescale.com>
| * powerpc/83xx: Define USB1 and USB2 base addr for MPC834xramneek mehresh2013-11-13-0/+5
| | | | | | | | | | | | | | Define base addresse for both MPH(USB1) and DR(USB2) controllers for MPC834x socs Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com>
| * powerpc/t1040: Update defines to support T1040SoC personalitiesPriyanka Jain2013-11-13-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | T1040 Soc has four personalities: -T1040 (4 cores with L2 switch) -T1042:Reduced personality of T1040 without L2 switch -T1020:Reduced personality of T1040 with less cores(2 cores) -T1022:Reduced personality of T1040 with 2 cores and without L2 switch Update defines in arch/powerpc header files, Makefiles and in driver/net/fm/Makefile to support all T1040 personalities Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Priyanka Jain <Priyanka.Jain@freescale.com> [York Sun: fixed Makefiles] Acked-by: York Sun <yorksun@freescale.com>
* | i2c, omap24xx: convert driver to new mutlibus/mutliadapter frameworkHeiko Schocher2013-11-13-6/+11
|/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - add omap24xx driver to new multibus/multiadpater support - adapted all config files, which uses this driver Tested on the am335x based siemens boards rut, dxr2 and pxm2 posted here: http://patchwork.ozlabs.org/patch/263211/ Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Tom Rini <trini@ti.com> Cc: Lars Poeschel <poeschel@lemonage.de> Cc: Steve Sakoman <sakoman@gmail.com> Cc: Thomas Weber <weber@corscience.de> Cc: Tom Rix <Tom.Rix@windriver.com> Cc: Grazvydas Ignotas <notasas@gmail.com> Cc: Enric Balletbo i Serra <eballetbo@iseebcn.com> Cc: Luca Ceresoli <luca.ceresoli@comelit.it> Cc: Igor Grinberg <grinberg@compulab.co.il> Cc: Ilya Yanok <yanok@emcraft.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Nishanth Menon <nm@ti.com> Cc: Pali Rohár <pali.rohar@gmail.com> Cc: Peter Barada <peter.barada@logicpd.com> Cc: Nagendra T S <nagendra@mistralsolutions.com> Cc: Michael Jones <michael.jones@matrix-vision.de> Cc: Raphael Assenat <raph@8d.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Stefano Babic <sbabic@denx.de>
* omap3_dss: define DSS_ONOFFNikita Kiryanov2013-11-12-4/+5
| | | | | | | | | | | Add DSS_ONOFF to polarity defines Cc: Tom Rini <trini@ti.com> Cc: Anatolij Gustschin <agust@denx.de> Cc: Igor Grinberg <grinberg@compulab.co.il> Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Acked-by: Igor Grinberg <grinberg@compulab.co.il> Acked-by: Anatolij Gustschin <agust@denx.de>
* ARM: bcm2835: add missing mbox overscan response fieldAndre Heider2013-11-12-0/+1
| | | | | | | | Add the missing "right" field to struct bcm2835_mbox_tag_overscan. Signed-off-by: Andre Heider <a.heider@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Albert ARIBAUD <albert.u.boot@aribaud.net>
* MPC824x: remove obsolete "PN62" boardWolfgang Denk2013-11-11-4/+2
| | | | | | | | | | | The MPC824x processors have long reached EOL, and the PN62 board has not seen any board-specific updates for more than a decade. It is now causing build issues. Instead of wasting time on things nobody is interested in any more, we rather drop this board. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Wolfgang Grandegger <wg@grandegger.com> cc: Tom Rini <trini@ti.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-11-11-35/+203
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| * malta: arch/mips/include/asm/malta.h SPDX license tagPaul Burton2013-11-11-3/+2
| | | | | | | | | | | | | | | | This patch replaces the GPL-2.0 text with a GPL-2.0 SPDX-License-Identifier tag, and adds Imagination Technologies copyright following my recent changes. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: setup PIIX4 interrupt routePaul Burton2013-11-09-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | Without setting up the PIRQ[A:D] interrupt routes, PCI interrupts will be left disabled. Linux does not set up this routing but relies upon it having been set up by the bootloader, reading back the IRQ lines which the PIRQ[A:D] signals have been routed to. This patch routes PIRQA & PIRQB to IRQ 10, and PIRQC & PIRQD to IRQ 11. This matches the setup used by YAMON. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: display "U-boot" on the LCD screenPaul Burton2013-11-09-0/+10
| | | | | | | | | | | | | | Displaying a message on the LCD screen is a simple yet effective way to show the user that the board has booted successfully. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * malta: support for coreFPGA6 boardsPaul Burton2013-11-09-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds support for running on Malta boards using coreFPGA6 core cards, including support for the msc01 system controller used with them. The system controller is detected at runtime allowing one U-boot binary to run on a Malta with either. Due to the PCI I/O base differing between Maltas using gt64120 & msc01 system controllers, the UART setup is modified slightly. A second UART is added so that there is one pointing at the correct address for each system controller. The Malta board then defines its own default_serial_console function to select the correct one at runtime. The incorrect UART will simply not function. Tested on: - A coreFPGA6 Malta running interAptiv and proAptiv bitstreams, both with and without an L2 cache. - QEMU. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * qemu-malta: rename to just "malta"Paul Burton2013-11-09-7/+7
| | | | | | | | | | | | | | | | | | This is in preparation for adapting this board to function correctly on a physical MIPS Malta board. The board is moved into an "imgtec" vendor directory at the same time in order to ready us for any other boards supported by Imagination in the future. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
| * mips32: detect L1 cache sizes if they're not definedPaul Burton2013-11-09-19/+150
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For boards such as the MIPS Malta with an FPGA core card it is desirable to be able to detect the L1 cache sizes at runtime, since they are not dependant upon the board but on the FPGA bitstream in use. This patch performs that detection when the CONFIG_SYS_[DI]CACHE_SIZE macros are not defined by the board configuration. In cases where the sizes are detected this patch also removes the restriction that the I-cache & D-cache line sizes must be the same, as this is not necessarily true. If the cache sizes are defined by a configuration then they will be hardcoded as before, so this patch will not add overhead to such boards. Signed-off-by: Paul Burton <paul.burton@imgtec.com>
* | Merge branch 'iu-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-09-93/+149
|\ \ | |/ |/| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Conflicts: arch/arm/cpu/arm926ejs/mxs/Makefile board/compulab/cm_t35/Makefile board/corscience/tricorder/Makefile board/ppcag/bg0900/Makefile drivers/bootcount/Makefile include/configs/omap4_common.h include/configs/pdnb3.h Makefile conflicts are due to additions/removals of object files on the ARM branch vs KBuild introduction on the main branch. Resolution consists in adjusting the list of object files in the main branch version. This also applies to two files which are not listed as conflicting but had to be modified: board/compulab/common/Makefile board/udoo/Makefile include/configs/omap4_common.h conflicts are due to the OMAP4 conversion to ti_armv7_common.h on the ARM side, and CONFIG_SYS_HZ removal on the main side. Resolution is to convert as this icludes removal of CONFIG_SYS_HZ. include/configs/pdnb3.h is due to a removal on ARM side. Trivial resolution is to remove the file. Note: 'git show' will also list two files just because they are new: include/configs/am335x_igep0033.h include/configs/omap3_igep00x0.h
| * Merge branch 'u-boot-imx/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-07-41/+72
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| | * ARM: mxs: Enable DCDC converter for battery bootMarek Vasut2013-10-31-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the board detected sufficient voltage for battery boot, make sure the DCDC converter is ON and the board is not running only from linregs, otherwise an instability will be observed. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com>
| | * mx6: Remove PAD_CTL_DSE_120ohm from i.MX6DL's IPU1_DI0_PIN4 pinOtavio Salvador2013-10-31-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | This removes the PAD_CTL_DSE_120ohm as done for i.MX6Q's IPU1_DI0_PIN4 pin definition and makes it aligned with 3.0.35-4.1.0 and 3.12 mainline kernel. Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
| | * mx5: lowlevel_init: Remove unused macroFabio Estevam2013-10-31-6/+0
| | | | | | | | | | | | | | | | | | | | | setup_wdog macro is not used anywhere, so just remove it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
| | * ARM: mx5: Enable L2 cacheFabio Estevam2013-10-31-0/+6
| | | | | | | | | | | | | | | | | | Enable L2 cache for improving the system performance. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * ARM: mxs: Setup stack in JTAG modeMarek Vasut2013-10-17-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case the MX23/MX28 is switched into JTAG mode via the BootMode select switches, the BootROM bypasses the CPU core registers initialization. This in turn means that the Stack Pointer (SP) register is not set as it is in every other mode of operation, but instead is only zeroed out. To prevent U-Boot SPL from crashing in this obscure JTAG mode, configure the SP to point at the CONFIG_SYS_INIT_SP_ADDR if the SP is zeroed out. Note that in case the SP is already configured, we must preserve that exact SP value and must not modify it. This is important since in every other mode but the JTAG mode, the SPL returns into the BootROM and BootROM in turn loads U-Boot itself. If the SP were to be corrupted, the BootROM won't be able to continue it's operation after returned from SPL and the system would crash. Finally, add the JTAG mode switch identifier, so it's not recognised as Unknown mode. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br>
| | * ARM: mxs: tools: Use mkimage for BootStream generationMarek Vasut2013-10-17-9/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Now that mkimage can generate an BootStream for i.MX23 and i.MX28, use the mkimage as a default tool to generate the BootStreams instead of the elftosb tool. This cuts out another obscure dependency. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Stefano Babic <sbabic@denx.de>
| | * mx6: compute PLL PFD frequencies rather than using definesPierre Aubert2013-10-17-25/+42
| | | | | | | | | | | | | | | Signed-off-by: Pierre Aubert <p.aubert@staubli.com> CC: Stefano Babic <sbabic@denx.de>
| * | Merge branch 'u-boot-atmel/master' into 'u-boot-arm/master'Albert ARIBAUD2013-11-05-0/+9
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| | * | at91: add defines for reset typeRoger Meier2013-11-04-0/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Roger Meier <r.meier@siemens.com> Acked-by: Bo Shen <voice.shen@atmel.com> Reviewed-by: Heiko Schocher <hs@denx.de> Cc: Andreas Bießmann <andreas.devel@googlemail.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| | * | arm: atmel: at91sam9n12ek: add usb host supportBo Shen2013-11-04-0/+2
| | |/ | | | | | | | | | | | | | | | | | | Add usb host support for at91sam9n12ek board. Signed-off-by: Bo Shen <voice.shen@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
| * | ARM: OMAP5: DDR3: Change io settingsSRICHARAN R2013-11-01-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change from 0x64656465 to 0x64646464 is to remove the weak pull enabled on DQS, nDQS lines. This pulls the differential signals in the same direction which is not intended. So disabling the weak pulls improves signal integrity. On the uEVM there are 4 DDR3 devices. The VREF for 2 of the devices is powered by the OMAP's VREF_CA_OUT pins. The VREF on the other 2 devices is powered by the OMAP's VREF_DQ_OUT pins. So the net effect here is that only half of the DDR3 devices were being supplied a VREF! This was clearly a mistake. The second change improves the robustness of the interface and was specifically seen to cure corruption observed at high temperatures on some boards. With the above two changes better memory stability was observed with extended temperature ranges around 100C. Signed-off-by: Sricharan R <r.sricharan@ti.com>
| * | dra7xx_evm: Enabled UART-boot mode and add dra7xx_evm_uart3 buildMinal Shah2013-11-01-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UART booting is supported on this SoC, but via UART3 rather than UART1. Because of this we must change the board to use UART3 for all console access (only one UART is exposed on this board and a slight HW mod is required to switch UARTs). Signed-off-by: Minal Shah <minal.shah@ti.com> [trini: Make apply to mainline, reword commit] Signed-off-by: Tom Rini <trini@ti.com>
| * | am335x: Enable CONFIG_OMAP_WATCHDOG supportTom Rini2013-11-01-0/+4
| | | | | | | | | | | | | | | | | | | | | There is a board-specific portion for calling watchdog enable itself, in main U-Boot. Signed-off-by: Tom Rini <trini@ti.com>
| * | am33xx, davinci: Create and use <asm/davinci_rtc.h>Tom Rini2013-11-01-50/+56
| |/ | | | | | | | | | | | | Create a common header file for the RTC IP block that is shared between davinci and am33xx. Signed-off-by: Tom Rini <trini@ti.com>
| * zynq: Use arch_cpu_init() instead of lowlevel_init()Michal Simek2013-10-17-0/+6
| | | | | | | | | | | | | | | | | | | | | | Zynq lowlevel_init() was implemented in C but stack pointer is setup after function call in _main(). Move architecture setup to arch_cpu_init() which is call as the first function in board_init_f() which already have correct stack pointer. Reported-by: Sven Schwermer <sven.schwermer@tuhh.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | include: delete include/linux/config.hMasahiro Yamada2013-11-08-33/+0
| | | | | | | | | | | | | | | | | | | | | | | | Linux Kernel abolished include/linux/config.h long time ago. (around version v2.6.18..v2.6.19) We don't need to provide Linux copatibility any more. This commit deletes include/linux/config.h and fixes source files not to include this. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | cosmetic: remove empty lines at the top of fileMasahiro Yamada2013-11-08-11/+0
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
* | sparc: include config.h to start.SMasahiro Yamada2013-11-08-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | arch/sparc/cpu/leon3/start.S requires CONFIG_SYS_SPARC_NWINDOES to be defined: #ifndef CONFIG_SYS_SPARC_NWINDOWS #error Must define number of SPARC register windows, default is 8 #endif But it missed to include <config.h>, which always ended up in compile error. This commit fixes this problem. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Daniel Hellstrom <daniel@gaisler.com>
* | ARM: versatile: convert to common timer codeRob Herring2013-11-04-116/+0
| | | | | | | | | | | | Convert versatile to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: tegra: convert to common timer codeRob Herring2013-11-04-96/+1
| | | | | | | | | | | | Convert tegra to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: socfpga: convert to common timer codeRob Herring2013-11-04-72/+0
| | | | | | | | | | | | Convert socfpga to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: mx25: convert to common timer codeRob Herring2013-11-04-117/+0
| | | | | | | | | | | | Convert mx25 to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
* | ARM: highbank: convert to common timer codeRob Herring2013-11-04-83/+0
| | | | | | | | | | | | Convert highbank to use the commmon timer code. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
generated by cgit v1.1 at 2024-12-22 21:38:36 +0000