summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* Blackfin: move gd/bd to bss by defaultMike Frysinger2012-04-22-23/+43
| | | | | | | | We don't need these setup manually, so let the bss do the rest. On Blackfin systems, we clear the bss before executing any C code that would use these, so this should be fine. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Blackfin: gd_t: relocate volatile markingsMike Frysinger2012-04-22-1/+1
| | | | | | | | | This makes Blackfin behave the same as other ports, and fixes many gcc warnings that show up with 4.5+: board.c:40:1: warning: optimization may eliminate reads and/or writes to register variables Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Prepare v2012.04-rc2; minor Coding Style cleanupWolfgang Denk2012-04-16-1/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* ARM926EJS: Fix cache.c to comply with checkpatch.plMarek Vasut2012-04-16-9/+8
| | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* ARM926EJS: Make asm routines volatile in cache opsMarek Vasut2012-04-16-1/+1
| | | | | | | | | | We certainly don't want the compiler to reorganise the code for dcache flushing. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM1136: MX35: Make asm routines volatile in cache opsStefano Babic2012-04-16-10/+12
| | | | | | | | | | As well as pushed for ARM926EJS, we certainly don't want the compiler to reorganise the code for dcache flushing Fix checkpatch warnings as well. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Marek Vasut <marex@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net>
* ARM: add u-boot.imx as target for i.MX SOCsStefano Babic2012-04-16-0/+3
| | | | | | | | | | | | | | | Freescale SOCs require an header to u-boot.bin The patch adds u-boot.imx to the default targets if the imx file is set (IMX_CONFIG). Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net> CC: Loïc Minier <loic.minier@linaro.org> CC: Mike Frysinger <vapier@gentoo.org> Acked-by: Mike Frysinger <vapier@gentoo.org> Acked-by: Dirk Behme <dirk.behme@de.bosch.com> Tested-by: Dirk Behme <dirk.behme@googlemail.com>
* DMA: Split the APBH DMA init into block and channel initMarek Vasut2012-04-16-1/+9
| | | | | | | | | | | | | | | | | | | | | | | This fixes the issue where mxs_dma_init() was called either twice or never, without introducing any new init hooks. The idea is to allow each and every device using the APBH DMA block to configure and request only the channels it uses, instead of making it call init for all the channels as is now. The common DMA block init part, which only configures the block, is then called from CPUs arch_cpu_init() call. NOTE: This patch depends on: http://patchwork.ozlabs.org/patch/150957/ Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Tested-by: Fabio Estevam <fabio.estevam@freescale.com>
* imx: Remove unneeded/repititive definitions from imx headersVikram Narayanan2012-04-16-6/+0
| | | | | | | Remove gpio related unused/repititive definitions from imx headers. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* ARM: 926ejs: use debug() for misaligned addressesStefano Babic2012-04-16-1/+1
| | | | | | | | | | | | Misaligned warnings are useful to debug faulty drivers. A misaligned warning is printed also when the driver is correct - use debug() instead of printf(). Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Albert Aribaud <albert.u.boot@aribaud.net> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* ARM1136: add cache flush and invalidate operationsAnatolij Gustschin2012-04-16-0/+95
| | | | | | | | | | | | | | | | | | Since commit 5c1ad3e6f8ae578bbe30e09652f1531e9bc22031 (net: fec_mxc: allow use with cache enabled) the FEC_MXC driver uses flush_dcache_range() and invalidate_dcache_range() functions. This driver is also configured for ARM1136 based 'flea3' and 'mx35pdk' boards which currently do not build as there are no ARM1136 specific flush_dcache_range() and invalidate_dcache_range() functions. Add various ARM1136 cache functions to fix building for 'flea3' and 'mx35pdk'. Signed-off-by: Anatolij Gustschin <agust@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Marek Vasut <marex@denx.de> Acked-by: Marek Vasut <marex@denx.de>
* i.MX6: implement enable_caches()Eric Nelson2012-04-16-0/+8
| | | | | | | disabled by default until drivers are fixed Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* i.MX6: define CACHELINE_SIZEEric Nelson2012-04-16-0/+2
| | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Acked-by: Marek Vasut <marex@denx.de>
* Merge branch 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-stagingWolfgang Denk2012-04-09-9/+26
|\ | | | | | | | | | | | | | | * 'marek.vasut@gmail.com' of git://git.denx.de/u-boot-staging: LMB: Fix undefined lmb_reserve() on non-lmb platforms MIPS: fix endianess handling MIPS: fix inconsistency in config option for cache operation mode MIPS: board.c: fix init of flash data in bd_info
| * MIPS: fix endianess handlingDaniel Schwierzeck2012-04-02-6/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Make endianess of target CPU configurable. Use the new config option for dbau1550_el and pb1000 boards. Adapt linking of standalone applications to pass through endianess options to LD. Build tested with: - ELDK 4 mips_4KC- and mips4KCle - Sourcery CodeBench Lite 2011.03-93 With this patch all 26 MIPS boards can be compiled now in one step by running "MAKEALL -a mips". Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: fix inconsistency in config option for cache operation modeDaniel Schwierzeck2012-04-02-1/+5
| | | | | | | | | | | | | | | | | | | | Commit ab2a98b11716364bc5a8c43cdfa7fee176cda1d8 missed to use the new config option in dcache_enable(). Fix this to avoid inconsistencies if someone wants to disable and enable D-caches. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: board.c: fix init of flash data in bd_infoDaniel Schwierzeck2012-04-02-2/+6
| | | | | | | | | | | | | | | | Boards with CONFIG_SYS_NO_FLASH should not forced to define CONFIG_SYS_FLASH_BASE. In this case the flash data in bd_info should be initialized with 0 like the other archs do. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-niosWolfgang Denk2012-04-09-0/+31
|\ \ | |/ |/| | | | | | | | | * 'master' of git://git.denx.de/u-boot-nios: nios2 - adjust gbl data off to account for bd_info nios2: implement get_ticks and get_tbclk nios2: add flush_dcache_range function
| * nios2: implement get_ticks and get_tbclkAlex Hornung2012-02-23-0/+21
| | | | | | | | | | | | | | | | * Copy over Blackfin's get_ticks and get_tbclk - they work just fine on Nios2. Signed-off-by: Alex Hornung <alex@alexhornung.com> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
| * nios2: add flush_dcache_range functionStefan Kristiansson2012-02-23-0/+10
| | | | | | | | | | | | | | | | | | exposes functionality to flush dcache according to the common.h API Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi> Cc: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | BOOT: Add "bootz" command to boot Linux zImage on ARMMarek Vasut2012-03-30-0/+30
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This command boots Linux zImage from where the zImage is loaded to. Passing initrd and fdt is supported. Tested on i.MX28 based DENX M28EVK Tested on PXA270 based Voipac PXA270. NOTE: This currently only supports ARM, but other architectures can be easily added by defining bootz_setup(). Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: albert.u.boot@aribaud.net Cc: afleming@gmail.com, Cc: Simon Glass <sjg@chromium.org>, Cc: Stephen Warren <swarren@nvidia.com> Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Wolfgang Denk <wd@denx.de> Cc: Detlev Zundel <dzu@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-armWolfgang Denk2012-03-30-1861/+2820
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-arm: (146 commits) arm: Use common .lds file where possible arm: add a common .lds link script arm: Remove unneeded setting of LDCSRIPT Define CPUDIR for the .lds link script arm: Remove zipitz2 link script Allow arch directory to contain .lds without requiring Makefile OMAP: Remove omap1610inn-based boards arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warnings board/ti/beagle/beagle.c: Fix build warnings sdrc.c: Fix typo in do_sdrc_init() for SPL tegra: i2c: Add I2C driver tegra: fdt: i2c: Add extra I2C bindings for U-Boot tegra: i2c: Select I2C ordering for Seaboard tegra: i2c: Enable I2C on Seaboard tegra: i2c: Select number of controllers for Tegra2 boards tegra: i2c: Initialise I2C on Nvidia boards tegra: Enhance clock support to handle 16-bit clock divisors fdt: Add function to allow aliases to refer to multiple nodes tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASE tegra: fdt: Enable FDT support for Ventana tegra: fdt: Enable FDT support for Seaboard tegra: usb: Enable USB on Seaboard tegra: usb: Add common USB defines for tegra2 boards tegra: usb: Add USB support to nvidia boards arm: Check for valid FDT after console is up fdt: Avoid early panic() when there is no FDT present tegra: usb: Add support for Tegra USB peripheral tegra: fdt: Add function to return peripheral/clock ID usb: Add support for txfifo threshold tegra: usb: fdt: Add USB definitions for Tegra2 Seaboard tegra: usb: fdt: Add additional device tree definitions for USB ports tegra: fdt: Add clock bindings for Tegra2 Seaboard tegra: fdt: Add clock bindings tegra: fdt: Add additional USB binding fdt: Add tegra-usb bindings file from linux fdt: Add staging area for device tree binding documentation tegra: fdt: Add device tree file for Tegra2 Seaboard from kernel tegra: fdt: Add Tegra2x device tree file from kernel arm: fdt: Add skeleton device tree file from kernel fdt: Add basic support for decoding GPIO definitions fdt: Add functions to access phandles, arrays and bools fdt: Tidy up a few fdtdec problems fdt: Add tests for fdtdec fdt: Add fdtdec_find_aliases() to deal with alias nodes arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer load net: fec_mxc: allow use with cache enabled net: force PKTALIGN to ARCH_DMA_MINALIGN i.MX28: Enable caches by default i.MX28: Make use of the bounce buffer i.MX28: Do data transfers via DMA in MMC driver MMC: Implement generic bounce buffer i.MX28: Add cache support to MXS NAND driver i.MX28: Add cache support into the APBH DMA driver ARM926EJS: Implement cache operations board/vpac270/onenand.c: Fix build errors nhk8815: fix build errors atmel-boards: add missing atmel_mci.h ARM: highbank: setup env from boot source register ARM: highbank: change env config to use nvram ARM: highbank: add reset support ARM: highbank: Add boot counter support ARM: highbank: change TEXT_BASE to 0x8000 ARM: highbank: fix us_to_tick calculation ARM: highbank: add missing get_tbclk ARM: highbank: fix warning for calxedaxgmac_initialize net: calxedaxgmac: fix build due to missing __aligned definition EXYNOS: Add structure for Exynos4 DMC EXYNOS: SMDK5250: Support all 4 UARTs ARM: fix s3c2410 timer code ARM: davinci: fixes for cam_enc_4xx board omap3_spi: receive transmit mode calimain, enbw_cmc: Fix typo in comments Davinci: ea20: use gpio framework to access gpios OMAP3: mt_ventoux: sets its own mtdparts OMAP3: mt_ventoux: updated timing for FPGA twl4030: fix potential power supply handling issues NAND: TI: fix warnings in omap_gpmc.c cam_enc_4xx: Rename 'images' to 'imgs' arm: Add Prep subcommand support to bootm OMAP3: twister: add support to boot Linux from SPL SPL: call cleanup_before_linux() before booting Linux OMAP3: SPL: do not call I2C init if no I2C is set. Add cache functions to SPL for armv7 devkit8000: Implement and activate direct OS boot omap/spl: change output of spl_parse_image_header omap-common/spl: Add linux boot to SPL devkit8000/spl: init GPMC for dm9000 in SPL omap-common: Add NAND SPL linux booting devkit8000: add config for spl command Add cmd_spl command mx53ard: Initialize return code with error mx53: Make PLL2 to be the parent of UART clock configs: imx: Use CONFIG_SF_DEFAULT_CS mx28evk: Provide default values for SPI bus and chip select USB: ehci-mx6: Add proper IO accessors mx6: Read silicon revision from register i.MX28: Drop __naked function from spl_mem_init mxs_spi: Return proper timeout error i.MX28: Make the stabilization delays shorter pmic_i2c: Return error in case of invalid pmic_i2c_tx_num mx6: Remove duplicate definition of ANATOP_BASE_ADDR mx6: Fix reset cause for Power On Reset case i.MX6: mx6qsabrelite: add MACH_TYPE_MX6Q_SABRELITE i.MX6: mx6q_sabrelite: add CONFIG_REVISION_TAG i.MX28: Enable additional DRAM address bits mx6q: mx6qsabrelite: setup_spi() should be called in board_init to allow use for environment mx31: add "ARM11P power gating" to get_reset_cause mx31pdk: Fix CONFIG_SYS_MEMTEST_END efikamx: Fix CONFIG_SYS_MEMTEST_END mx53smd: Fix CONFIG_SYS_MEMTEST_END mx53evk: Fix CONFIG_SYS_MEMTEST_END mx51evk: Fix CONFIG_SYS_MEMTEST_END i.MX6: mx6qsabrelite: add ext2 support imximage: Remove overwriting of flash_offset IXP: Fix GPIO_INT_ACT_LOW_SET() IXP: Fix NAND build warning on PDNB3 and SCPU IXP: Move PDNB3 and SCPU from Makefile to boards.cfg IXP: Squash warnings in IXP NPE IXP: Fix missing MACH_TYPE_{ACTUX?,PNB3,DVLHOST} IXP: Make IXP buildable with arm-linux- toolchains Examples: Properly append LDFLAGS to LD command SPL: Enable YMODEM support on BeagleBone and AM335x EVM SPL: Add YMODEM over UART load support SPL: Add README.omap3 README: document more SPL config options spl.c: Use __noreturn decorator config.mk: Check for -fstack-usage support config.mk: Make cc-option create a file under include/generated ...
| * | arm: Use common .lds file where possibleSimon Glass2012-03-30-1071/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Each cpu directory currently has its own .lds file. This is only needed in most cases because the start.o file is in a different subdir. Now that we can factor out this difference, we can move most cpus over to the common .lds file. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | arm: add a common .lds link scriptSimon Glass2012-03-30-0/+94
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Most ARM CPUs use a very similar link script. This adds a basic script that can be used by most CPUs. Two new symbols are introduced which are intended to eventually be defined on all architectures to make things easier for generic relocation and reduce special-case code for each architecture: __image_copy_start is the start of the text area (equivalent to the existing _start on ARM). It marks the start of the region which must be copied to a new location during relocation. This symbol is called __text_start on x86 and microblaze. __image_copy_end is the end of the region which must be copied to a new location during relocation. It is normally equal to the start of the BSS region, but this can vary in some cases (SPL?). Making this an explicit symbol on its own removes any ambiguity and permits common code to always do the right thing. This new script makes use of CPUDIR, now defined by both Makefile and spl/Makefile, to find the directory containing the start.o object file, which is always placed first in the image. To permit MMU setup prior to relocation (as used by pxa) we add an area to the link script which contains space for this. This is taken from commit 7f4cfcf. CPUs can put the contents in there using their start.S file. BTW, shouldn't that area be 16KB-aligned? Signed-off-by: Simon Glass <sjg@chromium.org>
| * | arm: Remove unneeded setting of LDCSRIPTSimon Glass2012-03-30-7/+0
| | | | | | | | | | | | | | | | | | | | | | | | This is set by the top level Makefile anyway, so drop it. This does have the effect of changing the order - now the board link script will have preference over the CPU one. But this seems more correct anyway. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | arch/arm/cpu/armv7/omap-common/clocks-common.c: Fix build warningsAnatolij Gustschin2012-03-29-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix: clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used [-Wunused-but-set-variable] clocks-common.c: In function 'setup_non_essential_dplls': clocks-common.c:323:6: warning: variable 'sys_clk_khz' set but not used [-Wunused-but-set-variable] Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Tom Rini <trini@ti.com>
| * | sdrc.c: Fix typo in do_sdrc_init() for SPLTom Rini2012-03-29-1/+1
| | | | | | | | | | | | | | | | | | We need to setup CS0 and CS1 not CS0 and CS0 again. Signed-off-by: Tom Rini <trini@ti.com>
| * | tegra: i2c: Add I2C driverYen Lin2012-03-29-0/+157
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add basic i2c driver for Tegra2 with 8- and 16-bit address support. The driver requires CONFIG_OF_CONTROL to obtain its configuration from the device tree. (Simon Glass: sjg@chromium.org modified for upstream) Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Heiko Schocher <hs@denx.de> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: fdt: i2c: Add extra I2C bindings for U-BootSimon Glass2012-03-29-1/+9
| | | | | | | | | | | | | | | | | | | | | | | | Add U-Boot's peripheral clock information to the Tegra20 device tree file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Enhance clock support to handle 16-bit clock divisorsSimon Glass2012-03-29-24/+49
| | | | | | | | | | | | | | | | | | | | | | | | I2C ports have a 16-bit clock divisor. Add code to handle this special case so that I2C speeds below 150KHz are supported. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: Rename NV_PA_PMC_BASE to TEGRA2_PMC_BASESimon Glass2012-03-29-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | Change this name to fit with the current convention in the Tegra header file. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | arm: Check for valid FDT after console is upSimon Glass2012-03-29-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | When using CONFIG_OF_CONTROL, add a check that we have a valid FDT and panic() if not. This must be done after the console is ready. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: usb: Add support for Tegra USB peripheralSimon Glass2012-03-29-1/+717
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds basic support for the Tegra2 USB controller. Board files should call board_usb_init() to set things up. Configuration is performed through the FDT, with aliases used to set the order of the ports, like this fragment: aliases { /* This defines the order of our USB ports */ usb0 = "/usb@0xc5008000"; usb1 = "/usb@0xc5000000"; }; drivers/usb/host files ONLY: Acked-by: Remy Bohmer <linux@bohmer.net> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: fdt: Add function to return peripheral/clock IDSimon Glass2012-03-29-0/+71
| | | | | | | | | | | | | | | | | | | | | | | | | | | A common requirement is to find the clock ID for a peripheral. This is the second cell of the 'clocks' property (the first being the phandle itself). Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: usb: fdt: Add additional device tree definitions for USB portsSimon Glass2012-03-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds clock references to the USB part of the device tree for U-Boot, and marks USB1 as supporting legacy mode (which we disable in the driver). The USB timing information may vary between boards sometimes, but for now we hard-code it in C. This is because all current T2x boards use the same values, we will deal with T3x later and we first need to agree on the format for this timing information in the fdt and may in fact decide that it has no place there. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: fdt: Add clock bindingsSimon Glass2012-03-29-0/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds a basic binding for the oscillator and peripheral clocks. The second cell is the clock number, defined as the bit number within the clock enable register if the peripheral clock. This uses the RFC clock bindings from Grant Likely so may change later: https://lkml.org/lkml/2011/12/12/498 It is taken from Stephen Warren's patch here: http://patchwork.ozlabs.org/patch/141359/ Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: fdt: Add Tegra2x device tree file from kernelSimon Glass2012-03-29-0/+170
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was taken from commit b48c54e2 at: git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git config.mk is updated to provide this file to boards through the built-in mechanism: /include/ ARCH_CPU_DTS Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | arm: fdt: Add skeleton device tree file from kernelSimon Glass2012-03-29-0/+13
| | | | | | | | | | | | | | | | | | | | | | | | This was taken from commit b48c54e2 at: git://git.kernel.org/pub/scm/linux/kernel/git/olof/tegra.git Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | arm: Tegra2: Fix ELDK42 gcc failure with inline asm stack pointer loadTom Warren2012-03-29-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The 4.2.2 gcc in the ELDK42 release doesn't like the direct SP load using a constant in tegra2_start. Change it to use a load thru another reg using mov sp, %0 : : "r"(CONST). Tested on my Seaboard T20-A03, U-Boot loads and runs OK. Also compiled all tegra2 builds with both gcc 4.2.2 and 4.4.1 OK. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org>
| * | i.MX28: Enable caches by defaultMarek Vasut2012-03-29-0/+10
| | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de>
| * | ARM926EJS: Implement cache operationsMarek Vasut2012-03-29-12/+54
| | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Stefano Babic <sbabic@denx.de>
| * | nhk8815: fix build errorsAnatolij Gustschin2012-03-28-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix: common/libcommon.o: In function `cread_line': /home/ag/git/u-boot/common/main.c:695: undefined reference to `get_ticks' /home/ag/git/u-boot/common/main.c:695: undefined reference to `get_tbclk' /home/ag/git/u-boot/common/main.c:698: undefined reference to `get_ticks' Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Alessandro Rubini <rubini@unipv.it> Acked-by: Marek Vasut <marex@denx.de> Acked-by: Alessandro Rubini <rubini@unipv.it>
| * | ARM: highbank: add reset supportRob Herring2012-03-28-0/+1
| | | | | | | | | | | | | | | | | | | | | Implement reset for highbank platform. Reset is triggered via a wfi instruction, so enabling armv7 for the compiler is necessary. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | ARM: highbank: Add boot counter supportRob Herring2012-03-28-1/+37
| | | | | | | | | | | | | | | | | | Add boot counter support using an sysreg which is persistent across reset. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | ARM: highbank: fix us_to_tick calculationRob Herring2012-03-28-2/+2
| | | | | | | | | | | | | | | | | | | | | udelay calls were off due to failing to convert us to ns. Fix this and drop the unnecessary shifts since NS_PER_TICK is only 7ns. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | ARM: highbank: add missing get_tbclkRob Herring2012-03-28-0/+5
| | | | | | | | | | | | | | | | | | | | | The get_tbclk function was missing and the recent commit "common: add possibility for readline_into_buffer timeout" makes it required. Signed-off-by: Rob Herring <rob.herring@calxeda.com>
| * | EXYNOS: Add structure for Exynos4 DMCChander Kashyap2012-03-27-0/+109
| | | | | | | | | | | | | | | | | | | | | Add exynos4_dmc structure in dmc.h for exynos4 dram controllor(DMC). Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | ARM: fix s3c2410 timer codeDavid Müller (ELSOFT AG)2012-03-27-44/+20
| | | | | | | | | | | | | | | | | | | | | | | | This patch fixes the s3c24x0 timer code to work with the ARM relocation feature. Signed-off-by: David Mueller <d.mueller@elsoft.ch> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
| * | arm: Add Prep subcommand support to bootmSimon Schwarz2012-03-27-169/+206
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Adds prep subcommand to bootm implementation of ARM. When bootm is called with the subcommand prep the function stops right after ATAGS creation and before announce_and_cleanup. This is used in command "cmd_spl export" Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de> Tested-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: call cleanup_before_linux() before booting LinuxStefano Babic2012-03-27-1/+1
| | | | | | | | | | | | | | | | | | | | | Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tom Rini <tom.rini@gmail.com> CC: Wolfgang Denk <wd@denx.de> CC: Simon Schwarz <simonschwarzcor@gmail.com>
generated by cgit v1.1 at 2024-11-08 19:37:07 +0000