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* imx: imx7d: fix ahb clock mux 1Stefan Agner2016-05-07-1/+1
| | | | | | | | | | | | | | | The clock parent of the AHB root clock when using mux option 1 is the SYS PLL 270MHz clock. This is specified in Table 5-11 Clock Root Table of the i.MX 7Dual Applications Processor Reference Manual. While it could be a documentation error, the 270MHz parent is also mentioned in the boot ROM configuration in Table 6-28: The clock is by default at 135MHz due to a POST_PODF value of 1 (=> divider of 2). Signed-off-by: Stefan Agner <stefan@agner.ch> (cherry picked from commit 8183b60202754d9d33ac1a2a68a5cc2cc4640fc6)
* MLK-12658 imx: adjust POR_B setting on i.MX6ULLAnson Huang2016-04-15-0/+13
| | | | | | | | | | | | Adjust POR_B settings on i.MX6ULL according to design team's suggestion: 2'b00 : always PUP100K 2'b01 : PUP100K when PMIC_ON_REQ || SOC_NOT_FAIL 2'b10 : always disable PUP100K 2'b11 : PDN100K when SOC_FAIL, PUP100K when SOC_NOT_FAIL -- recommended setting Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12628 imx: mx6sx: enable MXC_CCM_CCGR3_LDB_DI0_OFFSETPeng Fan2016-04-12-3/+3
| | | | | | | MXC_CCM_CCGR3_LDB_DI0_OFFSET should not be disabled for i.MX6SX. Otherwise met compile error. And Discard the if else. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12616-11 imx: mx6ull: add mx6ull arm2 board supportPeng Fan2016-04-12-0/+6
| | | | | | | | | | | | Support mx6ull ddr3 arm2 board. DDR script version 1.1. Passed memtester on 3 boards. Take mx6ul 14x14 ddr3 arm2 as reference. Note: LCD/NAND/ECSPI not tested, need hardware rework. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12616-10 mx6ull: Add AIPS3 initializationYe Li2016-04-12-3/+3
| | | | | | Since the mx6ull adds the AIPS3, so enable its initialization. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-9 mx6ull: Update memory map addressYe Li2016-04-12-2/+16
| | | | | | | Update memory map address for mx6ull which uses AIPS3 and adjust UART8 to AIPS3 by replacing for ESAI. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-8 mx6ull: update CCM registers and clock settingsYe Li2016-04-12-32/+84
| | | | | | Update CCM registers and clock settings according the mx6ull changes Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-7 mx6ull: Not apply the PMIC_STBY_REQ_PAD work around for mx6ullPeng Fan2016-04-12-1/+1
| | | | | | Since the work around is only for mx6ul TO1.0, so not use it for mx6ull. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12616-6 mx6ull: Update s_init to skip pfd resetYe Li2016-04-12-2/+3
| | | | | | | The PFD reset is not needed for mx6ull, since it uses runtime cpu id checking here, add codes to skip it. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-5 GPT: Update GPT driver for MX6ULLYe Li2016-04-12-4/+5
| | | | | | | The MX6ULL has GPT with supporting OSC clock source, update the driver accordingly. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-3 mx6ull: Enable CONFIG_MX6UL definition for MX6ULLYe Li2016-04-12-0/+4
| | | | | | | | | Since iMX6ULL is derivative of iMX6UL, most of design are same, so enable CONFIG_MX6UL to reduce duplicated effort. We can use CONFIG_MX6ULL for the difference between these two chips. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-2 mx6ull: add MX6ULL major CPU TypeYe Li2016-04-12-2/+5
| | | | | | Add MXC_CPU_MX6ULL for i.MX6ULL CPU ID Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12616-1 mx6ull: Add iomux header fileYe Li2016-04-12-1/+1065
| | | | | | Add iomux headers according the file SDK_IOMaps_i.MX6ULL_Headers_b151218.zip Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12576 imx: imx6ul: disable POR_B internal pull upAnson Huang2016-03-24-0/+9
| | | | | | | | | From TO1.1, SNVS adds internal pull up control for POR_B, the register filed is GPBIT[1:0], after system boot up, it can be set to 2b'01 to disable internal pull up. It can save about 30uA power in SNVS mode. Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
* MLK-12492-1 mx6: fix type style problems introduced by patch MLK-12483Ye Li2016-03-04-79/+85
| | | | | | | Some type style problems found by review-commits for previous patch MLK-12483, fix them in this patch and re-check. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12488 mx6sl/ul/sx: Fix incorrect clear mmdc_ch0 handshake maskYe Li2016-03-04-1/+4
| | | | | | | | | Since the MX6UL/SL/SX only has one DDR channel, in CCM_CCDR register the bit[17] for mmdc_ch0 is reserved and its proper state should be 1. When clear this bit, the periph_clk_sel cannot be set and that CDHIPR[periph_clk_sel_busy] handshake never clears. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12483-4 mx6: Modify drivers to disable fused modulesYe Li2016-03-04-8/+7
| | | | | | | | | | Add the fuse checking in drivers, when the module is disabled in fuse, the driver will not work. Changed drivers: BEE, GPMI, APBH-DMA, ESDHC, FEC, QSPI, ECSPI, I2C, USB-EHCI, GIS, LCDIF. Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12483-3 mx6: Add a module fuse checkingYe Li2016-03-04-0/+385
| | | | | | | | | | | | | | | Implement a functionality to read the soc fuses and check if any module is fused. For fused module, we have to disable it in u-boot dynamically, and change the its node in FDT to "disabled" status before starting the kernel. In this patch, we implement the ft_system_setup for FDT fixup. This function will be called during boot process or by "fdt systemsetup" command. To enable the module fuse checking, two configurations must be defined: CONFIG_MODULE_FUSE CONFIG_OF_SYSTEM_SETUP Signed-off-by: Ye Li <ye.li@nxp.com>
* MLK-12375 imx: mx6ul: fix PMIC_STBY_REQ settinng for TO1.1Peng Fan2016-03-04-6/+8
| | | | | | TO1.1 already fixed this PMIC_STBY_REQ open drain issue. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MA-7455 Import picosom boot codesHaoran Wang2016-03-04-0/+5
| | | | | | | | Imported the picosom boot codes and board configs from technexion. Signed-off-by: Tapani Utriainen <tapani@technexion.com> Signed-off-by: Haoran Wang <Haoran.Wang@freescale.com>
* MLK-12156 mx6ul: Update iomux head file to version 151130Ye.Li2016-03-04-0/+25
| | | | | | | The latest iomux head file generated by tool has added some new pinmux settings. Update the mx6ul_pins.h to this version. Signed-off-by: Ye.Li <ye.li@nxp.com>
* common: bootm: check return value of strict_strtoulPeng Fan2016-03-04-1/+4
| | | | | | | | | | | | | | | Before continue, check return value of strict_strtoul. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Simon Glass <sjg@chromium.org> Cc: Jan Kiszka <jan.kiszka@siemens.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Hans de Goede <hdegoede@redhat.com> Cc: York Sun <yorksun@freescale.com> Cc: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org> (cherry picked from commit bc3c89b1308281edceb67051a44026545dc7b505)
* MLK-12068 imx: mx6ul/sx: fix mmdc_ch0 clk calculationPeng Fan2016-03-04-3/+57
| | | | | | | | Fix mmdc_ch0 clk calculation. Also add PLL_AUDIO/VIDEO support for decode_pll. Reported-by: Bai Ping <ping.bai@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12066 imx: mx7: default enable MDIO open drainPeng Fan2016-03-04-0/+22
| | | | | | | | | The management data input/output (MDIO) requires open-drain, i.MX7D TO1.0 ENET MDIO pin has no open drain, but TO1.1 supports this feature. So to TO1.1, need to enable open drain by setting bits GPR0[8:7] for TO1.1. Signed-off-by: Peng Fan <peng.fan@nxp.com>
* MLK-12030: imx: mx7d: fix the temperature checking for TO1.1Peng Fan2016-03-04-0/+2
| | | | | | | We can rely on finish bit for temperature reading for TO1.1. Also introduce CHIP_REV_xx macros for 7D. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11946 arm: config: disable pic when compiling codePeng Fan2016-03-04-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Android's tool chain enable the -mandroid at default. This option will enable the -fpic, which cause uboot compilation failure: " LD u-boot u-boot contains unexpected relocations: R_ARM_ABS32 R_ARM_RELATIVE " In my testcase, arm-linux-androideabi-gcc-4.9 internally enables '-fpic', so when compiling code, there will be relocation entries using type R_ARM_GOT_BREL and .got section. When linking all the built-in.o using ld, there will be R_ARM_ABS32 relocation entry and .got section in the final u-boot elf image. This can not be handled by u-boot, since u-boot only expects R_ARM_RELATIVE relocation entry. arm-poky-linux-gnueabi-gcc-4.9 default does not enable '-fpic', so there is not .got section and R_ARM_GOT_BREL in built-in.o. And in the final u-boot elf image, all relocation entries are R_ARM_RELATIVE. we can pass '-fno-pic' to xxx-gcc to disable pic. whether the toolchain internally enables or disables pic, '-fno-pic' can work well. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11784 imx: mx7: uboot plugin change for mfgtoolYe.Li2015-11-02-0/+19
| | | | | | | | | | Fixed the issue that mfgtool failed to download u-boot with plugin enabled. The u-boot plugin common codes should not call rom___pu_irom_hwcnfg_setup when using serial download mode. rom___pu_irom_hwcnfg_setup will load the IVT2 image from boot media, but this is invalid for USB serial download mode. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11553 imx: mx7 fix typo for showclocksPeng Fan2015-09-15-2/+2
| | | | | | | This piece of code is for mx7, we should not use do_mx6_showclocks. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11528 imx: mx6ul check fuse before init beePeng Fan2015-09-10-1/+11
| | | | | | | | | | | Need to check fuse bit 25 of bank 0 word 4 before initialize bee. The bit: 0 means bee enabled, 1 means bee disabled. If disabled, continuing initialize bee will cause system hang, so need to check this bit before initialize bee. Add macro to enable BEE in header file, default disabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11505 imx: mx6ul: Disable the LCDIF before system resetYe.Li2015-09-08-0/+9
| | | | | | | | | | We meet reset failure on mx6ul 9x9 evk. The internal reset logic between MMDC and functional modules seems relate with the issue. Turn off the LCDIF to stop DDR access before reset to avoid this possible internal reset problem. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11408-2 imx: mx7d: Isolate 26 IP resources to domain 0 for A coreYe.Li2015-08-25-0/+51
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | In current design, if any peripheral was assigned to both A7 and M4, it will receive ipg_stop or ipg_wait when any of the 2 platforms enter low power mode. We will have a risk that, if A7 enter wait, M4 enter stop, peripheral will have chance to get ipg_stop and ipg_wait asserted same time. There are 26 peripherals impacted by this IC issue: SIM2(sim2/emvsim2) SIM1(sim1/emvsim1) UART1/UART2/UART3/UART4/UART5/UART6/UART7 SAI1/SAI2/SAI3 WDOG1/WDOG2/WDOG3/WDOG4 GPT1/GPT2/GPT3/GPT4 PWM1/PWM2/PWM3/PWM4 ENET1/ENET2 Software Workaround: The solution is set M4 to a different domain with A core. So the peripherals are not shared by them. This way requires the uboot implemented the RDC driver and set the 26 IPs above to domain 0 only. CM4 image will set the M4 to domain 1 only. This patch enables the CONFIG_MXC_RDC for mx7d SABRESD board and ARM2 boards, and setup the 26 IP resources to domain 0. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11408-1 imx: mx7d: Add mx7d RDC driver supportYe.Li2015-08-25-0/+190
| | | | | | | Add the peripherals/masters definitions and registers base addresses for mx7d RDC. Enable the RDC driver by setting CONFIG_MXC_RDC. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10957: ARM: mx6qp: do not turn off PURobin Gong2015-07-31-1/+2
| | | | | | | | | There is narrow window that PRE driver is ready but GPU driver probe later, and the later GPU driver turn on PU may cause 'PRE hang' issue. To simplify thing, do not turn off PU in u-boot. Signed-off-by: Robin Gong <b38343@freescale.com> (cherry picked from commit 6b0787b726e2ff32210d742d93ecd3f4bb2ae402)
* MLK-10932-2 ARM: imx7: imx-regs: add disconnect_from_pc APIPeter Chen2015-07-14-1/+2
| | | | | | | | | Add disconnect_from_pc API which is used to disconnect the connection with PC which is established at rom code. Tested-by: Spring Zhang <b17931@freescale.com> Tested-by: Zhang Sanshan <b51434@freescale.com> Signed-off-by: Peter Chen <peter.chen@freescale.com>
* MLK-10932-1 ARM: imx6: imx-regs: add disconnect_from_pc APIPeter Chen2015-07-14-1/+2
| | | | | | | Add disconnect_from_pc API which is used to disconnect the connection with PC which is established at rom code. Signed-off-by: Peter Chen <peter.chen@freescale.com>
* MLK-11228-2 android: Add fastboot command "reboot-bootloader" supportYe.Li2015-07-13-0/+12
| | | | | | | | | enable fastboot command: "fastboot reboot-bootloader" After type this command, the board will reboot to bootloader mode. Set ANDROID_FASTBOOT_BOOT flag in SNVS_LPGPR before reboot. Signed-off-by: Zhang Sanshan <b51434@freescale.com> Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11228-1 android: Integrate community fastboot with FSL i.MX fastbootYe.Li2015-07-13-79/+10
| | | | | | | | | | | | | | | | | | | | | 1. Replace the UDC driver with community's USB gadget d_dnl driver. 2. Integrate the FSL SD/SATA/NAND flash operations, since the GPT and EFI partitions are not support by i.MX. 3. Add FDT support to community's android image. 4. Change the booti command to boota, due to the booti has been used for ARM64 image boot. 5. Modify boota implementation to load ramdisk and fdt to their loading addresses specified in boot.img header, while bootm won't do it for android image. 6. Modify the android image HAB implementation. Authenticate the boot.img on the "load_addr" for both SD and NAND. 7. Enable new configuration CONFIG_FSL_FASTBOOT for Freescale's fastboot with relevant header file "fsl_fastboot.h". While disabling the configuration, the community fastboot is used. 8. Use community's way to combine cmdline in boot.img and u-boot environment, not overwrite the cmdline in boot.img Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11216-1 imx:mx7d_12x12_ddr3_arm2 add missed Kconfig filesPeng Fan2015-07-03-0/+5
| | | | | | Add missed Kconfig files for mx7d_12x12_ddr3_arm2 board. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11201 mx7: clock: Fix PLL divider for the 100MHz caseFabio Estevam2015-06-29-1/+1
| | | | | | | We should divide the 1000MHz ENET PLL clock by 10 in order to achieve 100MHz, so fix the divider accordingly. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* MLK-11159-2 Revert "MLK-11028 imx: mx6qp change L2 prefetch offset to 0"Robby Cai2015-06-24-1/+1
| | | | | | | | | | | | This reverts commit 2bc93d766dee5d5dc33035446f82622c4f1fb784. After further investigation, find L2 prefetch offset setting of 0xF is not the root cause for USB stress reboot failure. With the fix in USB driver, and L2 prefetch offset setting of 0xF, the reboot stress test has passed 4-days both on imx6q and imx6qp sabreauto board. Signed-off-by: Robby Cai <r63905@freescale.com> (cherry picked from commit 6e9282c2567b2820699fa55d2c6bf0ab78e992d6)
* MLK-11135-2 imx: mx6ul: Add MX6UL LPDDR2 ARM2 board supportYe.Li2015-06-19-0/+5
| | | | | | | | | Add MX6UL LPDDR2 ARM2 board BSP codes, supported peripherals: SD1, eMMC(USDHC2), USB OTG1, I2C, ENET2, PMIC. Due to a board issue, the SD1 only supports 1 bit bus width. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11101 imx: mx6: Move the set_wdog_reset out of CONFIG_LDO_BYPASS_CHECKYe.Li2015-06-12-22/+22
| | | | | | | | Since the 6ul does not enable the CONFIG_LDO_BYPASS_CHECK, but have to use the set_wdog_reset function. Need to move the funciton out of CONFIG_LDO_BYPASS_CHECK to resolve build issue. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11028 imx: mx6qp change L2 prefetch offset to 0Peng Fan2015-06-12-1/+1
| | | | | | Change L2 prefetch offset to 0 to make system stable. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-11064 imx: mx6qp: Adjust AQos settings for peripheralsYe.Li2015-06-08-0/+3
| | | | | | | | | To resolve USB camera bandwidth issue, the patch sets recommended AQoS setting from IC team value for peripheral and only on imx6qp. The address is: 0xbb0608, the value is: 0x80000201 Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-11050 ARM: imx6: configure the PMIC_STBY_REQ pin as open drainBai Ping2015-06-05-0/+9
| | | | | | | Configure the PMIC_STBY_REQ pin as open drain 100K according to the design team's requirement for the PMIC_STBY_REQ pin. Signed-off-by: Bai Ping <b51503@freescale.com>
* MLK-11008 imx: HAB: Fix secure boot configuration and build issueYe.Li2015-06-01-1/+1
| | | | | | | | | | | 1. There is conflict when building secure boot, because some common codes for MPC are included by using same configuration. So modify the makefile to get rid of them. 2. The 6UL arch config is missed in hab.h. Fix this issue by using the CONFIG_ROM_UNIFIED_SECTIONS. Signed-off-by: Ye.Li <B37916@freescale.com>
* MLK-10981 mxc: ocotp fix hole in shadow registersPeng Fan2015-05-29-1/+2
| | | | | | | | | | | | | | | | | | | | There is a hole in shadow registers address map of size 0x100 between bank 5 and bank 6 on iMX6QP, iMX6DQ, iMX6SDL, iMX6SX and iMX6UL. Bank 5 ends at 0x6F0 and Bank 6 starts at 0x800. When reading the fuses, we should account for this hole in address space. Similar hole exists between bank 14 and bank 15 of size 0x80 on iMX6QP, iMX6DQ, iMX6SDL and iMX6SX. Note: iMX6SL has only 0-7 banks and there is no hole. Note: iMX6UL doesn't have this one. When reading, we use register offset, so need to account for holes to get the correct address. When writing, we use bank/word index, there is no need to account for holes, always use bank/word index from fuse map. Signed-off-by: Nitin Garg <nitin.garg@freescale.com> Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10972-1 imx: mx7d Add SION bit for i2c pin muxPeng Fan2015-05-26-28/+28
| | | | | | Add SION bit for all i2c pin mux settings. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10958 imx: mx6ul support Bus Encryption EnginePeng Fan2015-05-25-1/+507
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is to support Bus Encryption Engine(BEE) for i.MX 6UL. Supported feature: 1. SNVS key and soft key 2. CTR and ECB mode 3. Specify address region to bee. Two commands are included: bee init [key] [mode] [start] [end] - BEE block initial "Example: bee init 1 1 0x80000000 0x80010000\n" bee test [region] "Example: bee test 1\n" Mapping: [0x10000000 - (0x10000000 + size - 1)] : [start - (start + size - 1)] [0x30000000 - (0x30000000 + IRAM_SIZE - 1)] : [IRAM_BASE_ADDR - (IRAM_BASE_ADDR + IRAM_SIZE - 1)] Whatever start is, start - (start + size -1) will be fixed mapping to 0x10000000 - (0x10000000 + size - 1) Since default AES region's protected size is SZ_512M, so on mx6ul evk board, you can not simply run 'bee init', it will overlap with uboot execution environment, you can use 'bee init 0 0 0x80000000 0x81000000'. If want to use bee, Need to define CONFIG_CMD_BEE in board configuration header file, since CONFIG_CMD_BEE default is not enabled. Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
* MLK-10956 imx: mx6ul: Change BSP name and dtb name for 14x14 packageYe.Li2015-05-25-6/+6
| | | | | | | | | | | | | | Since there is another 9x9 package for mx6ul, modify the BSP names of ddr3 arm2 board and evk board to add 14x14 package info. Also modify the loaded dtb file to align with kernel. After the change, the build target for mx6ul ddr3 arm2 board is: mx6ul_14x14_ddr3_arm2_config and the build target for mx6ul evk board is: mx6ul_14x14_evk_config Signed-off-by: Ye.Li <B37916@freescale.com>
generated by cgit v1.1 at 2024-11-29 21:31:11 +0000