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* tegra: Add enum to select from available funcmux configsSimon Glass2012-02-12-6/+17
| | | | | | | | | We want to give a name to each available funcmux config. For now we just use the pin group names (even through it is verbose) since there seems to be nothing better. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Adjust funcmux config test to permit expansionSimon Glass2012-02-12-25/+38
| | | | | | | | We want to support config options other than zero, so move the test to the end to allow intermediate code to OK such a config. Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix default RAM size selection in odmdataStephen Warren2012-02-12-1/+1
| | | | | | | | | | | | | | | | | A value of 0 in the odmdata RAM size field means default, which is 512MB not 1GB. Fix this. For reference, see: http://nv-tegra.nvidia.com/gitweb/?p=linux-2.6.git;a=blob;\ f=arch/arm/mach-tegra/odm_kit/query/harmony/tegra_devkit_custopt.h;\ h=1ec7010911454f19a5018952fd245785a62c59ad;\ hb=0e52d7fe25b11a656c376a37890be219470661fb v2: New patch Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Fix conflicting pinmux for UARTAStephen Warren2012-02-12-0/+12
| | | | | | | | | | | | | | | Tegra appears to boot with function UARTA pre-selected on mux group SDB. If two mux groups are both set to the same function, it's unclear which group's pins drive the RX signals into the HW module. For UARTA, SDB certainly overrides group IRTX in practice. To solve this, configure some alternative function on SDB to avoid the conflict. Also, tri-state the group to avoid driving any signal onto it until we know what's connected. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* ARM: AM33XX: Add i2c supportPatil, Rachna2012-01-23-1/+89
| | | | | | | Add i2c driver board hookup for AM335X EVM Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Patil, Rachna <rachna@ti.com>
* overo: add SPL supportAndreas Müller2012-01-16-0/+26
| | | | | | | | | | * implementation based on ti beagleboard/omap3evm * timing data and i2c workaround for revision 0 boards taken from x-loader * run-tested with overo revision 0 and 1 / boot from NAND and SDcard * run-tested with x-loader Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* omap_rev_string: output to stdoutAndreas Müller2012-01-16-17/+11
| | | | | | | | * avoid potential buffer overflows * allow SPL-build not to output "Texas Instruments Revision detection unimplemented" Signed-off-by: Andreas Müller <schnitzeltony@gmx.de> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP SPL: call timer_init in s_init to make udelay work earlierAndreas Müller2012-01-16-2/+2
| | | | Signed-off-by: Andreas Müller <schnitzeltony@gmx.de>
* ARM:AM33XX: Add SPL support for AM335X EVMChandan Nath2012-01-16-107/+206
| | | | | | | | | | | This patch is added to support SPL feature on AM335X platform. In this patch, MMC1 is configured as boot device for SPL and support for other devices will be added in the next patch series. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Acked-by: Igor Grinberg <grinberg@compulab.co.il>
* ARM:AM33XX: Add mmc/sd supportChandan Nath2012-01-16-0/+176
| | | | | | | | | This patch add supports for mmc/sd driver on AM335X platform. PLL and pinmux configurations for mmc/sd are configured in this patch. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Fix ddr and timer register offsetChandan Nath2012-01-16-27/+32
| | | | | | | | This patch is added to update incorrect ddr and timer register offset. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* ARM:AM33XX: Replace CONFIG_AM335X with CONFIG_AM33XXChandan Nath2012-01-16-1/+1
| | | | | | | | | This patch is added to replace CONFIG_AM335X symbol with CONFIG_AM333XX for AM33XX platforms. Signed-off-by: Chandan Nath <chandan.nath@ti.com> Signed-off-by: Tom Rini <trini@ti.com> Tested-by: Thomas Weber <weber@corscience.de>
* omap3: make get_board_rev() function weakNikita Kiryanov2012-01-16-1/+2
| | | | | | | | | | Current get_board_rev() function returns a hard coded value which is obviously incorrect for the majority of boards. Allow boards to provide a correct implementation by making this function weak. Signed-off-by: Nikita Kiryanov <nikita@compulab.co.il> Signed-off-by: Igor Grinberg <grinberg@compulab.co.il>
* omap4: fix boot issue on ES2.0 PandaAneesh V2012-01-16-3/+3
| | | | | | | | | | | | | Fix boot issue on ES2.0 Panda by tuning some IO settings. The CONTROL_EFUSE_2 register has to be over-ridden in software for 4430 boards. Commit 23e9f0723e48615332119de4f4ec7a833a282628 wrongly did this for CONTROL_EFUSE_1. Reverting this and doing it for CONTROL_EFUSE_2. Signed-off-by: Aneesh V <aneesh@ti.com> Tested-by: Raúl Porcel <armin76@gentoo.org>
* arm, davinci: Change byte order of RTC kick register valuesChristian Riesch2012-01-16-2/+2
| | | | | | | | Now the values in the defines agree with those in the manuals. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* imx: mx6q: add aipstz init for off platform periphJason Liu2012-01-16-6/+34
| | | | | | | | | | | | Init peripheral access control register of AIPSTZ OPACRx: Buffer Writes(BW): 0 -> not bufferable, Supervisor Protect(SP): 0 -> not require supervisor privilege level for accesses. Write Protect(WP): 0 -> allows write accesses. Trusted Protect(TP): 0 -> allows unstrusted master Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* mx28: fix clearing of IRQs in power initZach Sadecki2012-01-16-4/+4
| | | | | | | | | There are 2 locations in the power init code for the mx28 where IRQs are not being cleared because incorrect methods to clear those bits were being used. This was causing my board to get stuck waiting for POWER_CTRL_VDD5V_DROOP_IRQ to clear. Using the correct method to clear the IRQs fixes it. Signed-off-by: Zach Sadecki <zach@itwatchdogs.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Stefano Babic <sbabic@denx.de> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* i.mx6:imx6q: allign MAC address with burned-in orderingJason Liu2012-01-16-7/+9
| | | | | | | | | | | | | | | | For the i.mx6q, the burned-in MAC address will be the following odering, fuse: 0x620[7:0] MAC_ADDR[7:0] ---> mac[5] fuse: 0x620[15:8] MAC_ADDR[15:8] ---> mac[4] fuse: 0x620[23:16] MAC_ADDR[23:16] ---> mac[3] fuse: 0x620[31:24] MAC_ADDR[31:24] ---> mac[2] fuse: 0x630[7:0] MAC_ADDR[39:32] ---> mac[1] fuse: 0x630[15:8] MAC_ADDR[47:40] ---> mac[0] This patch also fix the error caculation for the fuse bank[0] address Signed-off-by: Jason Liu <jason.hui@linaro.org> Cc: Stefano Babic <sbabic@denx.de>
* mx28: Let dram_init be common for mx28Fabio Estevam2012-01-16-0/+23
| | | | | | | | Let dram_init function be a common function, so that other mx28 boards can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com>
* mx28: Let imx_get_mac_from_fuse be common for mx28Fabio Estevam2012-01-16-0/+46
| | | | | | | | | Let imx_get_mac_from_fuse function be a common function, so that other mx28 boards can reuse it. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marek.vasut@gmail.com> Acked-by: Stefano Babic <sbabic@denx.de>
* net: imx: Add multi-FEC support for imx_get_mac_from_fuseFabio Estevam2012-01-16-5/+5
| | | | | | | | | | Add multi-FEC support for imx_get_mac_from_fuse by passing dev_id as a parameter. This feature is important on mx28 SoC for example that has two FEC ports. Cc: Ben Warren <biggerbadderben@gmail.com> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* mx28: remove omap specific config optionsVeli-Pekka Peltola2012-01-16-6/+0
| | | | | | | | | | | Config options for OMAP are not used with i.MX28 so remove dead code. Signed-off-by: Veli-Pekka Peltola <veli-pekka.peltola@bluegiga.com> Cc: Stefano Babic <sbabic@denx.de> Cc: Marek Vasut <marek.vasut@gmail.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Stefano Babic <sbabic@denx.de>
* i.mx: i.mx6q: Add the enet clock functionJason Liu2012-01-16-0/+5
| | | | | | Cc: Stefano Babic <sbabic@denx.de> Signed-off-by: Jason Liu <jason.hui@linaro.org> Acked-by: Stefano Babic <sbabic@denx.de>
* openrisc: Add library functionsStefan Kristiansson2012-01-13-0/+403
| | | | Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* openrisc: Add cpu filesStefan Kristiansson2012-01-13-0/+923
| | | | Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* openrisc: Add architecture header filesStefan Kristiansson2012-01-13-0/+1397
| | | | Signed-off-by: Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2012-01-13-0/+4
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'master' of git://git.denx.de/u-boot-mpc85xx: fsl_lbc: add printout of LCRR and LBCR to local bus regs sbc8548: Fix up local bus init to be frequency aware sbc8548: enable support for hardware SPD errata workaround sbc8548: relocate fixed ddr init code to ddr.c file sbc8548: Make enabling SPD RAM configuration work sbc8548: Fix LBC SDRAM initialization settings sbc8548: enable ability to boot from alternate flash sbc8548: relocate 64MB user flash to sane boundary Revert "SBC8548: fix address mask to allow 64M flash" MPC85xxCDS: Fix missing LCRR_DBYP bits for 66-133MHz LBC eXMeritus HWW-1U-1A: Add support for the AT24C128N I2C EEPROM eXMeritus HWW-1U-1A: Minor environment variable tweaks
| * fsl_lbc: add printout of LCRR and LBCR to local bus regsPaul Gortmaker2012-01-13-0/+4
| | | | | | | | | | | | | | | | It can be handy to have these in the output when trying to debug odd behaviour. Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | mpc83xx: Add a GPIO driver for the MPC83XX familyJoe Hershberger2012-01-09-0/+40
| | | | | | | | | | | | Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | gpio: Replace ARM gpio.h with the common API in include/asm-genericJoe Hershberger2012-01-09-53/+20
|/ | | | | | | | | | | | | | | | ARM boards should use the generic GPIO API This means changing gpio to unsigned type Remove the unused gpio_toggle() function which is not part of the API Comment that free should not modify pin state Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Cc: Joe Hershberger <joe.hershberger@gmail.com> fixed merge conflict in da8xx_gpio.c, tegra2_gpio.c, and extended to the new mxs_gpio.c. Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* tegra: Add support for UART init in cpu board.cSimon Glass2011-12-24-0/+81
| | | | | | | | | | We add a way of initialising the selected of UARTs prior to relocation. Boards can use the board_init_uart_f() instead of repeating this code themselves. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Add a function mux featureSimon Glass2011-12-24-1/+100
| | | | | | | | | | | | funcmux permits selection of config options for particular peripherals, such as the pins that are used for that peripheral, if there are several options. Add UART selection to start with. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: add clock_ll_start_uart() to enable UART prior to relocSimon Glass2011-12-24-0/+25
| | | | | | | | | | Most boards will want to enable a UART early. This function provides that feature in Tegra architecture code so the code does not need to be copied on every board. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move clock_early_init() to arch_cpu_init()Simon Glass2011-12-24-0/+3
| | | | | | | | | The clock init is not board specific, so move it into the cpu code. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra: Move cpu_init_cp15() to arch_cpu_init()Simon Glass2011-12-24-0/+4
| | | | | | | | | This call is more of an architecture requirement than a board one, so move it there. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Move tegra2_mmc_init() prototype to public header.Thierry Reding2011-12-24-0/+27
| | | | | | | | | | | | | tegra2_mmc_init() is implemented by the Tegra2 MMC driver. Since most of the Tegra2-based boards will need to call it, this commit exports it in the new public asm/arch/mmc.h header file to prevent each board from providing its own prototype. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Always build with USE_PRIVATE_LIBGCC=yes.Thierry Reding2011-12-24-0/+2
| | | | | | | | | | The AVP on Tegra2 doesn't boot properly when U-Boot is linked against the GCC provided libgcc. To work around this, always build and link against a private libgcc for Tegra2-based boards. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: Implement SPI / UART GPIO switchSimon Glass2011-12-24-0/+46
| | | | | | | | | | | | | | | | The Tegra2 Seaboard has the unfortunate feature that SPI and the console UART are multiplexed on the same pins. We need to switch between one and the other during SPI and console activity. This new file implements a switch and keeps track of which peripheral owns the pins. It also flips over the controlling GPIO as needed Since we are adding a second file to board/nvidia/common, we create a proper Makefile there and remove the direct board.o include from board/nvidia/seaboard/Makefile Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
* tegra2: spi: Add SPI driver for Tegra2 SOCTom Warren2011-12-24-0/+77
| | | | | | | This driver supports SPI on Tegra2, running at 48MHz. Signed-off-by: Tom Warren <twarren@nvidia.com> Acked-by: Mike Frysinger <vapier@gentoo.org>
* arm, davinci: Fix build warnings for cam_enc_4xxChristian Riesch2011-12-24-2/+3
| | | | | | | | | | | | This patch fixes a build warning for the cam_enc_4xx board introduced by commit d6ec0c0dfc70447cf615ae80a952da81f73f16b4: spl.c:35:13: warning: 'gdata' defined but not used spl.c:36:13: warning: 'bdata' defined but not used Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Tom Rini <trini@ti.com> Cc: Heiko Schocher <hs@denx.de>
* arm, davinci: Add SPL support for DA850 SoCsChristian Riesch2011-12-24-2/+35
| | | | | | | | | | This code adds an SPL for booting from SPI flash on DA850 SoCs. Signed-off-by: Christian Riesch <christian.riesch@omicron.at> Cc: Heiko Schocher <hs@denx.de> Cc: Sandeep Paulraj <s-paulraj@ti.com> Cc: Tom Rini <trini@ti.com> Acked-by: Tom Rini <trini@ti.com>
* Merge branch 'next' of ../nextWolfgang Denk2011-12-23-128/+1011
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * 'next' of ../next: mkenvimage: Add version info switch (-V) mkenvimage: Fix getopt() error handling mkenvimage: Fix some typos phy: add Micrel KS8721BL phy definition net: introduce per device index mvgbe: remove setting of ethaddr within the driver x86: Add support for specifying an initrd with the zboot command x86: Refactor the zboot innards so they can be reused with a vboot image x86: Add infrastructure to extract an e820 table from the coreboot tables x86: Add support for booting Linux using the 32 bit boot protocol x86: Clean up the x86 zimage code in preparation to extend it x86: Import code from coreboot's libpayload to parse the coreboot table x86: Initial commit for running as a coreboot payload CHECKPATCH: ./board/esd/hh405/logo_320_240_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_1024_768_8bpp.c CHECKPATCH: ./board/esd/hh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/hh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/apc405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/voh405/logo_320_240_4bpp.c CHECKPATCH: ./board/esd/voh405/logo_640_480_24bpp.c CHECKPATCH: ./board/esd/hh405/fpgadata.c CHECKPATCH: ./board/esd/pci405/fpgadata.c CHECKPATCH: ./board/esd/tasreg/fpgadata.c CHECKPATCH: ./board/esd/apc405/fpgadata.c CHECKPATCH: ./board/esd/voh405/fpgadata.c CHECKPATCH: ./board/esd/ash405/fpgadata.c CHECKPATCH: ./board/esd/dasa_sim/fpgadata.c CHECKPATCH: ./board/esd/ar405/fpgadata_xl30.c CHECKPATCH: ./board/esd/ar405/fpgadata.c CHECKPATCH: ./board/esd/plu405/fpgadata.c CHECKPATCH: ./board/esd/wuh405/fpgadata.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci405ab.c CHECKPATCH: ./board/esd/cpci405/fpgadata_cpci4052.c CHECKPATCH: ./board/esd/canbt/fpgadata.c CHECKPATCH: ./board/esd/du405/fpgadata.c CHECKPATCH: ./board/esd/cpciiser4/fpgadata.c CHECKPATCH: ./board/dave/PPChameleonEVB/fpgadata.c avr32:mmu.c: fix printf() length modifier fat.c: fix printf() length modifier cmd_sf.c: fix printf() length modifier Make printf and vprintf safe from buffer overruns vsprintf: Move function documentation into header file Add safe vsnprintf and snprintf library functions Move vsprintf functions into their own header Conflicts: tools/mkenvimage.c Signed-off-by: Wolfgang Denk <wd@denx.de>
| * x86: Add support for specifying an initrd with the zboot commandGabe Black2011-12-19-4/+19
| | | | | | | | | | | | | | | | | | | | | | This change finishes plumbing the initrd support built into the zboot mechanism out to the command interface. It also fixes a bug in the command declaration where the kernel size could be passed as an optional second parameter but not enough arguments were allowed. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Refactor the zboot innards so they can be reused with a vboot imageGabe Black2011-12-19-90/+122
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If vboot successfully verifies a kernel, it will leave it in place and basically ready to boot. The zeropage table which is part of the x86 boot protocol is at the end of the kernel, though, instead of the beginning, and because the image is already in place there's no need to copy it around. This change refactors the code which implements the zboot command so that the configuration of the zeropage table and loading the pieces of the kernel into memory are done separately. Also, because the command line goes before the zeropage table in vboot which is somewhat incompatible with the normal protocol, where to put the command line is a now a parameter instead of being hard coded. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add infrastructure to extract an e820 table from the coreboot tablesGabe Black2011-12-19-1/+37
| | | | | | | | | | | | | | | | Also approximate the size of RAM using the largest RAM address available in the tables. There may be areas which are marked as reserved which are actually at the end of RAM. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Add support for booting Linux using the 32 bit boot protocolGabe Black2011-12-19-17/+62
| | | | | | | | | | | | | | | | | | This change conditionally modifies the zboot command so that it can use the 32 bit boot protocol. This is necessary because the 16 bit realmode entry point assumes that it can call BIOS services which neither coreboot nor u-boot provide. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Clean up the x86 zimage code in preparation to extend itGabe Black2011-12-19-58/+45
| | | | | | | | | | | | | | | | This change cleans up some formatting issues in the zimage handling code, and converts it from using offsets added to a base pointer to using the available structure definitions which were already being included. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Import code from coreboot's libpayload to parse the coreboot tableGabe Black2011-12-19-0/+620
| | | | | | | | | | | | | | | | | | | | | | | | | | This change also forces the lib_sysinfo structure to be in the .data section. Otherwise it ends up in the .bss section. U-boot assumes that it doesn't need to copy it over during relocation, and instead fills that whole section with zeroes. If we really were booting from ROM that would be appropriate, but we need some information from the coreboot tables (memory size) before then and have to fill that structure before relocation. We skirt u-boot's assumption by putting this in .data where it assumes there is still read only but non-zero data. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * x86: Initial commit for running as a coreboot payloadGabe Black2011-12-19-0/+148
| | | | | | | | | | | | | | | | Add a target for running u-boot as a coreboot payload in boards.cfg, a board, CPU and a config. This is a skeleton implementation which always reports the size of memory as 64 MB. Signed-off-by: Gabe Black <gabeblack@chromium.org>
| * avr32:mmu.c: fix printf() length modifierAndreas Bießmann2011-12-17-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | avr32 uses unsigned long addresses, fix the printf() length modifier for that fact. Before this patch following warning occours: ---8<--- mmu.c: In function 'mmu_init_r': mmu.c:25: warning: format '%08x' expects type 'unsigned int', but argument 2 has type 'uintptr_t' --->8--- Signed-off-by: Andreas Bießmann <biessmann@corscience.de> cc: Mike Frysinger <vapier@gentoo.org> cc: Thomas Chou <thomas@wytron.com.tw> cc: Reinhard Meyer <u-boot@emk-elektronik.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
generated by cgit v1.1 at 2024-11-10 14:02:54 +0000