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* armv8/ls2085a: Fix generic timer clock sourceYork Sun2015-04-23-0/+38
| | | | | | | | | | The timer clock is system clock divided by 4, not fixed 12MHz. This is common to the SoC, not board specific. Primary core is fixed when u-boot still runs in board_f. Secondary cores are fixed by reading a variable set by u-boot. Signed-off-by: York Sun <yorksun@freescale.com> CC: Mark Rutland <mark.rutland@arm.com>
* armv8/fsl-lsch3: Fix platform clock calculationYork Sun2015-04-23-4/+3
| | | | | | | Platform clock is half of platform PLL. There is an additional divisor in place. Clean up code copied from powerpc. Signed-off-by: York Sun <yorksun@freescale.com>
* armv8/ls2085a: Update common header filePrabhakar Kushwaha2015-04-23-0/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | ls2085a_common.h contains hard-coded information for NOR/NAND flash, I2C, DDR, etc. These are platform specific. Move them out of common header file and placed into respective board header files. Move TEXTBASE to 1MB offset to fit NOR flash with up to 1MB sector size. Enable command auto complete. Update prompt symbol. Set fdt_high to 0xa0000000 because Linux requires that the fdt be 8-byte aligned and below 512 MiB. Besides ensuring compliance with the 512 MiB limit, this avoids problems with the dtb being misaligned within the FIT image. Change the MC FW, MC DPL and Debug server NOR addresses in compliance with the NOR flash layouts for 128MB flash. Add PCIe macros. Enable "loadb" command. Disable debug server. Enable workaround for erratum A008511. Stop reset on panic for postmortem debugging. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Implement workaround for erratum A008585York Sun2015-04-23-0/+12
| | | | | | | Generic Timer may contain an erroneous value. The workaround is to read it twice until getting the same value. Signed-off-by: York Sun <yorksun@freescale.com>
* driver/ldpaa_eth: Add LDPAA Ethernet driverPrabhakar Kushwaha2015-04-23-0/+6
| | | | | | | | | | | | | | | LDPAA Ethernet driver is a freescale's new ethernet driver based on Layerscape architecture. Every ethernet driver controls on DPNI object. Where all DPNIs share one common DPBP and DPIO object to support Rx and Tx flows. Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> CC: Cristian Sovaiala <cristian.sovaiala@freescale.com> CC: Bogdan Hamciuc <bogdan.hamciuc@freescale.com> CC: J. German Rivera <German.Rivera@freescale.com> [York Sun: s/NetReceive/net_process_received_packet] Reviewed-by: York Sun <yorksun@freescale.com>
* driver/fsl-mc: Add support of MC FlibsPrabhakar Kushwaha2015-04-21-1/+3
| | | | | | | | | | | | | | | | | | | | | | Freescale's Layerscape Management Complex (MC) provide support various objects like DPRC, DPNI, DPBP and DPIO. Where: DPRC: Place holdes for other MC objectes like DPNI, DPBP, DPIO DPBP: Management of buffer pool DPIO: Used for used to QBMan portal DPNI: Represents standard network interface These objects are used for DPAA ethernet drivers. Signed-off-by: J. German Rivera <German.Rivera@freescale.com> Signed-off-by: Lijun Pan <Lijun.Pan@freescale.com> Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Geoff Thorpe <Geoff.Thorpe@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Cristian Sovaiala <cristian.sovaiala@freescale.com> Signed-off-by: pankaj chauhan <pankaj.chauhan@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* fsl-ch3/README: Add description for NOR flash layout (firmware images)Bhupesh Sharma2015-04-21-0/+25
| | | | | | | | This patch adds description for NOR flash layout (firmware images) in the README file for LS2085A platforms. Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* armv8/fsl-lsch3: Add Freescale Debug Server driverBhupesh Sharma2015-04-21-2/+10
| | | | | | | | | | | | | The Debug Server driver is responsible for loading the Debug server FW on the Service Processor (Cortex-A5 core) on LS2085A like SoCs and then polling for the successful initialization of the same. TOP MEM HIDE is adjusted to ensure the space required by Debug Server FW is accounted for. MC uses the DDR area which is calculated as: MC DDR region start = Top of DDR - area reserved by Debug Server FW Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* QE/DeepSleep: add QE deepsleep support for mpc85xxZhao Qiang2015-04-21-4/+0
| | | | | | | | Muram will power off during deepsleep, and the microcode of qe in muram will be lost, it should be reload when resume. Signed-off-by: Zhao Qiang <B45475@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* pci/layerscape: remove unnecessary pcie_layerscape.hMinghuan Lian2015-04-21-13/+0
| | | | | | | | | | The patch uses the common function name ft_pci_setup to replace ft_pcie_setup, then removes unnecessary pcie_layerscape.h because all the functions have been declared in common.h. Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Add bootscript support to esbc_validate.gaurav rana2015-04-21-0/+44
| | | | | | | | | | | | | | | | | | | | | | | | 1. Default environment will be used for secure boot flow which can't be edited or saved. 2. Command for secure boot is predefined in the default environment which will run on autoboot (and autoboot is the only option allowed in case of secure boot) and it looks like this: #define CONFIG_SECBOOT \ "setenv bs_hdraddr 0xe8e00000;" \ "esbc_validate $bs_hdraddr;" \ "source $img_addr;" \ "esbc_halt;" #endif 3. Boot Script can contain esbc_validate commands and bootm command. Uboot source command used in default secure boot command will run the bootscript. 4. Command esbc_halt added to ensure either bootm executes after validation of images or core should just spin. Signed-off-by: Ruchika Gupta <ruchika.gupta@freescale.com> Signed-off-by: Gaurav Rana <gaurav.rana@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* arm/ls102xa:Add support of conditional workaround implementation as per SoC verAlison Wang2015-04-21-0/+3
| | | | | | | | For LS102xA, some workarounds are only used in VER1.0, so silicon version detection are added for QDS and TWR boards. Signed-off-by: Alison Wang <alison.wang@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2015-04-20-259/+59
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| * powerpc/mpc85xx: Remove some dead codeScott Wood2015-04-20-137/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | U-Boot does not have system calls (the services it exposes to standalone commands use a different mechanism), so the syscall handler is dead code. It's also broken code, as it assumes it is located at 0xc00 -- while even before the patch to stop relocating exception vectors to 0, U-Boot had the syscall at 0x900. The critical and machine check return paths are never called -- the regular exception return path is used instead, which works because xSRR0/1 have already been saved and can be restored via the regular SRR0/1 (we don't care too much in U-Boot about taking a critical/mcheck inside another exception prolog/epilog). Also remove a few other small unused functions. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/mpc85xx: Don't relocate exception vectorsScott Wood2015-04-20-121/+57
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Booke does not require exception vectors to be located at address zero. U-Boot was doing so anyway, simply because that's how it had been done on other PPC. The downside of this is that once the OS is loaded to address zero, the exception vectors have been overwritten -- which makes it difficult to diagnose a crash that happens after that point. The IVOR setup and trap entry code is simplified somewhat as a result. Also, there is no longer a need to align individual exceptions on 0x100 byte boundaries. Signed-off-by: Scott Wood <scottwood@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * powerpc/t2080: enable erratum_a007186 for t2080 rev1.1Shengzhou Liu2015-04-20-1/+1
| | | | | | | | | | | | | | T2080 rev1.1 also needs erratum a007186. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2015-04-20-0/+1
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| * | video, ipu: make ldb clock frequency overwritable through board codeHeiko Schocher2015-04-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | the ldb clock can be setup in board code (for example set through PLL5). Update the ldb_clock rate also through board code. This should be removed, if a clock framework is availiable. Signed-off-by: Heiko Schocher <hs@denx.de> Tested-by: Eric Nelson <eric.nelson@boundarydevices.com>
* | | sandbox: Add support for bootzSjoerd Simons2015-04-19-0/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add dummy bootz_setup implementation allowing the u-boot sandbox to run bootz. This recognizes both ARM and x86 zImages to validate a valid zImage was loaded. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | | sandbox: Split bootm code out into lib/bootmSjoerd Simons2015-04-19-12/+22
| |/ |/| | | | | | | | | | | | | Follow the convention of other architectures and move the platform specific linux bootm code into sandbox/lib/bootm.c. Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk> Acked-by: Simon Glass <sjg@chromium.org>
* | ahci: mmio_base is a virtual addressScott Wood2015-04-18-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Don't store it in a u32. Don't dereference the bus address as if it were a virtual address (fixes 284231e49a2b4 ("ahci: Support splitting of read transactions into multiple chunks")). Fixes crash on boot in MPC8641HPCN_36BIT target. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Vadim Bendebury <vbendeb@chromium.org> Acked-by: York Sun <yorksun@freescale.com>
* | sandbox: Move CONFIG_SYS_VSNPRINTF to KconfigSimon Glass2015-04-18-0/+3
| | | | | | | | | | | | Move this over to Kconfig and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Kconfig: Move CONFIG_BOOTSTAGE to KconfigSimon Glass2015-04-18-1/+10
| | | | | | | | | | | | | | Move CONFIG_BOOT_STAGE and its associated options to Kconfig. Adjust existing users and code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | Kconfig: Move CONFIG_DESIGNWARE_ETH to KconfigSimon Glass2015-04-18-2/+2
| | | | | | | | | | | | | | | | | | | | Move this to Kconfig and clean up board config files that use it. Also rename it to CONFIG_ETH_DESIGNWARE to fit with the naming that exists in drivers/net/Kconfig. Signed-off-by: Simon Glass <sjg@chromium.org> Version 1: Acked-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: cosmetic: Fix var naming net <-> eth driversJoe Hershberger2015-04-18-16/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update the naming convention used in the network stack functions and variables that Ethernet drivers use to interact with it. This cleans up the temporary hacks that were added to this interface along with the DM support. This patch has a few remaining checkpatch.pl failures that would be out of the scope of this patch to fix (drivers that are in gross violation of checkpatch.pl). Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* | net: cosmetic: Cleanup internal packet buffer namesJoe Hershberger2015-04-18-2/+2
| | | | | | | | | | | | | | This patch cleans up the names of internal packet buffer names that are used within the network stack and the functions that use them. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>
* | net: cosmetic: Name ethaddr variables consistentlyJoe Hershberger2015-04-18-12/+10
| | | | | | | | | | | | | | | | Use "_ethaddr" at the end of variables and drop CamelCase. Make constant values actually 'const'. Signed-off-by: Joe Hershberger <joe.hershberger@ni.com> Acked-by: Simon Glass <sjg@chromium.org>
* | powerpc: ids8313: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+1
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: cm_fx6: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: stv0991: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+2
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: bav335x: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+2
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: socfpga: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+6
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: mx6: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+6
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: snapper9260: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: rmobile: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+12
| | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: zynq: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+1
| | | | | | | | | | | | | | | | All the Zynq boards have switch to Driver Model. "select DM" is better than default value in each defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | ARM: UniPhier: use "select" instead of default value in defconfigMasahiro Yamada2015-04-18-0/+3
| | | | | | | | | | | | | | | | All the UniPhier boards have switch to Driver Model. "select DM" is better than default value in each defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: select CONFIG_DM* optionsMasahiro Yamada2015-04-18-81/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As mentioned in the previous commit, adding default values in each Kconfig causes problems because it does not co-exist with the "depends on" syntax. (Please note this is not a bug of Kconfig.) We should not do so unless we have a special reason. Actually, for CONFIG_DM*, we have no good reason to do so. Generally, CONFIG_DM is not a user-configurable option. Once we convert a driver into Driver Model, the board only works with Driver Model, i.e. CONFIG_DM must be always enabled for that board. So, using "select DM" is more suitable rather than allowing users to modify it. Another good thing is, Kconfig warns unmet dependencies for "select" syntax, so we easily notice bugs. Actually, CONFIG_DM and other related options have been added without consistency: some into arch/*/Kconfig, some into board/*/Kconfig, and some into configs/*_defconfig. This commit prefers "select" and cleans up the following issues. [1] Never use "CONFIG_DM=n" in defconfig files It is really rare to add "CONFIG_FOO=n" to disable CONFIG options. It is more common to use "# CONFIG_FOO is not set". But here, we do not even have to do it. Less than half of OMAP3 boards have been converted to Driver Model. Adding the default values to arch/arm/cpu/armv7/omap3/Kconfig is weird. Instead, add "select DM" only to appropriate boards, which eventually eliminates "CONFIG_DM=n", etc. [2] Delete redundant CONFIGs Sandbox sets CONFIG_DM in arch/sandbox/Kconfig and defines it again in configs/sandbox_defconfig. Likewise, OMAP3 sets CONFIG_DM arch/arm/cpu/armv7/omap3/Kconfig and defines it also in omap3_beagle_defconfig and devkit8000_defconfig. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | dm: usb: exynos: Enable both EHCI and XHCI on snowSimon Glass2015-04-18-0/+1
| | | | | | | | | | | | | | Since we can support both controllers now, enable this in the device tree. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: exynos: Use driver model for USBSimon Glass2015-04-18-0/+3
| | | | | | | | | | | | | | | | Convert Exynos boards over to use driver model for USB. This does not remove any unnecessary code so far. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: dts: sandbox: Add some sample USB devices to sandboxSimon Glass2015-04-18-0/+40
| | | | | | | | | | | | | | These allow basic testing of the USB functionality within sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: usb: tegra: Add vbus GPIOs for nyanSimon Glass2015-04-18-0/+2
| | | | | | | | | | | | | | | | These are needed to enable the USB bus (although not sufficient since it still does not work). Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Marek Vasut <marex@denx.de>
* | dm: ls1021a: dts: Add QSPI dts nodeHaikun.Wang@freescale.com2015-04-18-0/+39
| | | | | | | | | | | | | | | | Add QSPI controller dts node in ls1021a.dtsi. Add QSPI slave device dts node in ls1021a-twr.dts and ls1021a-qds.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: dts: Update DSPI node to support DM SPIHaikun.Wang@freescale.com2015-04-18-18/+4
| | | | | | | | | | | | | | | | | | | | Update DSPI controller node in ls1021a.dtsi. Update flash device node in ls1021a-qds.dts. Ls1021a-twr board doesn't support DSPI, so remove DSPI node in ls1021a-twr.dts. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: dts: Change address_cells and size_cells from 2 to 1haikun2015-04-18-40/+40
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change address_cells and size_cells of root node and 'soc' node from 2 to 1. We backport ls1021a device tree source files from kernel to u-boot. Kernel files set address_cells and size_cells to 2 in order to access more than 4GB space. But we don't have this requirement now and u-boot fdtdec_get_xxx interfaces can't support property whose size is 'u64' completely. So make this change. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: ls1021a: Bring in ls1021a dts files from linux kernelhaikun2015-04-18-0/+662
| | | | | | | | | | | | | | | | Bring in required device tree files for ls1021a from Linux. These are initially unchanged and have a number of pieces not needed by U-Boot. Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | dm: arm: Bring in skeleton64 device tree file from LinuxHaikun.Wang@freescale.com2015-04-18-0/+13
| | | | | | | | | | | | | | | | | | Backport of kernel commits: 7c14f6c719de092d69c81877786e83ce7ae1a860 35faad2a1563b3d4dc983a82ac41033fe053870c Signed-off-by: Haikun Wang <Haikun.Wang@freescale.com> Acked-by: Simon Glass <sjg@chromium.org>
* | cros_ec: exynos: Match up device tree with kernel versionSimon Glass2015-04-18-99/+139
| | | | | | | | | | | | | | | | | | | | | | The U-Boot device trees are slightly different in a few places. Adjust them to remove most of the differences. Note that U-Boot does not support the concept of interrupts as distinct from GPIOs, so this difference remains. For sandbox, use the same keyboard file as for ARM boards and drop the host emulation bus which seems redundant. Signed-off-by: Simon Glass <sjg@chromium.org>
* | cros_ec: Drop unused CONFIG_DM_CROS_ECSimon Glass2015-04-18-3/+0
| | | | | | | | | | | | | | Since all supported boards enable this option now, we can remove it along with the old code. Signed-off-by: Simon Glass <sjg@chromium.org>
* | x86: chromebook_link: dts: Add PCH and LPC devicesSimon Glass2015-04-18-33/+52
| | | | | | | | | | | | | | | | | | | | | | | | The PCH (Platform Controller Hub) is on the PCI bus, so show it as such. The LPC (Low Pin Count) and SPI bus are inside the PCH, so put these in the right place also. Rename the compatible strings to be more descriptive since this board is the only user. Once we are using driver model fully on x86, these will be dropped. Signed-off-by: Simon Glass <sjg@chromium.org>
generated by cgit v1.1 at 2024-11-14 20:50:51 +0000