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* arm1136: Fix NAND bootFabio Estevam2011-02-21-12/+4
| | | | | | Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com> Signed-off-by: Magnus Lilja <lilja.magnus@gmail.com> Tested-by: Magnus Lilja <lilja.magnus@gmail.com>
* arm: get_sp() should always be compiledPo-Yu Chuang2011-02-21-3/+1
| | | | | | | | | | | | get_sp() was incorrectly excluded if none of CONFIG_SETUP_MEMORY_TAGS CONFIG_CMDLINE_TAG CONFIG_INITRD_TAG CONFIG_SERIAL_TAG CONFIG_REVISION_TAG were defined. Signed-off-by: Po-Yu Chuang <ratbert@faraday-tech.com>
* mvmfp: add MFP configuration support for PANTHEONLei Wen2011-02-21-0/+41
| | | | | | | This patch adds the Multiple Function Pin configuration support for Marvell PANTHEON SoCs Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: Add Support for Marvell Pantheon Familiy SoCsLei Wen2011-02-21-0/+641
| | | | | | | | | | | | | Pantheon Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/communications/marvell_pantheon_910_920_pb.pdf SoC versions Supported: 1) PANTHEON920 (TD) 2) PANTHEON910 (TTC) Signed-off-by: Lei Wen <leiwen@marvell.com>
* mv: seperate kirkwood and armada from common settingLei Wen2011-02-21-0/+189
| | | | | | | | | | | | | Since there are lots of difference between kirkwood and armada series, it is better to seperate them but still keep the most common file shared by all marvell platform in the mv-common configure file. This patch move the kirkwood only driver definitoin in mv-common to the <soc_name>/config.h. This patch is tested with compilation for armada100 and guruplug. Signed-off-by: Lei Wen <leiwen@marvell.com>
* ARM: fix write*() I/O accessorsWolfgang Denk2011-02-21-3/+3
| | | | | | | | | | | | | | | | | | | Commit 3c0659b "ARM: Avoid compiler optimization for readb, writeb and friends." introduced I/O accessors with memory barriers. Unfortunately the new write*() accessors introduced a bug: The problem is that the argument "v" gets evaluated twice. This breaks code like used here (from "drivers/net/dnet.c"): for (i = 0; i < wrsz; i++) writel(*bufp++, &dnet->regs->TX_DATA_FIFO); Use auxiliary variables to avoid such problems. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.aribaud@free.fr> Cc: Alexander Holler <holler@ahsoftware.de> Cc: Dirk Behme <dirk.behme@googlemail.com>
* arm relocation: Fix calculation of board_init_rAlexander Stein2011-02-21-1/+1
| | | | Signed-off-by: Alexander Stein <alexander.stein@informatik.tu-chemnitz.de>
* arm: Tegra2: Add basic NVIDIA Tegra2 SoC supportTom Warren2011-02-21-0/+861
| | | | Signed-off-by: Tom Warren <twarren@nvidia.com>
* microblaze: Fix msr handling in interrupt_handlerMichal Simek2011-02-15-18/+1
| | | | | | | Fix ancient code which worked with MSR in a bad way. Use rtid instruction which enable IRQs and jump. Signed-off-by: Michal Simek <monstr@monstr.eu>
* microblaze: Fix systems with MSR=0Michal Simek2011-02-15-1/+1
| | | | | | | | u-boot BSP generates XILINX_USE_MSR_INSTR macro even for system with MSR=0. That's why explicitly check that MSR=1. Signed-off-by: Michal Simek <monstr@monstr.eu>
* sc520: Release CAR and enable cachingGraeme Russ2011-02-12-5/+11
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* x86: Convert board_init_f to use an init_sequenceGraeme Russ2011-02-12-41/+29
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* x86: Rearrange function calls in board_init_fGraeme Russ2011-02-12-8/+8
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* x86: Split board_init_f() into init_fnc_t compatible functionsGraeme Russ2011-02-12-49/+74
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* x86: Fix incorrect usage of relocation offsetGraeme Russ2011-02-12-6/+6
| | | | | x86 has always used relocation offset in the opposite sense to the ELF standard - Fix this
* x86: Move console initialisation into board_init_fGraeme Russ2011-02-12-3/+12
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* x86: Move test for cold boot into init functionsGraeme Russ2011-02-12-13/+11
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* x86: Move call to dram_init_f into board_init_fGraeme Russ2011-02-12-3/+4
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* x86: Defer setup of final stackGraeme Russ2011-02-12-17/+33
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* sc520: Move RAM sizing code from asm to CGraeme Russ2011-02-12-755/+610
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* x86: Use Cache-As-RAM for initial stackGraeme Russ2011-02-12-21/+115
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* x86: Move initial gd to fixed locationGraeme Russ2011-02-12-19/+36
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* sc520: Remove printf calls from cpu_init_fGraeme Russ2011-02-12-2/+0
| | | | | In later patches, cpu_init_f will be called before console has been initialised and printf will not be legitimately available
* sc520: Move board specific settings to board init functionGraeme Russ2011-02-12-19/+0
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* sc520: Define MMCR address in include fileGraeme Russ2011-02-12-36/+51
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* x86: Make cpu init functions weakGraeme Russ2011-02-12-10/+17
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* x86: Call early_board_init when warm bootingGraeme Russ2011-02-12-5/+5
| | | | | | | | | | early_board_init has been skipped to avoid SDRAM corruption in the case that a fully relocatable image has been loaded into SDRAM and is being executed from SDRAM. x86 is being aligned with other architectures (ARM and PPC in particlar) and will be using Cache-As-RAM to run a C environment from Flash (or SRAM if you have some). early_board_init may be needed to assist in the setup of Cache-As-RAM and the early C environment
* x86: Add processor flags header from linuxGraeme Russ2011-02-12-10/+121
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* x86: Move Global Descriptor Table defines to processor.hGraeme Russ2011-02-12-10/+7
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* x86: Add stack dump to register dumpGraeme Russ2011-02-12-0/+16
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* x86: Fix mangled umlautsGraeme Russ2011-02-12-2/+2
| | | | | git mergetool has a nasty habit of mangling umlats - fix ones that have been missed in previous submissions
* sc520: Sort MakefileGraeme Russ2011-02-12-1/+1
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* x86: Parametize values used in linker scriptGraeme Russ2011-02-12-20/+19
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* x86: Align config.mk and linker scripts with other archesGraeme Russ2011-02-12-8/+114
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* x86: Fix definition of global_data struct for asm-offsets.cGraeme Russ2011-02-12-1/+1
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* powerpc/8xxx: Add additional cycle to write-to-read turnaound for DDR3York Sun2011-02-10-1/+4
| | | | | | | | | When DDR data rate is higher than 1200MT/s or controller interleaving is enabled, additional cycle for write-to-read turnaround is needed to satisfy dynamic ODT timing. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'next' of git://git.denx.de/u-boot-niosWolfgang Denk2011-02-09-1/+13
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| * nios2: add gpio_is_validThomas Chou2011-02-08-0/+6
| | | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * nios2: use long for ssize_tThomas Chou2011-02-08-1/+1
| | | | | | | | | | | | | | | | | | | | This is consistent with nios2-linux. And resolved the warning, cmd_nvedit.c: In function `do_env_export': cmd_nvedit.c:660: warning: size_t format, ssize_t arg (arg 3) Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
| * nios2: add gpio_freeThomas Chou2011-02-08-0/+6
| | | | | | | | | | Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Signed-off-by: Scott McNutt <smcnutt@psyent.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-02-09-0/+3
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| * ppc4xx: Add DLVision-10G board supportDirk Eibach2011-02-07-0/+3
| | | | | | | | | | | | | | | | | | | | Board support for the Guntermann & Drunck DLVision-10G. Adds support for multiple FPGAs per board for gdsys 405ep architecture. Adds support for dual link osd hardware for gdsys 405ep. Signed-off-by: Dirk Eibach <eibach@gdsys.de> Signed-off-by: Stefan Roese <sr@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2011-02-06-8/+26
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| * | mpc83xx: Use correct register to calculate clocks.Joakim Tjernlund2011-02-05-7/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Use SPMR instead of HRCWL when calculating clocks as HCRWL may be changed and the CPU will not pick up all changes until there is a POR. u-boot will think SPMF has changed and get the clocks wrong. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * | mpc83xx: fix pcie configuration space read/writeLeo Liu2011-02-05-1/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch fix a problem for the pcie enumeration when the mpc83xx pcie controller is connected with switch or we use both of the two pcie controller. Signed-off-by: Leo Liu <liucai.lfn@gmail.com> fix codingstyle and compiler warning: 'pcie_priv' defined but not used Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2011-02-06-6/+129
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| * | powerpc/8xxx: Fix possible compile issue related to P1013Kumar Gala2011-02-04-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The P1013 is a single core version of P1022 and thus should use the p1022_serdes.c code. It was acciently pointing to p1013_serdes.c which doesn't exist. Reported-by: Renaud Barbier <renaud.barbier@ge.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/mpc85xx: implement workaround for errata DDR111 and DDR134York Sun2011-02-03-1/+116
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Workaround for the following errata: DDR111 - MCKE signal may not function correctly at assertion of HRESET DDR134 - The automatic CAS-to-Preamble feature of the DDR controller can calibrate to incorrect values These two workarounds must be implemented together because they touch common registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Rename MPC8572 DDR erratum to DDR115York Sun2011-02-03-2/+5
| | | | | | | | | | | | | | | | | | | | | | | | Use unique erratum number instead of platform number. Enable command that reports errata on MPC8572DS. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | powerpc/85xx: Remove unnecessary polling loop from DDR initYork Sun2011-02-03-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | This polling loop is not required normally, unless specifically stated in workaround. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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