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* powerpc/86xx: Enable common SRIO init codeKumar Gala2011-01-14-3/+15
| | | | | | | | Add the needed defines and code to utilize the common 8xxx srio init code to setup LAWs and modify device tree if we have SRIO enabled on a board. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Refactor SRIO initialization into common codeKumar Gala2011-01-14-3/+123
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Moved the SRIO init out of corenet_ds and into common code for 8xxx/QorIQ processors that have SRIO. We mimic what we do with PCIe controllers for SRIO. We utilize the fact that SRIO is over serdes to determine if its configured or not and thus can setup the LAWs needed for it dynamically. We additionally update the device tree (to remove the SRIO nodes) if the board doesn't have SRIO enabled. Introduced the following standard defines for board config.h: CONFIG_SYS_SRIO - Chip has SRIO or not CONFIG_SRIO1 - Board has SRIO 1 port available CONFIG_SRIO2 - Board has SRIO 2 port available (where 'n' is the port #) CONFIG_SYS_SRIOn_MEM_VIRT - virtual address in u-boot CONFIG_SYS_SRIOn_MEM_PHYS - physical address (for law setup) CONFIG_SYS_SRIOn_MEM_SIZE - size of window (for law setup) [ These mimic what we have for PCI and PCIe controllers ] Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* fsl_pci: Update PCIe boot ouputPeter Tyser2011-01-14-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This change does the following: - Adds printing of negotiated link width. This information can be useful when debugging PCIe issues. - Makes it optional for boards to implement board_serdes_name(). Previously boards that did not implement it would print unsightly output such as "PCIE1: Connected to <NULL>..." - Rewords the PCIe boot output to reduce line length and to make it clear that the "base address XYZ" value refers to the base address of the internal processor PCIe registers and not a standard PCI BAR value. - Changes "PCIE" output to the standard "PCIe" Before change: PCIE1: connected to <NULL> as Root Complex (base addr ef008000) 01:00.0 - 10b5:8518 - Bridge device 02:01.0 - 10b5:8518 - Bridge device 02:02.0 - 10b5:8518 - Bridge device 02:03.0 - 10b5:8518 - Bridge device PCIE1: Bus 00 - 05 PCIE2: connected to <NULL> as Endpoint (base addr ef009000) PCIE2: Bus 06 - 06 After change: PCIe1: Root Complex of PEX8518 Switch, x4, regs @ 0xef008000 01:00.0 - 10b5:8518 - Bridge device 02:01.0 - 10b5:8518 - Bridge device 02:02.0 - 10b5:8518 - Bridge device 02:03.0 - 10b5:8518 - Bridge device PCIe1: Bus 00 - 05 PCIe2: Endpoint of VPX Fabric A, x2, regs @ 0xef009000 PCIe2: Bus 06 - 06 Signed-off-by: Peter Tyser <ptyser@xes-inc.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci: Add generic code to setup PCIe controllersKumar Gala2011-01-14-0/+10
| | | | | | | | | | | | | | | | | | Since all the PCIe controllers are connected over SERDES on the SoCs we can utilize is_serdes_configured() to determine if a controller is enabled. After which we can setup the ATMUs and LAWs for the controller in a common fashion and allow board code to specify what the controller is connected to for reporting reasons. We also provide a per controller (rather than all) for some systems that may have special requirements. Finally, we refactor the code used by the P1022DS to utilize the new generic code. Based on patch by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci: Determine pci_controller based on cfg addr for dts fixupKumar Gala2011-01-14-40/+3
| | | | | | | | | | | | | | Previously we passed in a specifically named struct pci_controller to determine if we had setup the particular PCI bus. Now we can search for the struct so we dont have to depend on the name or the struct being statically allocated. Introduced new find_hose_by_cfg_addr() to get back a pci_controller struct back by searching for it means we can do things like dynamically allocate them or not have to expose the static structures to all users. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Acked-by: Wolfgang Denk <wd@denx.de>
* powerpc/85xx: Fix bug in dcache_disableKumar Gala2011-01-14-2/+2
| | | | | | | | We set the L1 dache register with a bogus register value. Need to be using 'r3' instead of 'r0'. Reported-by: John Traill <john.traill@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* MPC8xxx DDR: align informational printsBecky Bruce2011-01-14-2/+3
| | | | | | | | | | | | | | | | | | | | Add spaces to cause the informational prints to line up with the ones from init_func_ram() in board.c. Output now looks like this: .... DRAM: Detected 4096 MB of memory This U-Boot only supports < 4G of DDR You could rebuild it with CONFIG_PHYS_64BIT DDR: 2 GiB (DDR2, 64-bit, CL=5, ECC off) .... The prints from lbc_sdram_init() have also been modified to line line up and changed to start with "LBC SDRAM" instead of the confusing "SDRAM". Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* 85xx boards: Rename CONFIG_DDR_DLL to CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_INBecky Bruce2011-01-14-1/+4
| | | | | | | | | This config option is for an erratum workaround; rename it to be more clear. Also, drop it from config files don't need it and were undefining it. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx: rename sdram_init() lbc_sdram_init()Becky Bruce2011-01-14-4/+4
| | | | | | | | sdram_init() is used to initialize sdram on the lbc. Rename it accordingly. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx boards: initdram() cleanup/bugfixBecky Bruce2011-01-14-0/+79
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Correct initdram to use phys_size_t to represent the size of dram; instead of changing this all over the place, and correcting all the other random errors I've noticed, create a common initdram that is used by all non-corenet 85xx parts. Most of the initdram() functions were identical, with 2 common differences: 1) DDR tlbs for the fixed_sdram case were set up in initdram() on some boards, and were part of the tlb_table on others. I have changed them all over to the initdram() method - we shouldn't be accessing dram before this point so they don't need to be done sooner, and this seems cleaner. 2) Parts that require the DDR11 erratum workaround had different implementations - I have adopted the version from the Freescale errata document. It also looks like some of the versions were buggy, and, depending on timing, could have resulted in the DDR controller being disabled. This seems bad. The xpedite boards had a common/fsl_8xxx_ddr.c; with this change only the 517 board uses this so I have moved the ddr code into that board's directory in xpedite517x.c Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* mpc85xx/tlb.c: Allow platforms to specify wimge bitsBecky Bruce2011-01-14-1/+5
| | | | | | | | | | | | | Some platforms might want to override the default wimge=0 for DDR. Add CONFIG_SYS_PPC_DDR_WIMGE for those platforms to use. This will initially only be used by TQM85xx, but could be useful for other boards or testing going forward. Note that the name of this define is not 85xx-specific. WIMGE is a fairly universal concept, so any ppc platforms that require different WIMGE settings for DDR can use the same #define. Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/8xxx: Replace is_fsl_pci_cfg with is_serdes_configuredKumar Gala2011-01-14-207/+0
| | | | | | | Now that we have serdes support for all 85xx/86xx/Pxxx chips we can replace the is_fsl_pci_cfg() code with the is_serdes_configured(). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix wrong SVR value for MPC8567 and MPC8567E processorsPiergiorgio Beruto2011-01-14-2/+2
| | | | | Signed-off-by: Piergiorgio Beruto <piergiorgio.beruto@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for P1021 SERDESKumar Gala2011-01-14-0/+68
| | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for MPC8544 SERDESKumar Gala2011-01-14-0/+96
| | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for MPC8569 SERDESKumar Gala2011-01-14-0/+75
| | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for MPC8568 SERDESKumar Gala2011-01-14-0/+66
| | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for MPC8548 SERDESKumar Gala2011-01-14-0/+66
| | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for MPC8572 SERDESKumar Gala2011-01-14-0/+82
| | | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Chenhui Zhao <b26998@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add is_serdes_configured() support for P2020 SERDESKumar Gala2011-01-14-0/+75
| | | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/86xx: Add SERDES support on MPC8641 & MPC8610Kumar Gala2011-01-14-1/+186
| | | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. This mimics the code we have in place for the 85xx platforms. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Create a SERDES section in MakefileKumar Gala2011-01-14-2/+5
| | | | | | | Created a section in the Makefile for SoC specific SERDES code. Also added P1013 SERDES (use P1022 SERDES code). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Replace CONFIG_SYS_HAS_SERDES with a weak functionKumar Gala2011-01-14-2/+6
| | | | | | Instead of a #define use a null weak function for fsl_serdes_init Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* Merge branch 'master' of git://git.denx.de/u-boot-shWolfgang Denk2011-01-12-95/+192
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| * sh: Add support zimageboot command for Renesas SHNobuhiro Iwamatsu2011-01-11-0/+83
| | | | | | | | | | | | | | | | | | | | Curent U-Boot can boot zImage by use the "go" command. But this is not right method. And this method can not set command-line to linux kernel. zimageboot sets command-line in environment of u-boot in linux kernel, and provides function to boot it. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * sh: Divided macro for zImage and add asm/zimage.hNobuhiro Iwamatsu2011-01-11-16/+45
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * sh: Delete the function that was not necessaryNobuhiro Iwamatsu2011-01-11-1/+0
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
| * sh: Remove SCIF/SCI register infomationNobuhiro Iwamatsu2011-01-11-74/+1
| | | | | | | | | | | | | | | | The register information of SCIF/SCI was compiled by drivers/serial/serial_sh.h. Therefore, these are not necessary. Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support showing KByte of flash memory sizeNobuhiro Iwamatsu2011-01-11-2/+6
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
| * sh: Add support SH7706Nobuhiro Iwamatsu2011-01-11-2/+57
| | | | | | | | Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* | Merge branch 'master' of git://git.denx.de/u-boot-ppc4xxWolfgang Denk2011-01-12-1/+1
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| * | ppc4xx: Fix compilation breakage in miiphy.cStefan Roese2011-01-11-1/+1
| |/ | | | | | | | | | | | | | | Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced a small problem in the ppc4xx miiphy.c version. This patch fixes this problem. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Mike Frysinger <vapier@gentoo.org>
* | microblaze: Fix bd_info pointerMichal Simek2011-01-10-3/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch "Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value" (sha1: 25ddd1fb0a2281b182529afbc8fda5de2dc16d96) introduce GENERATED_GBL_DATA_SIZE which is sizeof aligned gd_t (currently 0x40). Microblaze configs used 0x40(128) because this place also contained board info structure which lies on the top of ram. U-Boot is placed to the top of the ram (for example 0xd7ffffff) and bd structure was moved out of ram. This patch is fixing this scheme with GENERATED_BD_INFO_SIZE which swap global data and board info structures. For example: Current: gd 0xd7ffffc0, bd 0xd8000000 Fixed: gd 0xd7ffffc0, bd 0xd7ffff90 Signed-off-by: Michal Simek <monstr@monstr.eu>
* | microblaze: Disabling interrupt should return 1 if was enabledMichal Simek2011-01-10-1/+4
|/ | | | | | | | | | Microblaze implement enable/disable interrupts through MSR that's why disable_interrupts function should return 1 when interrupt was enabled. Return 0 when interrupt was disabled. Signed-off-by: John Linn <john.linn@xilinx.com> Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Wolfgang Denk <wd@denx.de>
* miiphy: convert to linux/mii.hMike Frysinger2011-01-09-64/+64
| | | | | | | | The include/miiphy.h header duplicates a lot of things from linux/mii.h. So punt all the things that overlap to keep the API simple and to make merging between U-Boot and Linux simpler. Signed-off-by: Mike Frysinger <vapier@gentoo.org>
* Merge branch 'next' of ../nextWolfgang Denk2010-12-22-93/+920
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| * powerpc: fix register usage in some inline assembly codeTimur Tabi2010-12-17-11/+19
| | | | | | | | | | | | | | In some usages of inline assembly, hard-coded registers were specified when a scratch register should have been used instead. Signed-off-by: Timur Tabi <timur@freescale.com>
| * 74xx_7xx/mpc86xx/ppmc7xx: Fix do_reset() declarationPeter Tyser2010-12-17-5/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The following commit: commit 882b7d726febe65579d6502c271412ecb05821d7 Author: Mike Frysinger <vapier@gentoo.org> Date: Wed Oct 20 03:41:17 2010 -0400 do_reset: unify duplicate prototypes missed the 74xx_7xx and mpc86xx arches and the ppmc7xx board do_reset() functions which resulted in build errors such as: cpu.c:128: error: conflicting types for 'do_reset' include/command.h:102: error: previous declaration of 'do_reset' was here Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
| * PowerPC: Add relocation support for -fpicJoakim Tjernlund2010-12-17-22/+33
| | | | | | | | | | | | | | | | | | By rearranging the linker script we get support for relocation of -fpic for free. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Scott Wood <scottwood@freescale.com> Acked-by: Kim Phillips <kim.phillips@freescale.com>
| * xilinx-ppc4xx-generic: Use common u-boot.ldsRicardo Ribalda Delgado2010-12-17-1/+9
| | | | | | | | | | | | | | Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards. Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com> Signed-off-by: Stefan Roese <sr@denx.de>
| * ppc4xx: Clarify comment about boot chip-select in start.SStefan Roese2010-12-17-12/+14
| | | | | | | | | | | | | | Ths old comment was quite screwed up. Replace it with a new version that should be a bit more descriptive. Signed-off-by: Stefan Roese <sr@denx.de>
| * add Multi Function Pin configuration support for ARMADA100Prafulla Wadaskar2010-12-16-0/+67
| | | | | | | | | | | | This patch adds the support MFP support for Marvell ARMADA100 SoCs Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * arm: Add Support for Marvell ARMADA 100 Familiy SoCsPrafulla Wadaskar2010-12-16-0/+650
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | ARMADA 100 Family processors are highly integrated SoCs based on Sheeva_88SV331x-v5 PJ1 cpu core. Ref: http://www.marvell.com/products/processors/applications/armada_100 SoC versions Supported: 1) ARMADA168/88AP168 (Aspen P) 2) ARMADA166/88AP166 (Aspen M) 3) ARMADA162/88AP162 (Aspen L) Contributors: Eric Miao <eric.y.miao@gmail.com> Lei Wen <leiwen@marvell.com> Mahavir Jain <mjain@marvell.com> Signed-off-by: Mahavir Jain <mjain@marvell.com> Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
| * Merge branch 'master' of ../master into nextWolfgang Denk2010-12-16-287/+387
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| * | Remove redundant config.mk filesWolfgang Denk2010-12-09-24/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Recent cleanup actions resulted in a number of config.mk files that contained only redundant entries like PLATFORM_CPPFLAGS += -I$(TOPDIR) or settings of variables that were not used anywhere in the code, like TEXT_END = 0xfe080000 Remove these unnecessary files. Signed-off-by: Wolfgang Denk <wd@denx.de> Cc: Scott McNutt <smcnutt@psyent.com> Cc: Wolfgang Wegner <w.wegner@astro-kom.de> Cc: Josef Wagner <Wagner@Microsys.de> Cc: Tolunay Orkun <torkun@nextio.com> Cc: Frank Panno <fpanno@delphintech.com> Cc: Heiko Schocher <hs@denx.de> Cc: Brad Kemp <Brad.Kemp@seranoa.com> Acked-by: Heiko Schocher<hs@denx.de>
| * | Davinci 8xx: Move common functions to share codeStefano Babic2010-12-09-37/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As more Davinci 8xx board can be added, move common code to be shared between boards. * rebased ontop of Sugosh's patches * moving the HAWKBOARD_KICK{0,1}_UNLOCK defines to arch/arm/include/asm/arch-davinci/davinci_misc.h from to arch/arm/include/asm/arch-davinci/da8xx_common.h * don't define dram functions in PRELOADER * move sync_env_enetaddr into existing EMAC ifdef * use misc.c in hawkboard nand_spl Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Stefano Babic <sbabic@denx.de> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | da850: Add RMII support for EMACSudhakar Rajashekhara2010-12-09-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch is a port of the work by Sudhakar Rajeshekhara in commit ab3effbcad8851cc65dc5241a01c064d2030a3b2 of git://arago-project.org/git/people/sandeep/u-boot-davinci.git. The da850 UI board has on it an RMII PHY which can be used if the MDC line to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by configuring the values of some GPIO pins on the IO expander of the UI board. This patch implements disabling that line via GPIO2[6], configuring the UI board's IO expander and setting only the pinmux settings that are needed for RMII operation. Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> CC: Sandeep Paulraj <s-paulraj@ti.com> CC: Ben Warren <biggerbadderben@gmail.com> CC: Mike Frysinger <vapier@gentoo.org> CC: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | Add board support for hawkboardSughosh Ganu2010-12-09-1/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch adds basic board support for TI's OMAP-L138 based Hawkboard. This board is pretty similar to the da850 EVM. Support for nand and network access is added in this version. The following bootup procedure is used. At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand controllers and copies the second stage bootloader(nand_spl) to RAM. The secondary bootloader then copies u-boot from a predefined location in the nand flash to the RAM, and passes control to the u-boot image. Three config options are supported * hawkboard_config - Used to create the u-boot.bin. Tftp the u-boot.bin image to the RAM from u-boot, and flash to the nand flash at address 0xe0000. * hawkboard_nand_config - Used to generate the secondary bootloader(nand_spl) image. This creates an elf file u-boot-spl under nand_spl/. Create an AIS signed image using this file, and flash it to the nand flash at address 0x20000. The ais file should fit in one block. * hawkboard_uart_config - This is same as the first image, but with the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | Move and rename common headers from underSughosh Ganu2010-12-09-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | board/davinci. Move the davinci common headers to the architecture specific include file path. Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
| * | da850: Enable SPI FlashStefano Babic2010-12-09-1/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch was already posted to the arago project, but not yet to mainline. It allows to save environment into the spi flash. Tested on LogiPD tmdxl138. Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com> Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Detlev Zundev <dzu@denx.de> CC: Ben Gardiner <bengardiner@nanometrics.ca> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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