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* ARM1176: TI: TNETV107X soc initial supportCyril Chemparathy2010-06-08-0/+1872
| | | | | | | | | TNETV107X is a Texas Instruments SoC based on an ARM1176 core, and with a bunch on on-chip integrated peripherals. This is an initial commit with basic functionality, more commits with drivers, etc. to follow. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM1176: Coexist with other ARM1176 platformsCyril Chemparathy2010-06-08-21/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current ARM1176 CPU specific code is too specific to the SMDK6400 architecture. The following changes were necessary prerequisites for the addition of other SoCs based on ARM1176. Existing board's (SMDK6400) configuration has been modified to keep behavior unchanged despite these changes. 1. Peripheral port remap configurability The earlier code had hardcoded remap values specific to s3c64xx in start.S. This change makes the peripheral port remap addresses and sizes configurable. 2. U-Boot code relocation support Most architectures allow u-boot code to run initially at a different address (possibly in NOR) and then get relocated to its final resting place in RAM. Added support for this capability in ARM1176 architecture. 3. Disable TCM if necessary If a ROM based bootloader happened to have initialized TCM, we disable it here to keep things sane. 4. Remove unnecessary SoC specific includes ARM1176 code does not really need this SoC specific include. The presence of this include prevents builds on other ARM1176 archs. 5. Modified virt-to-phys conversion during MMU disable The original MMU disable code masks out too many bits from the load address when it tries to figure out the physical address of the jump target label. Consequently, it ends up branching to the wrong address after disabling the MMU. Signed-off-by: Cyril Chemparathy <cyril@ti.com> Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
* ARM1136: Fix cache_flush() error and correct cpu_init_crit() commentsGeorge G. Davis2010-06-01-2/+3
| | | | | | | | | | | | | | | The ARM1136 cache_flush() function uses the "mcr p15, 0, rn, c7, c7, 0" instruction which means "Invalidate Both Caches" when in fact the intent is to clean and invalidate all caches. So add an "mcr p15, 0, %0, c7, c10, 0" instruction to "Clean Entire Data Cache" prior to the "Invalidate Both Caches" instruction to insure that memory is consistent with any dirty cache lines. Also fix a couple of "flush v*" comments in ARM1136 cpu_init_crit() so that they correctly describe the actual ARM1136 CP15 C7 Cache Operations used. Signed-off-by: George G. Davis <gdavis@mvista.com>
* ARM Update mach-typesTom2010-05-28-6/+500
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 3defb2476166445982a90c12d33f8947e75476c4 Signed-off-by: Tom <Tom@bumblecow.com>
* ARM Update mach-typesTom2010-05-28-2/+665
| | | | | | | | | | Fetched from http://www.arm.linux.org.uk/developer/machines/download.php And built with repo http://ftp.arm.linux.org.uk/pub/linux/arm/kernel/git-cur/linux-2.6-arm commit 257dab81413b31b8648becfe11586b3a41e5c29a Signed-off-by: Tom <Tom@bumblecow.com>
* Coding style cleanup, update CHANGELOG.Wolfgang Denk2010-05-26-3/+0
| | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-26-20/+20
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| * mpc83xx: don't shift pre-shifted ACR, SPCR, SCCR bitfield masks in cpu_init.cKim Phillips2010-05-21-18/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit c7190f028fa950d4d36b6d0b4bb3fc72602ec54c "mpc83xx: retain POR values of non-configured ACR, SPCR, SCCR, and LCRR bitfields" incorrectly shifted <register>_<bitfield> (e.g. ACR_PIPE_DEP) values that were preshifted by their definition in mpc83xx.h. this patch removes the unnecessary shifting for the newly utilized mask values in cpu_init.c, and prevents seemingly unrelated symptoms such as an mpc8379erdb board from locking up whilst performing a networking operation, e.g. a tftp. Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
| * Fixed two typos in arch/powerpc/cpu/mpc83xx/start.S.Horst Kronstorfer2010-05-21-2/+2
| | | | | | | | | | Signed-off-by: Horst Kronstorfer <hkronsto@frequentis.com> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | Convert Makefiles from COBJS-${} to COBJS-$()Kumar Gala2010-05-26-5/+5
| | | | | | | | | | | | Match style we use almost everywhere else Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/bootcount: Fix endianness problemMichael Weiss2010-05-26-2/+4
| | | | | | | | | | | | | | For CONFIG_SYS_BOOTCOUNT_SINGLEWORD the code had an endianness problem. Signed-off-by: Michael Weiss <michael.weiss@ifm.com> Signed-off-by: Detlev Zundel <dzu@denx.de>
* | a320evb: fix udelay / __udelay confusionWolfgang Denk2010-05-21-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Fix the following compiler problems: arch/arm/cpu/arm920t/a320/liba320.a(timer.o): In function `udelay': /home/wd/git/u-boot/work/arch/arm/cpu/arm920t/a320/timer.c:160: multiple definition of `udelay' lib/libgeneric.a(time.o):/home/wd/git/u-boot/work/lib/time.c:34: first defined here lib/libgeneric.a(time.o): In function `udelay': time.c:(.text+0x1c): undefined reference to `__udelay' Signed-off-by: Wolfgang Denk <wd@denx.de>
* | ARM: */timer.c: fix spelling and vertical alignmentWolfgang Denk2010-05-21-18/+18
| | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-imxWolfgang Denk2010-05-21-1/+1
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| * MX51: Fix MX51 CPU detect messageFabio Estevam2010-05-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Fix MX51 CPU detect message. Original string was: CPU: Freescale i.MX51 family 3.0V at 800 MHz which can be misinterpreted as 3.0 Volts instead of the silicon revision. ,change it to: CPU: Freescale i.MX51 family rev3.0 at 800 MHz Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-17-0/+2
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| * | mpc83xx: fix NAND bootstrap too big errorKim Phillips2010-05-17-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | commit 167cdad1372917bc11c636c359aad02625291fa9 "SERIAL: Enable port-mapped access" inadvertently broke 83xx nand boards by converting NS16550_init to use io accessors, which expanded the size of the generated code. this patch fixes the problem by removing icache functions from the nand builds, which somewhat follows commit 1a2e203b31d33fb720f2cf1033b241ad36ab405a "mpc83xx: turn on icache in core initialization to improve u-boot boot time" Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxWolfgang Denk2010-05-17-33/+129
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| * | Enabled support for Rev 1.3 SPD for DDR2 DIMMsYork Sun2010-05-12-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPD has minor change from Rev 1.2 to 1.3. This patch enables Rev 1.3. The difference has ben examined and the code is compatible. Speed bins is not verified on hardware for CL7 at this moment. This patch also enables SPD Rev 1.x where x is up to "F". According to SPD spec, the lower nibble is optionally used to determine which additinal bytes or attribute bits have been defined. Software can safely use defaults. However, the upper nibble should always be checked. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/fsl-sata: Use is_serdes_configured() to determine if SATA is enabledKumar Gala2010-05-12-1/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the MPC85xx platform if we have SATA its connected on SERDES. Determing if SATA is enabled via sata_initialize should not be board specific and thus we move it out of the MPC8536DS board code. Additionally, now that we have is_serdes_configured() we can determine if the given SATA port is enabled and error out if its not in the driver. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx/mpc8536ds: Use is_serdes_configured() to determine of PCIe enabledKumar Gala2010-05-12-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The new is_serdes_configured covers a broader range of devices than the PCI specific code. Use it instead as we convert away from the is_fsl_pci_cfg() code. Additionally move to setting LAWs for PCI based on if its configured. Also updated PCI FDT fixup code to remove PCI controllers from dtb if they are configured. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * | 85xx: Add is_serdes_configured() support to MPC8536 SERDESKumar Gala2010-05-12-18/+114
| | | | | | | | | | | | | | | | | | | | | | | | Add the ability to determine if a given IP block connected on SERDES is configured. This is useful for things like PCIe and SRIO since they are only ever connected on SERDES. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | | ARM: add __aeabi_unwind_cpp_pr0() function to avoid linker complaintsWolfgang Denk2010-05-15-0/+5
|/ / | | | | | | | | Signed-off-by: Wolfgang Denk <wd@denx.de> Tested-by: Thomas Weber <weber@corscience.de>
* | Merge branch 'master' of git://git.denx.de/u-boot-mpc83xxWolfgang Denk2010-05-09-0/+1
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| * | mpc83xx: Add UPMA configuration to SIMPC8313Ron Madrid2010-05-07-0/+1
| | | | | | | | | | | | | | | | | | | | | Added UPM array table, upmconfig, and Local Bus configuration support for SIMPC8313 Signed-off-by: Ron Madrid <ron_madrid@sbcglobal.net> Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
* | | update include/asm/ gitignore after moveMike Frysinger2010-05-07-0/+2
| | | | | | | | | | | | | | | | | | | | | With the cpu include paths moved, the gitignore paths need updating. Signed-off-by: Mike Frysinger <vapier@gentoo.org> Tested-by: Tom Rix <tom@bumblecow.com>
* | | powerpc: Consolidate bootcount_{store|load} for PowerPCStefan Roese2010-05-06-124/+91
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch consolidates bootcount_{store|load} for PowerPC by implementing a common version in arch/powerpc/lib/bootcount.c. This code is now used by all PowerPC variants that currently have these functions implemented. The functions now use the proper IO-accessor functions to read/write the values. This code also supports two different bootcount versions: a) Use 2 separate words (2 * 32bit) to store the bootcounter b) Use only 1 word (2 * 16bit) to store the bootcounter Version b) was already used by MPC5xxx. Signed-off-by: Stefan Roese <sr@denx.de> Acked-by: Detlev Zundel <dzu@denx.de> Acked-by: Kim Phillips <kim.phillips@freescale.com> for 83xx parts Cc: Michael Zaidman <michael.zaidman@gmail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Kim Phillips <kim.phillips@freescale.com> Cc: Anatolij Gustschin <agust@denx.de>
* | sc520: Fix minor DRAM Controller Setup bugGraeme Russ2010-05-06-1/+1
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | sc520: Update to new AMD CopyrightGraeme Russ2010-05-06-40/+77
| | | | | | | | | | | | | | AMD recently changed the licensing of the RAM sizing code to the GPLv2 (or at your option any later version) Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | sc520: Board Specific PCI InitGraeme Russ2010-05-06-37/+3
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | sc520: Move PCI defines to PCI include fileGraeme Russ2010-05-06-29/+29
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | sc520: Allow boards to override udelayGraeme Russ2010-05-06-0/+5
| | | | | | | | | | | | | | If the board has a high precision mico-second timer, it maked sense to use it instead of the on-chip one Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Fix support for booting bzImageGraeme Russ2010-05-06-32/+424
| | | | | | | | | | | | | | | | | | | | | | Add support for newer (up to 2.6.33) kernels Add zboot command which takes the address of a bzImage as its first argument and (optionally) the size of the bzImage as the second argument (the second argument is needed for older kernels which do not include the bzImage size in the header) Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Provide weak PC/AT compatibility setup functionGraeme Russ2010-05-06-0/+9
| | | | | | | | | | | | | | | | | | | | It is possibly to setup x86 boards to use non-PC/AT configurations. For example, the sc520 is an x86 CPU with PC/AT and non-PC/AT peripherals. This function allows the board to set itself up for maximum PC/AT compatibility just before booting the Linux kernel (the Linux kernel 'just works' if everything is PC/AT compliant) Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Use CONFIG_SERIAL_MULTIGraeme Russ2010-05-06-508/+5
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Fix copying of Real-Mode code into RAMGraeme Russ2010-05-06-2/+2
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Pass relocation offset into Global DataGraeme Russ2010-05-06-27/+36
| | | | | | | | | | | | | | In order to locate the 16-bit BIOS code, we need to know the reloaction offset. Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Move GDT to a safe location in RAMGraeme Russ2010-05-06-14/+103
| | | | | | | | | | | | | | | | | | Currently, the GDT is either located in FLASH or in the non-relocated U-Boot image in RAM. Both of these locations are unsafe as those locations can be erased during a U-Boot update. Move the GDT into the highest available memory location and relocate U-Boot to just below it Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Add RAM bootstrap functionalityGraeme Russ2010-05-06-6/+38
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a parameter to the 32-bit entry to indicate if entry is from Real Mode or not. If entry is from Real Mode, execute the destructive 'sizer' routine to determine memory size as we are booting cold and running in Flash. If not entering from Real Mode, we are executing a U-Boot image from RAM and therefore the memory size is already known (and running 'sizer' will destroy the running image) There are now two 32-bit entry points. The first is the 'in RAM' entry point which exists at the start of the U-Boot binary image. As such, you can load u-boot.bin in RAM and jump directly to the load address without needing to calculate any offsets. The second entry point is used by the real-to-protected mode switch This patch also changes TEXT_BASE to 0x6000000 (in RAM). You can load the resulting image at 0x6000000 and simple go 0x6000000 from the u-boot prompt Hopefully a later patch will completely elliminate any dependency on TEXT_BASE like a relocatable linux kernel (perfect world) Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Split sc520 memory sizing versus reportingGraeme Russ2010-05-06-38/+61
| | | | | | | | | | | | | | | | This patch allows the low-level assembler boot-strap to obtain the RAM size without calling the destructive 'sizer' routine. This allows boot-strapping from a U-Boot image loaded in RAM Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Fix sc520 memory size reportingGraeme Russ2010-05-06-18/+17
| | | | | | | | | | | | | | | | There is an error in how the assembler version of the sc520 memory size reporting code works. As a result, it will only ever report at most the size of one bank of RAM Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Fix do_go_exec()Graeme Russ2010-05-06-4/+4
| | | | | | | | | | | | | | This was broken a long time ago by a49864593e083a5d0779fb9ca98e5a0f2053183d which munged the NIOS and x86 do_go_exec() Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Add register dump to crash handlersGraeme Russ2010-05-06-34/+180
| | | | | | | | | | | | | | | | Shamelessly steal the Linux x86 crash handling code and shove it into U-Boot (cool - it fits). Be sure to include suitable attribution to Linus Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Fix MMCR AccessGraeme Russ2010-05-06-52/+63
| | | | | | | | | | | | Change sc520 MMCR Access to use memory accessor functions Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: #ifdef out getenv_IPaddr()Graeme Russ2010-05-06-0/+2
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | x86: Add unaligned.hGraeme Russ2010-05-06-0/+1
| | | | | | | | Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
* | ppc: unused memory region too close to current stack pointerNorbert van Bolhuis2010-05-05-2/+2
|/ | | | | | | | | | This avoids a possible overwrite of the (end of) ramdisk by u-boot. The unused memory region for ppc boot currently starts 1k below the do_bootm->bootm_start->arch_lmb_reserve stack ptr. This isn't enough since do_bootm->do_bootm_linux->boot_relocate_fdt calls printf which may very well use more than 1k stack space. Signed-off-by: Norbert van Bolhuis <nvbolhuis@aimvalley.nl>
* Merge branch 'master' of git://git.denx.de/u-boot-netWolfgang Denk2010-05-04-40/+1
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| * Remove unused "local_crc32" function.Detlev Zundel2010-05-03-40/+1
| | | | | | | | | | | | | | For code archeologists, this is a nice example of copy and paste history. Signed-off-by: Detlev Zundel <dzu@denx.de> Signed-off-by: Ben Warren <biggerbadderben@gmail.com>
* | at91: define matrix registers bit fieldsAsen Dimov2010-04-30-0/+138
| | | | | | | | Signed-off-by: Asen Dimov <dimov@ronetix.at>
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