| Commit message (Collapse) | Author | Age | Lines |
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This config option is for an erratum workaround; rename it to be more
clear. Also, drop it from config files don't need it and were
undefining it.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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sdram_init() is used to initialize sdram on the lbc. Rename it
accordingly.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Correct initdram to use phys_size_t to represent the size of
dram; instead of changing this all over the place, and correcting
all the other random errors I've noticed, create a
common initdram that is used by all non-corenet 85xx parts. Most
of the initdram() functions were identical, with 2 common differences:
1) DDR tlbs for the fixed_sdram case were set up in initdram() on
some boards, and were part of the tlb_table on others. I have
changed them all over to the initdram() method - we shouldn't
be accessing dram before this point so they don't need to be
done sooner, and this seems cleaner.
2) Parts that require the DDR11 erratum workaround had different
implementations - I have adopted the version from the Freescale
errata document. It also looks like some of the versions were
buggy, and, depending on timing, could have resulted in the
DDR controller being disabled. This seems bad.
The xpedite boards had a common/fsl_8xxx_ddr.c; with this
change only the 517 board uses this so I have moved the ddr code
into that board's directory in xpedite517x.c
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Tested-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Some platforms might want to override the default wimge=0 for
DDR. Add CONFIG_SYS_PPC_DDR_WIMGE for those platforms to use.
This will initially only be used by TQM85xx, but could be
useful for other boards or testing going forward. Note that
the name of this define is not 85xx-specific. WIMGE is a
fairly universal concept, so any ppc platforms that require
different WIMGE settings for DDR can use the same #define.
Signed-off-by: Becky Bruce <beckyb@kernel.crashing.org>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Now that we have serdes support for all 85xx/86xx/Pxxx chips we can
replace the is_fsl_pci_cfg() code with the is_serdes_configured().
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Signed-off-by: Piergiorgio Beruto <piergiorgio.beruto@gmail.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Chenhui Zhao <b26998@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES.
Signed-off-by: Li Yang <leoli@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Add the ability to determine if a given IP block connected on SERDES is
configured. This is useful for things like PCIe and SRIO since they are
only ever connected on SERDES. This mimics the code we have in place
for the 85xx platforms.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Created a section in the Makefile for SoC specific SERDES code. Also
added P1013 SERDES (use P1022 SERDES code).
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Instead of a #define use a null weak function for fsl_serdes_init
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
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Curent U-Boot can boot zImage by use the "go" command.
But this is not right method. And this method can not set command-line
to linux kernel.
zimageboot sets command-line in environment of u-boot in linux kernel,
and provides function to boot it.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
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The register information of SCIF/SCI was compiled
by drivers/serial/serial_sh.h.
Therefore, these are not necessary.
Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
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Patch 8ef583a0 [miiphy: convert to linux/mii.h] introduced a small
problem in the ppc4xx miiphy.c version. This patch fixes this problem.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Mike Frysinger <vapier@gentoo.org>
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Patch "Replace CONFIG_SYS_GBL_DATA_SIZE by auto-generated value"
(sha1: 25ddd1fb0a2281b182529afbc8fda5de2dc16d96)
introduce GENERATED_GBL_DATA_SIZE which is sizeof aligned gd_t
(currently 0x40).
Microblaze configs used 0x40(128) because this place also contained
board info structure which lies on the top of ram.
U-Boot is placed to the top of the ram (for example 0xd7ffffff)
and bd structure was moved out of ram.
This patch is fixing this scheme with GENERATED_BD_INFO_SIZE
which swap global data and board info structures.
For example:
Current: gd 0xd7ffffc0, bd 0xd8000000
Fixed: gd 0xd7ffffc0, bd 0xd7ffff90
Signed-off-by: Michal Simek <monstr@monstr.eu>
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Microblaze implement enable/disable interrupts through MSR
that's why disable_interrupts function should return 1 when interrupt
was enabled. Return 0 when interrupt was disabled.
Signed-off-by: John Linn <john.linn@xilinx.com>
Signed-off-by: Michal Simek <monstr@monstr.eu>
Acked-by: Wolfgang Denk <wd@denx.de>
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The include/miiphy.h header duplicates a lot of things from linux/mii.h.
So punt all the things that overlap to keep the API simple and to make
merging between U-Boot and Linux simpler.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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In some usages of inline assembly, hard-coded registers were
specified when a scratch register should have been used instead.
Signed-off-by: Timur Tabi <timur@freescale.com>
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The following commit:
commit 882b7d726febe65579d6502c271412ecb05821d7
Author: Mike Frysinger <vapier@gentoo.org>
Date: Wed Oct 20 03:41:17 2010 -0400
do_reset: unify duplicate prototypes
missed the 74xx_7xx and mpc86xx arches and the ppmc7xx board do_reset()
functions which resulted in build errors such as:
cpu.c:128: error: conflicting types for 'do_reset'
include/command.h:102: error: previous declaration of 'do_reset' was here
Signed-off-by: Peter Tyser <ptyser@xes-inc.com>
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By rearranging the linker script we get support for
relocation of -fpic for free.
Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se>
Acked-by: Scott Wood <scottwood@freescale.com>
Acked-by: Kim Phillips <kim.phillips@freescale.com>
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Use common ppc4xx linker script for xilinx ppc440 and ppc405 related boards.
Signed-off-by: Ricardo Ribalda Delgado <ricardo.ribalda@gmail.com>
Signed-off-by: Stefan Roese <sr@denx.de>
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Ths old comment was quite screwed up. Replace it with a new version
that should be a bit more descriptive.
Signed-off-by: Stefan Roese <sr@denx.de>
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This patch adds the support MFP support for Marvell ARMADA100 SoCs
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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ARMADA 100 Family processors are highly integrated SoCs
based on Sheeva_88SV331x-v5 PJ1 cpu core.
Ref: http://www.marvell.com/products/processors/applications/armada_100
SoC versions Supported:
1) ARMADA168/88AP168 (Aspen P)
2) ARMADA166/88AP166 (Aspen M)
3) ARMADA162/88AP162 (Aspen L)
Contributors:
Eric Miao <eric.y.miao@gmail.com>
Lei Wen <leiwen@marvell.com>
Mahavir Jain <mjain@marvell.com>
Signed-off-by: Mahavir Jain <mjain@marvell.com>
Signed-off-by: Prafulla Wadaskar <prafulla@marvell.com>
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Recent cleanup actions resulted in a number of config.mk files that
contained only redundant entries like
PLATFORM_CPPFLAGS += -I$(TOPDIR)
or settings of variables that were not used anywhere in the code, like
TEXT_END = 0xfe080000
Remove these unnecessary files.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Cc: Scott McNutt <smcnutt@psyent.com>
Cc: Wolfgang Wegner <w.wegner@astro-kom.de>
Cc: Josef Wagner <Wagner@Microsys.de>
Cc: Tolunay Orkun <torkun@nextio.com>
Cc: Frank Panno <fpanno@delphintech.com>
Cc: Heiko Schocher <hs@denx.de>
Cc: Brad Kemp <Brad.Kemp@seranoa.com>
Acked-by: Heiko Schocher<hs@denx.de>
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As more Davinci 8xx board can be added, move common code
to be shared between boards.
* rebased ontop of Sugosh's patches
* moving the HAWKBOARD_KICK{0,1}_UNLOCK defines to
arch/arm/include/asm/arch-davinci/davinci_misc.h from to
arch/arm/include/asm/arch-davinci/da8xx_common.h
* don't define dram functions in PRELOADER
* move sync_env_enetaddr into existing EMAC ifdef
* use misc.c in hawkboard nand_spl
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Stefano Babic <sbabic@denx.de>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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This patch is a port of the work by Sudhakar Rajeshekhara in commit
ab3effbcad8851cc65dc5241a01c064d2030a3b2 of
git://arago-project.org/git/people/sandeep/u-boot-davinci.git.
The da850 UI board has on it an RMII PHY which can be used if the MDC line
to the MII PHY on the baseboard is disabled and the RMII PHY is enabled by
configuring the values of some GPIO pins on the IO expander of the UI board.
This patch implements disabling that line via GPIO2[6], configuring the UI
board's IO expander and setting only the pinmux settings that are needed for
RMII operation.
Tested on da850evm by adding a define for CONFIG_DRIVER_TI_EMAC_USE_RMII.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
CC: Sandeep Paulraj <s-paulraj@ti.com>
CC: Ben Warren <biggerbadderben@gmail.com>
CC: Mike Frysinger <vapier@gentoo.org>
CC: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The patch adds basic board support for TI's OMAP-L138 based
Hawkboard. This board is pretty similar to the da850 EVM. Support for
nand and network access is added in this version.
The following bootup procedure is used.
At reset, the Rom Boot Loader(RBL), initialises the ddr and the nand
controllers and copies the second stage bootloader(nand_spl) to
RAM. The secondary bootloader then copies u-boot from a predefined
location in the nand flash to the RAM, and passes control to the
u-boot image.
Three config options are supported
* hawkboard_config - Used to create the u-boot.bin. Tftp the
u-boot.bin image to the RAM from u-boot, and flash to the nand flash
at address 0xe0000.
* hawkboard_nand_config - Used to generate the secondary
bootloader(nand_spl) image. This creates an elf file u-boot-spl
under nand_spl/. Create an AIS signed image using this file, and
flash it to the nand flash at address 0x20000. The ais file should
fit in one block.
* hawkboard_uart_config - This is same as the first image, but with
the TEXT_BASE as expected by the RBL(0xc1080000). Create the AIS
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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board/davinci.
Move the davinci common headers to the architecture specific
include file path.
Signed-off-by: Sughosh Ganu <urwithsughosh@gmail.com>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The patch was already posted to the arago project,
but not yet to mainline. It allows to save environment into
the spi flash. Tested on LogiPD tmdxl138.
Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundev <dzu@denx.de>
CC: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
CC: Stefano Babic <sbabic@denx.de>
CC: Detlev Zundev <dzu@denx.de>
CC: Ben Gardiner <bengardiner@nanometrics.ca>
Signed-off-by: Sandeep Paulraj <s-paulraj@ti.com>
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The duplication of the do_reset prototype has gotten out of hand,
and they're not all in sync. Unify them all in command.h.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
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It can be optimised out by the compiler otherwise resulting
in obscure errors like a board not booting.
This has been documented in README since 2006 when these were
first fixed up for GCC 4.x.
Signed-off-by: John Rigby <john.rigby@linaro.org>
Fix some additional places.
Signed-off-by: Wolfgang Denk <wd@denx.de>
Acked-By: Albert ARIBAUD <albert.aribaud@free.fr>
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Signed-off-by: Guido Classen <clagix@gmail.com>
Signed-off-by: Reinhard Meyer <u-boot@emk-elektronik.de>
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This patch fix a problem for the pcie enumeration for mpc83xx cpus. Without
this we will not get correct value in hose->regions[...].
The pointer *reg in function mpc83xx_pcie_init_bus() shall not be changed.
Because we will use this pointer as a parameter to call function
mpc83xx_pcie_register_hose().
Signed-off-by: Baidu Boy <liucai.lfn@gmail.com>
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
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