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* Merge branch 'master' of git://www.denx.de/git/u-boot-imxTom Rini2016-01-03-5/+50
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| * imx_common: check for Serial Downloader in spl_boot_deviceStefano Babic2016-01-03-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Check for bmode before reading the boot device to check if a serial downloader is started, and returns UART if the serial downloader is set, letting SPL to wait for an image if CONFIG_SPL_YMODEM_SUPPORT is set. This allows to load again a SPL based board with imx_usb_loader together with a tool such as kermit. Signed-off-by: Stefano Babic <sbabic@denx.de> CC: Tim Harvey <tharvey@gateworks.com> CC: Fabio Estevam <Fabio.Estevam@freescale.com> CC: Eric Nelson <eric.nelson@boundarydevices.com> Reviewed-by: Eric Nelson <eric@nelint.com> Tested-by: Eric Nelson <eric@nelint.com>
| * ARM: mxs: allow boards to select DC-DC switching clock sourceMichael Heimpold2016-01-03-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For some board designs, it might be useful to switch the DC-DC clock source to something else rather the default 24 MHz, e.g. for EMI reasons. For this, override the mxs_power_setup_dcdc_clocksource function in your board support files. Example: void mxs_power_setup_dcdc_clocksource(void) { mxs_power_switch_dcdc_clocksource(POWER_MISC_FREQSEL_20MHZ); } Signed-off-by: Michael Heimpold <mhei@heimpold.de> Cc: Marek Vasut <marex@denx.de> Cc: Otavio Salvador <otavio@ossystems.com.br> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Marek Vasut <marex@denx.de>
| * imx: ddr: drop duplicated debug infoPeng Fan2016-01-03-1/+0
| | | | | | | | | | | | | | Drop duplicated debug info for tcl. Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
| * imx: mx6: fix reg base address when runtime usagePeng Fan2015-12-07-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Should use parenthese to wrap the macro definition, otherwise we will encounter error like the following: " if (base_addr != LCDIF1_BASE_ADDR) { puts("Wrong LCD interface!\n"); return -EINVAL; } " Without this patch, we will always encounter "Wrong LCD interface". Signed-off-by: Peng Fan <Peng.Fan@freescale.com> Cc: Stefano Babic <sbabic@denx.de> Reviewed-by: Stefano Babic <sbabic@denx.de>
| * imx: mx6: add missing return valueJeroen Hofstee2015-12-07-0/+2
| | | | | | | | | | | | | | cc: Peng Fan <Peng.Fan@freescale.com> Signed-off-by: Jeroen Hofstee <jeroen@myspectrum.nl> Reviewed-by: Peng Fan <Peng.Fan@freescale.com> Reviewed-by: Stefano Babic <sbabic@denx.de>
* | Merge git://git.denx.de/u-boot-socfpgaTom Rini2015-12-24-3/+22
|\ \ | | | | | | | | | | | | | | | | | | Conflicts: include/configs/axs101.h Signed-off-by: Tom Rini <trini@konsulko.com>
| * | arm: socfpga: Unreset NAND in U-BootMarek Vasut2015-12-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Make sure the NAND reset is not asserted in full U-Boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
| * | arm: socfpga: Unreset NAND in SPLMarek Vasut2015-12-22-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | If the system boots from NAND, make sure to de-assert the NAND IP reset, otherwise the system will get stuck. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Define NAND reset bitMarek Vasut2015-12-22-1/+2
| | | | | | | | | | | | | | | | | | | | | Define the NAND reset bit and fix the ordering of the macros. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Make /soc available in pre-relocMarek Vasut2015-12-22-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | This node must be available before relocation, otherwise the board will not find mmc and will thus not boot. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Actually enable L2 cacheMarek Vasut2015-12-22-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | The L2 cache was never enabled in the v7_outer_cache_enable(), fix this and enable the L2 cache. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Chin Liang See <clsee@altera.com>
* | | ARM: dts: uniphier: add SD/MMC pinmux nodesMasahiro Yamada2015-12-23-0/+15
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: set DTB file name to fdt_file environmentMasahiro Yamada2015-12-23-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When we want to boot Linux with a DTB file downloaded from a TFTP server or somewhere, we need to know the file name to be downloaded. Assume the U-Boot configuration is shared among some similar boards. If they are similar enough, the difference only appears in device trees. The build procedure would be like this: - Board A: make foo_common_defconfig && make DEVICE_TREE=foo_board_a - Board B: make foo_common_defconfig && make DEVICE_TREE=foo_board_b - Board C: make foo_common_defconfig && make DEVICE_TREE=foo_board_c In this case, the U-Boot image contains nothing about the DTB file name it is running with. (CONFIG_DEFAULT_DEVICE_TREE is not helpful for this purpose because it is painful to change it from "make menuconfig" for each board.) This commit allows to lookup the DTB file name based on the compatible string and set it to "fdt_file" environment. Then "tftpboot $fdt_file" will download the file we want. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: merge umc/ and ddrphy/ into a single directoryMasahiro Yamada2015-12-23-15/+11
| | | | | | | | | | | | | | | | | | | | | | | | The UMC (Universal Memory Controller) and the DDR PHY block are highly related to each other. It is better to have both code in the same directory. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: display model number all the time on boot upMasahiro Yamada2015-12-23-2/+1
| | | | | | | | | | | | | | | | | | | | | | | | Both "Model 1" and "Model 2" are supported for ProXstream2 and PH1-LD6b boards. It is useful to show the model number in the boot banner. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add macros and revision IDs for sLD11 and LD10Masahiro Yamada2015-12-23-1/+27
| | | | | | | | | | | | | | | | | | These are new SoCs from Socionext Inc. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: compile uniphier_get_board_param() for U-Boot properMasahiro Yamada2015-12-23-1/+1
| | | | | | | | | | | | | | | | | | | | | Compile this file for U-Boot proper as well as SPL, so that the U-Boot proper can call uniphier_get_board_param(). Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: split ProXstream2 board data and change DDR frequencyMasahiro Yamada2015-12-23-3/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The DDR3 memory chips on ProXstream2 boards support up to 2133 MHz, while only up to 1866MHz on PH1-LD6b boards. Split the board data structure and change the DDR frequency of ProXstream2 boards to 2133 MHz. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: call uniphier_get_board_param() without FDT blobMasahiro Yamada2015-12-23-6/+7
| | | | | | | | | | | | | | | | | | | | | Move "gd->fdt_blob" from the caller to the callee so that this function can be used more easily. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add functions to get SoC model/revisionMasahiro Yamada2015-12-23-0/+15
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We sometimes have to implement different code depending on the SoC revision. This commit adds functions to get the model/revision number. Note: Model number: incremented on major changes of the SoC Revision number: incremented on minor changes of the SoC The "Model 2" exists for PH1-sLD3, ProXstream2/PH1-LD6b. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: use stdout-path instead of consoleMasahiro Yamada2015-12-23-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | Sync device trees with Linux. Linux commit: 06ff6b2d63210922a1b1d0f4997e29ce75b5e0c0 Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: add outer cache nodesMasahiro Yamada2015-12-23-7/+84
| | | | | | | | | | | | | | | | | | | | | These nodes are not parsed by U-Boot for now, but syncing device trees with Linux is helpful for easier diffing. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: dts: uniphier: factor out common nodes to uniphier-common32.dtsiMasahiro Yamada2015-12-23-881/+616
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | UniPhier SoCs (except PH1-sLD3) have several nodes in common. Factor out them into uniphier-common32.dtsi. This improves the code maintainability. PH1-sLD3 is so old that it has more or less different register maps than the others. So, it cannot be included in this refactoring. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: allow DDR function to return more precise error codeMasahiro Yamada2015-12-23-2/+3
| | | | | | | | | | | | | | | | | | | | | Return different error code depending on the reason so that the caller can know the cause of the failure. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: use BIT() macro for DDR PHY headerMasahiro Yamada2015-12-23-45/+46
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: rename DTCR_RNKEN_* register bit to DTCR_RANKEN_*Masahiro Yamada2015-12-23-4/+4
| | | | | | | | | | | | | | | | | | | | | The bit 27-24 of the DTCR register is described as RANKEN in the DDR PHY databook. Follow this abbreviation. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add const qualifier to constant arrayMasahiro Yamada2015-12-23-1/+1
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | ARM: uniphier: add static qualifiers to locally used functionsMasahiro Yamada2015-12-23-6/+6
| | | | | | | | | | | | Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
* | | Merge git://git.denx.de/u-boot-arcTom Rini2015-12-21-0/+6
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| * | | axs103: add support of generic OHCI USB 1.1 controllerAlexey Brodkin2015-12-21-0/+6
| |/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit adds support of USB 1.1 storage media on AXS103 board. For some yet unknown reason USB 2.0 doesn't work on AXS103 board issuing messages like this: ------------------------>8------------------- AXS# usb start starting USB... USB0: USB EHCI 1.00 scanning bus 0 for devices... EHCI timed out on TD - token=0x80008c80 unable to get device descriptor (error=-1) 1 USB Device(s) found ------------------------>8------------------- As a work-around we're falling back to USB 1.1. Indeed it is much slower but at least USB storage devices are usable on AXS103. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com> Cc: Marek Vasut <marex@denx.de> Cc: Simon Glass <sjg@chromium.org>
* | | sunxi: Select DM_KEYBOARDHans de Goede2015-12-21-1/+2
| | | | | | | | | | | | | | | | | | | | | We need to select DM_KEYBOARD now that the usb-kbd code has been converted to this, otherwise usb keyboards do not work. Signed-off-by: Hans de Goede <hdegoede@redhat.com>
* | | sun5i: Add defconfig and dts file for the Empire Electronix D709 tabletHans de Goede2015-12-21-0/+242
|/ / | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Empire Electronix D709 tablet is a fairly standard 7" A13 tablet, featuring usb-wifi, a micro-sd slot, micro-usb otg and headphone jack. Empire Electronix is written on the back of the tablet, the D709 model info can be found in the about tablet menu in android. The PCB has no markings to speak of. This dts file is identical to the one submitted to the upstream kernel. Signed-off-by: Hans de Goede <hdegoede@redhat.com> Acked-by: Ian Campbell <ijc@hellion.org.uk>
* | Merge branch 'master' of git://www.denx.de/git/u-boot-socfpgaTom Rini2015-12-19-11/+119
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| * | arm: socfpga: fix up a questionable macro for SDMMCDinh Nguyen2015-12-20-3/+7
| | | | | | | | | | | | | | | | | | | | | | | | Move the macro into the socfpga_dwmci_clksel(). Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Signed-off-by: Marek Vasut <marex@denx.de> [fix parenthesis in the sdmmc_mask]
| * | arm: socfpga: remove building scan managerDinh Nguyen2015-12-20-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | The scan manager is not needed for the Arria10. Edit the makefile to build the scan manager for arria5 and cyclone5 only. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com> Acked-by: Marek Vasut <marex@denx.de>
| * | arm: socfpga: introduce TARGET_SOCFPGA_GEN5 config propertyDinh Nguyen2015-12-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | In order to re-use as much Cyclone5 and Arria5 code as possible to support the Arria10 platform, we need to wrap some of the code with #ifdef's. By adding CONFIG_TARGET_SOCFPGA_GEN5, we can shorten the check by not having to check for both AV || AV. Signed-off-by: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: Introduce common board codeMarek Vasut2015-12-20-1/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The SoCFPGA has reached a point where every single board code become the same, since each and every single board is probed equally from OF. Move the common board code into arch/arm/mach-socfpga/ . Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
| * | arm: socfpga: socrates: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: sockit: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: mcvevk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: de0_nano: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-0/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: cyclone5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-4/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: arria5-socdk: Probe DWC2 UDC from OF instead of hard-coded dataMarek Vasut2015-12-20-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds the necessary OF alias for the UDC node, which let's the code locate the DWC2 UDC base address in OF instead of hard-coding it into the U-Boot binary. The code is adjusted to use the address from OF instead of the hard-coded one. Finally, the hard-coded address is removed and USB DM support is enabled. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com> Cc: Lukasz Majewski <l.majewski@majess.pl> Cc: Lukasz Majewski <l.majewski@samsung.com>
| * | arm: socfpga: socrates: Add missing PHY skew configMarek Vasut2015-12-20-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | Add missing KSZ9021 PHY skew configuration for the EBV socrates board. Signed-off-by: Marek Vasut <marex@denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Chin Liang See <clsee@altera.com> Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
* | | nios2: display altera sysid at startupThomas Chou2015-12-19-0/+8
|/ / | | | | | | | | | | | | | | Display altera sysid at startup, which was once removed during the move. Signed-off-by: Thomas Chou <thomas@wytron.com.tw> Acked-by: Marek Vasut <marex@denx.de>
* | microblaze: Enable DM by defaultMichal Simek2015-12-18-0/+1
| | | | | | | | | | | | Enable DM for the whole architecture. Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | microblaze: Enable OF_CONTROL by defaultMichal Simek2015-12-18-0/+1
| | | | | | | | Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | arm: zynq: Update ZYBO config optionsNathan Rossi2015-12-18-0/+16
| | | | | | | | | | | | | | | | | | | | | | Update the ZYBO device tree and enable config options that relate to the added devices in the device tree. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Simon Glass <sjg@chromium.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
* | ARM: zynq: Add default ps7_init_gpl.c/h for ZYBONathan Rossi2015-12-18-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add ps7_init_gpl.c/h for the ZYBO board. This instance of the ps7_init is generated by the Vivado 2015.3 tools using the system configuration provided by Digilent located on their website. Update the kconfig so that the defconfig is not overrided to use the custom init ps7_init_gpl target by default. Signed-off-by: Nathan Rossi <nathan@nathanrossi.com> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: Michal Simek <monstr@monstr.eu> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: "Sören Brinkmann" <soren.brinkmann@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
generated by cgit v1.1 at 2024-12-23 00:38:21 +0000