summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* Merge branch 'u-boot/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-25-202/+1777
|\
| * sandbox: change local_irq_save() to macroMasahiro Yamada2014-06-23-6/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | local_irq_save() should be a macro, not a function because local_irq_save() saves flag to the given argument. GCC is silent about this issue, but Clang warns: In file included from lib/asm-offsets.c:15: In file included from include/common.h:20: In file included from include/linux/bitops.h:110: arch/sandbox/include/asm/bitops.h:59:17: warning: variable 'flags' is uninitialized when used here [-Wuninitialized] local_irq_save(flags); ^~~~~ That change causes another warning: In file included from include/linux/bitops.h:110:0, from include/common.h:20, from lib/asm-offsets.c:15: arch/sandbox/include/asm/bitops.h: In function ‘test_and_set_bit’: arch/sandbox/include/asm/bitops.h:56:16: warning: unused variable ‘flags’ [-Wunused-variable] So, flags should be set to __always_unused. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Simon Glass <sjg@chromium.org> Cc: Jeroen Hofstee <jeroen@myspectrum.nl> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Jeroen Hofstee <jeroen@myspectrum.nl>
| * sandbox: terminate os_dirent_ls() result listStephen Warren2014-06-23-0/+1
| | | | | | | | | | | | | | | | | | | | | | Each node in the linked-list that os_dirent_ls() returns has its next pointer set only when the next node is created. For the last node in the list, there is no next node, so this never happens, and the next pointer is never initialized. Explicitly initialize the next pointer so that it isn't dangling. Without this, "sb ls" might crash. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org>
| * x86: Enable 32-bit build using x86_64 multilib toolchainVasili Galka2014-06-23-3/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | Until now building the x86 arch boards required 32-bit toolchain. As many x86_64 toolchains come with 32-bit support (multilib) that's a good idea to enable build with such toolchains. The change required was to specify the usage of 32-bit explicitly to the compiler and the linker (-m32 and -m elf_i386 flags) and locate the right libgcc path. Signed-off-by: Vasili Galka <vvv444@gmail.com> Acked-by: Simon Glass <sjg@chromium.org>
| * tegra: dts: Bring in GPIO bindings from linuxSimon Glass2014-06-20-28/+48
| | | | | | | | | | | | | | These files are taken from Linux 3.14. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com>
| * Makefile: Support include files for .dts filesSimon Glass2014-06-20-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | Linux supports this, and if we are to have compatible device tree files, U-Boot should also. Avoid giving the device tree files access to U-Boot's include/ directory. Only include/dt-bindings is accessible. Signed-off-by: Simon Glass <sjg@chromium.org> Acked-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * sandbox: Support iotrace featureSimon Glass2014-06-20-0/+10
| | | | | | | | | | | | | | Support the iotrace feature for sandbox, and enable it, using some dummy I/O access methods. Signed-off-by: Simon Glass <sjg@chromium.org>
| * arm: Support iotrace featureSimon Glass2014-06-20-0/+3
| | | | | | | | | | | | Support the iotrace feature for ARM, when enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
| * m68k: Remove CONFIG_CMD_BEDBUG related codeVasili Galka2014-06-19-8/+0
| | | | | | | | | | | | | | | | This flag does not compile on m68k since 2003 (8bde7f7) when a required "cmd_bedbug.h" header was removed. Eleven years passed, lets clean up a little... Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * .gitignore: drop include/asm/proc from ignore patternMasahiro Yamada2014-06-19-1/+0
| | | | | | | | | | | | | | | | | | | | Commit 7d89982b stopped creating symbolic link arch/${arch}/include/asm/proc. arch/.gitignore should be updated. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Vasili Galka <vvv444@gmail.com>
| * fdt_support: delete force argument of fdt_initrd()Masahiro Yamada2014-06-19-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | After all, we have realized "force" argument is completely useless. fdt_initrd() was always called with force = 1. We should always want to do the same thing (set appropriate value to the property) even if the property already exists. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * m68k:correct io macros about endianChao Fu2014-06-19-4/+4
| | | | | | | | | | | | M68k is big endian cpu ,so use be_out and be_in in big endian. Signed-off-by: Chao Fu <b44548@freescale.com>
| * m68k: eliminate a warning in cpu_initMasahiro Yamada2014-06-19-1/+1
| | | | | | | | Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * Remove ${objtree}/include/asm/proc/ linkVasili Galka2014-06-11-5/+5
| | | | | | | | | | | | | | | | | | | | | | | | mkconfig links ${objtree}/include/asm/proc/ to ${srctree}/arch/${arch}/include/asm/proc-armv/. This seems to be a remnant from the past. Ever since its introduction in 2003 it is used only in ARM build and always links to same place, so let's simplify the code, remove it and reference directly where needed. Successful MAKEALL for ARM and PowerPC verified on Linux. Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * cosmetic: Whitespace fixVasili Galka2014-06-11-2/+2
| | | | | | | | Signed-off-by: Vasili Galka <vvv444@gmail.com>
| * m68k: Fix warnings with gcc 4.6Simon Glass2014-06-11-7/+4
| | | | | | | | | | | | | | | | Most of the warnings seem to be related to using 'int' for size_t. Change this and fix up the remaining warnings and problems. For bootm, the warning was masked by others, and there is an actual bug in the code. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Check run_command() return code properlyThomas Betker2014-06-11-1/+1
| | | | | | | | | | | | | | | | | | | | run_command() returns 0 for success, 1 for failure. Fix places which assume that failure is indicated by a negative return code. Signed-off-by: Thomas Betker <thomas.betker@rohde-schwarz.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Tested-by: Stefan Roese <sr@denx.de>
| * am33xx/omap: Enable CONFIG_OF_CONTROLSimon Glass2014-06-11-0/+1097
| | | | | | | | | | | | | | Add support for device tree control and add device tree files for the beaglebone black initially. Signed-off-by: Simon Glass <sjg@chromium.org>
| * am33xx/omap: Allow cache enable for all Sitara/OMAPSimon Glass2014-06-11-58/+60
| | | | | | | | | | | | | | | | | | Enable the cache for all devices, unless CONFIG_SYS_DCACHE_OFF is defined. This speeds up the Beaglebone Black boot considerable. (Tested only on Beaglebone Black with SD card boot) Signed-off-by: Simon Glass <sjg@chromium.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-06-08-80/+250
| |\
| * \ Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2014-06-05-6/+469
| |\ \
| | * | powerpc/mpc85xx: Add workaround to enable TDM on T1040Sandeep Singh2014-06-05-1/+64
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This is a workaround for 32 bit hardware limitation of TDM. T1040 has 36 bit physical addressing, TDM DMAC register are 32 bit wide but need to store address of CCSR space which lies beyond 32 bit address range. This workaround creats a LAW to enable access of TDM DMA to CCSR by mapping CCSR to overlap with DDR. A hole of 16M is created in memory using device tree. This workaround law is set only if "tdm" is defined in hwconfig. Also disable POST tests and add LIODN for TDM Signed-off-by: Sandeep Singh <Sandeep@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | powerpc/serdes: Add the workaround for erratum A-007186Shaveta Leekha2014-06-05-2/+188
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SerDes PLL is calibrated at reset. When the junction temperature delta from the time the PLL is calibrated exceeds +56C/-66C, jitter may increase and can cause PLL to unlock. This workaround overwrite the SerDes registers with new values, to calibrate SerDes registers. These values are known to work fine for all temperature ranges. This workaround is valid for B4, T4 and T2 platforms, so added in their config. Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Poonam Aggrwal <Poonam.Aggrwal@freescale.com> [York Sun: replaced typedef ccsr_sfp_regs_t with struct ccsr_sfp_regs] Reviewed-by: York Sun <yorksun@freescale.com>
| | * | powerpc/mpc85xx: Add workaround for DDR erratum A004508York Sun2014-06-05-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the DDR controller is initialized below a junction temperature of 0°C and then operated above a junction temperature of 65°C, the DDR controller may cause receive data errors, resulting ECC errors and/or corrupted data. This erratum applies to the following SoCs and their variants: MPC8536, MPC8569, MPC8572, P1010, P1020, P1021, P1022, P1023, P2020. Signed-off-by: York Sun <yorksun@freescale.com>
| | * | powerpc/t2080: add serdes2 protocol 0x27Shengzhou Liu2014-06-05-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new serdes2 protocol 0x27. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | powerpc/t4qds: Add alternate serdes protocols to align with A-007186Shaohui Xie2014-06-05-0/+172
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | A-007186: SerDes PLL is calibrated at reset. It is possible for jitter to increase and cause the PLL to unlock when the temperature delta from the time the PLL is calibrated exceeds +56C/-66C when using X VDD of 1.35 V (or +70C/-80C when using XnVDD of 1.5 V). No issues are seen with LC VCO. Only the protocols using Ring VCOs are impacted. Workaround: For all 1.25/2.5/5 GHz protocols, use LC VCO instead of Ring VCO, this need to use alternate serdes protocols. The alternate option has the same functionality as the original option; the only difference being LC VCO rather than Ring VCO. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| | * | board/t208x: update t2080qds/t2080rdb for errata A-007186Shengzhou Liu2014-06-05-3/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | As errata A-007186, we need to use the alternate serdes protocol instead of those impacted protocols. - add support for serdes protocols: 0x1b, 0x50, 0x5e, 0x64, 0x6a, 0xd2, 0x67, 0x70. - update t2080_rcw.cfg to adapt to new rcw_66_15 for t2080qds and t2080rdb. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Reviewed-by: York Sun <yorksun@freescale.com>
| * | | nand_spl: remove nand_spl infrastructureMasahiro Yamada2014-06-05-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove the common infrastructure of nand_spl and clean-up the code inside ifdef(CONFIG_NAND_U_BOOT)..endif. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | kbuild: move cmd_mkimage to scripts/Makefile.libMasahiro Yamada2014-06-05-4/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Because cmd_mkimage is used in various subdirectories, it seems reasonable to define it in scripts/Makefile.lib. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
| * | | openrisc: fix relocation codeFranck Jullien2014-06-05-14/+41
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The relocation code can now relocate from anywhere to the RAM. The old code assumed that the binary was copied to the RAM by some PBL and then it just relocated the .text section from the loaded address to the linked address. Now, it first checks if vectors are somewhere else than the linked address. If yes, there are copied to address 0 (or to the exception vector base address if register EVBAR is present). Then, the .text section is relocated from its current location to the RAM. Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
| * | | openrisc: update SPR registers definitionFranck Jullien2014-06-05-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OpenRISC architecture specification v1.0 defines new SPR registers. This patch adds registers definition for group 0 and update bit definitions for the CPU configuration register. Signed-off-by: Franck Jullien <franck.jullien@gmail.com>
| * | | arm: fdt_control: fix a build error with CONFIG_OF_EMBED=yMasahiro Yamada2014-06-05-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The build fails if a non-generic ARM board is compiled with CONFIG_OF_EMBED=y. The correct symbol name for embedded FDT is not __dtb_db_begin, but __dtb_dt_begin. (A typo introduced by commit 6ab6b2af) Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Acked-by: Simon Glass <sjg@chromium.org>
| * | | ARC: enable CONFIG_SYS_BOOT_RAMDISK_HIGHAlexey Brodkin2014-06-03-0/+1
| |/ / | | | | | | | | | | | | | | | | | | This enables relocation of initrd to the end of available DDR before Linux kernel start-up as it is done in other architectures. Signed-off-by: Alexey Brodkin <abrodkin@synopsys.com>
| * | powerpc: hiddendragon: remove orphan boardMasahiro Yamada2014-05-30-12/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has been orphan for a while. (Emails to its maintainer have been bouncing.) Because MPC82xx family is old enough, nobody would pick up the maintainership on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denx <wd@denx.de>
| * | powerpc: mpc8260ads: remove orphan boardMasahiro Yamada2014-05-30-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This board has been orphan for a while. (Emails to its maintainer have been bouncing.) Because MPC82xx family is old enough, nobody would pick up the maintainership on it. Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Wolfgang Denx <wd@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2014-05-30-5/+2331
| |\ \
| * | | m68k: powerpc: Clean up do_mdm_initSimon Glass2014-05-29-15/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This code seems unnecessarily complex. We really just need to check the global_data. Now that is it all in one place, and not arch-specific, this is pretty easy. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | Remove unnecessary use of hush header fileSimon Glass2014-05-29-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Some files include hush.h but don't actually use it. Remove this where possible. Signed-off-by: Simon Glass <sjg@chromium.org>
| * | | dm: rename device struct to udeviceHeiko Schocher2014-05-27-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | using UBI and DM together leads in compiler error, as both define a "struct device", so rename "struct device" in include/dm/device.h to "struct udevice", as we use linux code (MTD/UBI/UBIFS some USB code,...) and cannot change the linux "struct device" Signed-off-by: Heiko Schocher <hs@denx.de> Cc: Simon Glass <sjg@chromium.org> Cc: Marek Vasut <marex@denx.de>
* | | | ARMv7: at91: enable ICache and DCache.Wu, Josh2014-06-14-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For at91 armv7 SoC (SAMA5D3x), only LCD and macb used DMA. Now as the lcd and macb driver already support dcache. So we can enable dcache now. Also we can enable icache without any problem. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com>
* | | | avr32: migrate cache functionsAndreas Bießmann2014-06-14-16/+16
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Unfortunately the avr32 cache implementation has another API than the one described in common.h. Migrate the flush/invalidate dcache functions to the common API to be usable in device drivers. Signed-off-by: Andreas Bießmann <andreas.devel@googlemail.com> CC: Josh Wu <josh.wu@atmel.com>
* | | | arm: fix a double-definition error of _start symbolMasahiro Yamada2014-06-09-2/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The symbol "_start" is defined twice in arch/arm/lib/vectors.S: around line 48 and line 54. If CONFIG_SYS_DV_NOR_BOOT_CFG is defined (as on calimain board), build fails: arch/arm/lib/vectors.S: Assembler messages: arch/arm/lib/vectors.S:54: Error: symbol `_start' is already defined make[1]: *** [arch/arm/lib/vectors.o] Error 1 make: *** [arch/arm/lib] Error 2 Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com> Cc: Albert ARIBAUD <albert.u.boot@aribaud.net>
* | | | arm64: zero cntvoff_el2Mark Rutland2014-06-09-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently cntvoff_el2 is initialised with an arbitrary bag of bits derived from the initial value of cnthctl_el2 on the current CPU. This is somewhat odd and problematic as some of these bits are UNKNOWN at reset and may differ across CPUs (which may cause an OS at EL1 to observe time going backwards across CPUs). This patch instead initialises cntvoff_el2 with xzr, giving the register a consistent value of zero on all CPUs. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Acked-by: Marc Zyngier <marc.zyngier@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Cc: Scott Wood <scottwood@freescale.com> Cc: David Feng <fenghua@phytium.com.cn> Cc: Tom Rini <trini@ti.com> Acked-by: David.Feng <fenghua@phytium.com.cn>
* | | | arm: vf610: Add QSPI support for VF610TWRChao Fu2014-06-09-3/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add QSPI support for VF610TWR, such as clock and iomux. Signed-off-by: Alison Wang <Huan.Wang@freescale.com> Signed-off-by: Chao Fu <b44548@freescale.com>
* | | | arm: imx: Add two macros for VF610 in IOMUX_PAD structureAlison Wang2014-06-09-0/+2
| |_|/ |/| | | | | | | | | | | | | | | | | Add PAD_CTL_DSE_150ohm and PAD_CTL_PUS_22K_UP for VF610 in IOMUX_PAD structure. Signed-off-by: Alison Wang <Huan.Wang@freescale.com>
* | | Merge branch 'u-boot-ti/master' into 'u-boot-arm/master'Albert ARIBAUD2014-06-08-31/+83
|\ \ \
| * | | arm:am33xx: Add a scale_vcores() hookTom Rini2014-06-06-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Similar to OMAP4/5 we need to scale the voltage up prior to changing the clock frequencies up higher. Add a similar hook to start with. Signed-off-by: Tom Rini <trini@ti.com>
| * | | arch-am33xx: Add defines for timer0-7Hannes Petermaier2014-06-06-6/+29
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For usage of timer6 within B&R we need this defines to enable clock modules and clk-source. Also the 'Timer register bits' are expanded. By the way we add defines for all timers within AM335x SoC. Cc: trini@ti.com Signed-off-by: Hannes Petermaier <oe5hpm@oevsv.at>
| * | | ARM: AM43xx: Fix UART clocks enablingLokesh Vutla2014-06-06-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | After enabling a module, SW has to wait on IDLEST bit until it is Fully functional. This wait is missing for UART module and there is a immediate access of UART registers after this. So there is a chance of hang on this module( This can happen when we are running from MPU SRAM). So waiting for IDLEST bit. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
| * | | keystone: init: enable UART1 to be able use it from kernelMurali Karicheri2014-06-06-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently PWREMU_MGMT is not configured in the Linux generic UART driver as this register seems to be specific TI UART IP. So this needs to be enabled in u-boot to use UART1 from kernel space. Acked-By: Vitaly Andrianov <vitalya@ti.com> Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Ivan Khoronzhuk <ivan.khoronzhuk@ti.com>
generated by cgit v1.1 at 2024-12-26 10:53:56 +0000