summaryrefslogtreecommitdiff
path: root/arch
Commit message (Collapse)AuthorAgeLines
* ppc: Move mirror_hack to arch_global_dataSimon Glass2013-02-04-3/+3
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move uart_clk to arch_global_dataSimon Glass2013-02-04-7/+7
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move dp_alloc_base, dp_alloc_top to arch_global_dataSimon Glass2013-02-04-32/+34
| | | | | | Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move arbiter fields to arch_global_dataSimon Glass2013-02-04-17/+19
| | | | | | | Move arbiter_event_attributes and arbiter_event_address into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move reset_status to arch_global_dataSimon Glass2013-02-04-7/+7
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move mpc8220 clocks to arch_global_dataSimon Glass2013-02-04-19/+20
| | | | | | | Move these fields into arch_global_data and tidy up. The bExtUart field does not appear to be used, so punt it. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move mpc512x clocks to arch_global_dataSimon Glass2013-02-04-15/+18
| | | | | | Move ips_clk and csb_clk into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move mpc5xxx clocks to arch_global_dataSimon Glass2013-02-04-17/+25
| | | | | | Move ipb_clk and pci_clk into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move used_tlb_cams to arch_global_dataSimon Glass2013-02-04-7/+7
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move used_laws to arch_global_dataSimon Glass2013-02-04-11/+11
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move CONFIG_QE to arch_global_dataSimon Glass2013-02-04-12/+11
| | | | | | Move the quantative easing fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: m68k: Move i2c1_clk, i2c2_clk to arch_global_dataSimon Glass2013-02-04-28/+31
| | | | | | | Move these fields into arch_global_data and tidy up. This is needed for both ppc and m68k since they share the i2c driver. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move lbc_clk and cpu to arch_global_dataSimon Glass2013-02-04-19/+20
| | | | | | | | Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Update for bsc9132qds.c, b4860qds.c] Signed-off-by: Tom Rini <trini@ti.com>
* ppc: Move mpc83xx clock fields to arch_global_dataSimon Glass2013-02-01-76/+86
| | | | | | | Move al mpc83xx fields into arch_global_data and tidy up. Also indent the nested #ifdef for clarity. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move clock fields to arch_global_dataSimon Glass2013-02-01-15/+19
| | | | | | | | Move vco_out, cpm_clk, scc_clk, brg_clk into arch_global_data and tidy up. Leave pci_clk on its own since this should really depend only on CONFIG_PCI and not any particular chip type. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Remove extra pci_clk fields from global_dataSimon Glass2013-02-01-7/+2
| | | | | | | | | | | PPC has several of these fields, selected by chip type, although only one is ever compiled in. Instead, use a single field. It would be nice if this could be selected by CONFIG_PCI, but some chips (e.g. mpc5xxx) use pci_clk even when CONFIG_PCI is not enabled. Signed-off-by: Simon Glass <sjg@chromium.org>
* ppc: Move brg_clk to arch_global_dataSimon Glass2013-02-01-17/+22
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Remove reset_status, relocoff from global_dataSimon Glass2013-02-01-2/+0
| | | | | | These fields are not used on x86, so punt them. Signed-off-by: Simon Glass <sjg@chromium.org>
* x86: Move gd_addr into arch_global_dataSimon Glass2013-02-01-4/+3
| | | | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Add arch/x86/cpu/cpu.c changes after Graeme's comments] Signed-off-by: Tom Rini <trini@ti.com>
* x86: Set up the global data pointer in C instead of asmSimon Glass2013-02-01-7/+3
| | | | | | | | | | | | | | | | We currently assume that the global data pointer is at the start of struct global_data. We want to remove this restriction, and it is easiest to do this in C. Remove the asm code and add equivalent code in C. This idea was proposed by Graeme Russ here: http://patchwork.ozlabs.org/patch/199741/ Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Apply Graeme Russ' comments http://patchwork.ozlabs.org/patch/206305/ here, re-order] Signed-off-by: Tom Rini <trini@ti.com>
* x86: Remove gdt_addr from arch_global_dataSimon Glass2013-02-01-1/+0
| | | | | | Remove this unused field. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move tlb_addr and tlb_size to arch_global_dataSimon Glass2013-02-01-11/+11
| | | | | | | | Move these fields into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org> [trini: Address tlb_size in this patch as well] Signed-off-by: Tom Rini <trini@ti.com>
* nds32: Drop tlb_addr from global dataSimon Glass2013-02-01-14/+0
| | | | | | This field doesn't appear to be used for anything important, so drop it. Signed-off-by: Simon Glass <sjg@chromium.org>
* ixp: Move timestamp to arch_global_dataSimon Glass2013-02-01-7/+7
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move timer_reset_value to arch_global_dataSimon Glass2013-02-01-6/+3
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move lastinc to arch_global_dataSimon Glass2013-02-01-72/+74
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move tbl to arch_global_dataSimon Glass2013-02-01-89/+95
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move tbu to arch_global_dataSimon Glass2013-02-01-29/+29
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: Move timer_rate_hz into arch_global_dataSimon Glass2013-02-01-15/+17
| | | | | | Move this field into arch_global_data and tidy up. Signed-off-by: Simon Glass <sjg@chromium.org>
* at91: Move at91 global data into arch_global_dataSimon Glass2013-02-01-41/+45
| | | | | | Move these fields into arch_global_data. Signed-off-by: Simon Glass <sjg@chromium.org>
* Add architecture-specific global dataSimon Glass2013-02-01-2/+79
| | | | | | | | | | | | | We plan to move architecture-specific data into a separate structure so that we can make the rest of it common. As a first step, create struct arch_global_data to hold these fields. Initially it is empty. This patch applies to all archs at once. I can split it if this is really a pain. Signed-off-by: Simon Glass <sjg@chromium.org>
* arm: fix CONFIG_DELAY_ENVIRONMENT to act like it claims in the READMELucas Stach2013-01-30-1/+1
| | | | | | | | | No one expects to end up in a delayed environment if CONFIG_DELAY_ENVIRONMENT isn't defined. Signed-off-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com>
* Merge branch 'master' of git://git.denx.de/u-boot-mipsTom Rini2013-01-30-74/+130
|\
| * MIPS: add unified u-boot.lds fileGabor Juhos2013-01-31-0/+84
| | | | | | | | | | | | | | | | | | | | | | | | The patch adds an unified linker script file which can be used for all currently supported MIPS targets. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Xiangfu Liu <xiangfu@openmobilefree.net> Acked-by: Stefan Roese <sr@denx.de>
| * MIPS: remove OUTPUT_FORMAT from linker scriptsGabor Juhos2013-01-30-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The OUTPUT_FORMAT command in linker scripts was always misused due to some endianess and toolchain problems. Use GCC flags to ensure proper output format, and get rid of the OUTPUT_FORMAT commands in the board specific u-boot.lds files. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Stefan Roese <sr@denx.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
| * MIPS: xburst: simplify relocation offset calculationGabor Juhos2013-01-30-9/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses four instructions and a temporary register to calculate the relocation offset and to adjust the gp register. The relocation offset can be calculated directly from the CONFIG_SYS_MONITOR_BASE constant and from the destination address. The resulting offset can be used to adjust the gp pointer. This approach makes the code a bit simpler because it needs two instructions only. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
| * MIPS: simplify relocated _G_O_T_ address calculationGabor Juhos2013-01-30-12/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The difference between the address of the original and the relocated _GLOBAL_OFFSET_TABLE_ is always the same as the relocation offset. The relocation offset is already computed and it is available in the 's1/t6' register. Use that to adjust the relocated _G_O_T_ address, instead of calculating the offset again from the _gp value. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Xiangfu Liu <xiangfu@openmobilefree.net>
| * MIPS: start.S: don't save flush_cache parameters in advanceGabor Juhos2013-01-27-20/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Saving the parameters in advance unnecessarily complicates the code. The destination address is already saved in the 's2' register, and that register is not clobbered by the copy loop. The size of the copied data can be computed after the copy loop is done. Change the code to compute the size parameter right before calling flush_cache, and set the destination address parameter in the delay slot of the actuall call. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start.S: simplify relocation offset calculationGabor Juhos2013-01-27-18/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses four instructions and a temporary register to calculate the relocation offset and to adjust the gp register. The relocation offset can be calculated directly from the CONFIG_SYS_MONITOR_BASE constant and from the destination address. The resulting offset can be used to adjust the gp pointer. This approach makes the code a bit simpler because it needs two instructions only. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start.S: save reused arguments earlier in relocate_codeGabor Juhos2013-01-27-4/+6
| | | | | | | | | | | | | | | | | | Save the reused parameters at the beginning of the 'relocate_code' function. This makes the function a bit more readable. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start.S: set sp register directlyGabor Juhos2013-01-27-4/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current code uses two instructions to load the stack pointer into the 'sp' register. This results in the following assembly code: 468: 3c088040 lui t0,0x8040 46c: 251d0000 addiu sp,t0,0 The first instuction loads the stack pointer into the 't0' register then the value of the 'sp' register is computed by adding zero to the value of the 't0' register. The same issue present on the 64-bit version as well: 56c: 3c0c8040 lui t0,0x8040 570: 659d0000 daddiu sp,t0,0 Change the code to load the stack pointer directly into the 'sp' register. The generated code is functionally equivalent to the previous version but it is simpler. 32-bit: 468: 3c1d8040 lui sp,0x8040 64-bit: 56c: 3c1d8040 lui sp,0x8040 Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start.S: fix boundary check in relocate_codeGabor Juhos2013-01-27-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | The loop code copies more data with one than necessary due to the 'ble' instuction. Use the 'blt' instruction instead to fix that. Due to the lack of suitable hardware the Xburst specific code is compile tested only. However the change is quite obvious. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: start{, 64}.S: fill branch delay slots with NOP instructionsGabor Juhos2013-01-22-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The romReserved and romExcHandle handlers are accessed by a branch instruction however the delay slots of those instructions are not filled. Because the start.S uses the 'noreorder' directive, the assembler will not fill the delay slots either, and leads to the following assembly code: 0000056c <romReserved>: 56c: 1000ffff b 56c <romReserved> 00000570 <romExcHandle>: 570: 1000ffff b 570 <romExcHandle> In the resulting code, the second branch instruction is placed into the delay slot of the first branch instruction, which is not allowed on the MIPS architecture. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: convert IO port accessor functions to 'static inline'Gabor Juhos2013-01-22-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The currently used 'extern inline' directive causes the following compiler warnings if CONFIG_SWAP_IO_SPACE is defined: <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl_p' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outlc' which is not static [enabled by default] <...>/include/asm/io.h:345:1: warning: '__fswab32' is static but used in inline function '__outl' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw_p' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outwc' which is not static [enabled by default] <...>/include/asm/io.h:344:1: warning: '__fswab16' is static but used in inline function '__outw' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl_p' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inlc' which is not static [enabled by default] <...>/include/asm/io.h:341:1: warning: '__fswab32' is static but used in inline function '__inl' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw_p' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inwc' which is not static [enabled by default] <...>/include/asm/io.h:340:1: warning: '__fswab16' is static but used in inline function '__inw' which is not static [enabled by default] Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
| * MIPS: use inline directive for __in*s functionsGabor Juhos2013-01-22-1/+1
| | | | | | | | | | | | | | | | | | All other IO accessor functions are using the 'inline' directive. Use that also for the __in*s to make it consistent with the other variants. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com>
* | powerpc/t4240: Adding workaround errata A-005871Shengzhou Liu2013-01-30-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When CoreNet Fabric (CCF) internal resources are consumed by the cores, inbound SRIO messaging traffic through RMan can put the device into a deadlock condition. This errata workaround forces internal resources to be reserved for upstream transactions. This ensures resources exist on the device for upstream transactions and removes the deadlock condition. The Workaround is for the T4240 silicon rev 1.0. Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc85xx: Add property 'fsl, sec-era' in device tree node 'crypto'Vakul Garg2013-01-30-1/+92
| | | | | | | | | | | | | | | | | | | | If property 'fsl,sec-era' is already present, it is updated. This property is required so that applications can ascertain which descriptor commands are supported on a particular CAAM version. Signed-off-by: Vakul Garg <vakul@freescale.com> Cc: Andy Fleming <afleming@gmail.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | mpc8xxx: fix DDR init value to use CONFIG_MEM_INIT_VALUEAnatolij Gustschin2013-01-30-0/+4
| | | | | | | | | | | | | | | | | | | | | | Configuring custom memory init value using CONFIG_MEM_INIT_VALUE in the board config file doesn't work and memory is always initialized to the value 0xdeadbeef. Only use this default value if a board doesn't define CONFIG_MEM_INIT_VALUE. Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Andy Fleming <afleming@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc85xx: add support for MMUv2 page sizesScott Wood2013-01-30-24/+49
| | | | | | | | | | | | | | | | e6500 implements MMUv2 and supports power-of-2 page sizes rather than power-of-4. Add support for such pages. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* | powerpc/mpc85xx: Add BSC9132/BSC9232 processor supportPrabhakar Kushwaha2013-01-30-2/+140
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The BSC9132 is a highly integrated device that targets the evolving Microcell, Picocell, and Enterprise-Femto base station market subsegments. The BSC9132 device combines Power Architecture e500 and DSP StarCore SC3850 core technologies with MAPLE-B2P baseband acceleration processing elements to address the need for a high performance, low cost, integrated solution that handles all required processing layers without the need for an external device except for an RF transceiver or, in a Micro base station configuration, a host device that handles the L3/L4 and handover between sectors. The BSC9132 SoC includes the following function and features: - Power Architecture subsystem including two e500 processors with 512-Kbyte shared L2 cache - Two StarCore SC3850 DSP subsystems, each with a 512-Kbyte private L2 cache - 32 Kbyte of shared M3 memory - The Multi Accelerator Platform Engine for Pico BaseStation Baseband Processing (MAPLE-B2P) - Two DDR3/3L memory interfaces with 32-bit data width (40 bits including ECC), up to 1333 MHz data rate - Dedicated security engine featuring trusted boot - Two DMA controllers - OCNDMA with four bidirectional channels - SysDMA with sixteen bidirectional channels - Interfaces - Four-lane SerDes PHY - PCI Express controller complies with the PEX Specification-Rev 2.0 - Two Common Public Radio Interface (CPRI) controller lanes - High-speed USB 2.0 host and device controller with ULPI interface - Enhanced secure digital (SD/MMC) host controller (eSDHC) - Antenna interface controller (AIC), supporting four industry standard JESD207/four custom ADI RF interfaces - ADI lanes support both full duplex FDD support & half duplex TDD - Universal Subscriber Identity Module (USIM) interface that facilitates communication to SIM cards or Eurochip pre-paid phone cards - Two DUART, two eSPI, and two I2C controllers - Integrated Flash memory controller (IFC) - GPIO - Sixteen 32-bit timers Signed-off-by: Naveen Burmi <NaveenBurmi@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-25 17:00:46 +0000