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* EXYNOS: mmc: support DesignWare Controller for Samsung-SoCJaehoon Chung2012-11-27-0/+36
| | | | | | | | | Support DesignWare MMC Controller for Samsung Specific. Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Rajeshawari Shinde <rajeshwari.s@samsung.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
* Merge branch 'master' of git://git.denx.de/u-boot-nand-flashTom Rini2012-11-26-82/+573
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| * spl/85xx: new SPL supportScott Wood2012-11-26-9/+98
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Update CONFIG_RAMBOOT and CONFIG_NAND_SPL references to accept CONFIG_SPL and CONFIG_SPL_BUILD, respectively. CONFIG_NAND_SPL can be removed once the last mpc85xx nand_spl target is gone. CONFIG_RAMBOOT will need to remain for other use cases, but it doesn't seem right to overload it for meaning SPL as well as nand_spl does. Even if it's somewhat appropriate for the main u-boot, the SPL itself isn't (necessarily) ramboot, and we don't have separate configs for SPL and main u-boot. It was also inconsistent, as other platforms such as mpc83xx didn't use CONFIG_RAMBOOT in this way. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * spl/powerpc: introduce CONFIG_SPL_INIT_MINIMALScott Wood2012-11-26-15/+70
| | | | | | | | | | | | | | | | | | cpu_init_nand.c is renamed to spl_minimal.c as it is not really NAND-specific. Signed-off-by: Scott Wood <scottwood@freescale.com> --- v2: factor out START, and change cpu_init_nand.c to spl_minimal.c Cc: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: consistently use COBJS-yScott Wood2012-11-26-9/+10
| | | | | | | | | | | | | | | | A subsequent patch will conditionalize some of the files that are currently unconditional. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * spl/mpc85xx: rename cpu_init_nand.c to spl_minimal.cScott Wood2012-11-26-0/+0
| | | | | | | | | | | | | | There is nothing really NAND-specific about this file. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * spl/mpc85xx: move udelay to cpu codeScott Wood2012-11-26-0/+17
| | | | | | | | | | | | | | | | | | It applies to non-Freescale 85xx boards as well as Freescale boards, so it doesn't belong in board/freescale. Plus, it needs to come out of nand_spl if it's to be used by the new SPL. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxxScott Wood2012-11-26-0/+334
| | | | | | | | | | | | | | | | | | | | | | It's arch code and not a driver, so move it where it belongs. When it originally went into drivers/misc there was no 8xxx CPU directory. This will make new-SPL support a little easier since we can keep the CPU stuff together and not need to pull stuff in from drivers/misc. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * powerpc/mpc85xx: fix TLB alignmentScott Wood2012-11-26-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In the RAMBOOT/SPL case we were creating a TLB entry starting at CONFIG_SYS_MONITOR_BASE, and just hoping that the base was properly aligned for the TLB entry size. This turned out to not be the case with NAND SPL because the main U-Boot starts at an offset into the image in order to skip the SPL itself. Fix the TLB entry to always start at a proper alignment. We still assume that CONFIG_SYS_MONITOR_BASE doesn't start immediately before a large-page boundary thus requiring multiple TLB entries. Signed-off-by: Scott Wood <scottwood@frescale.com> Cc: Andy Fleming <afleming@freescale.com>
| * powerpc: change .fixup test to a GCC version testScott Wood2012-11-26-6/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This was introduced by commit 244615197469dd6fe75ae082f38424b97c79aeaf, but it fails in a minimal SPL build where the only thing in arch/powerpc/lib is cache.c, which apparently doesn't generate any fixup records. The problem is reported to occur with GCC 3.x, so insist on GCC 4.0 or newer. Patterned after checkthumb as suggested by Tom Rini. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Peter Tyser <ptyser@xes-inc.com> Cc: Tom Rini <trini@ti.com> -- v2: test gcc version instead of testing nothing
| * powerpc/mpc85xx: add comma before "already enabled"Scott Wood2012-11-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Now outputs like this: L2: 512 KB already enabled, moving to 0xf8f80000 rather than this: L2: 512 KB already enabledmoving to 0xf8f80000 Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Andy Fleming <afleming@gmail.com>
| * powerpc/mpc85xx: move debug tlb entry after TLB is in known stateScott Wood2012-11-26-44/+40
| | | | | | | | | | | | | | | | | | | | | | | | Previously, in many if not all configs we were creating overlapping TLB entries which is illegal. This caused a crash during boot when moving p2020rdb NAND SPL into L2 SRAM. Signed-off-by: Scott Wood <scottwood@freescale.com> Cc: Prabhakar Kushwaha <prabhakar@freescale.com> Cc: Andy Fleming <afleming@freescale.com> -- Prabhakar, please test that debug still works.
* | musb-new: omap2plus backend driverIlya Yanok2012-11-20-0/+4
| | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI OMAP2/3/4 (tested only on OMAP3 Beagle). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | OMAP3: am35x: add musb functionsIlya Yanok2012-11-20-0/+104
| | | | | | | | | | | | AM35XX specific functions for integrated USB PHY/MUSB IP. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | OMAP3: am35x_def.h: add USB definesIlya Yanok2012-11-20-0/+27
| | | | | | | | | | | | Add defines for MUSB IP block on AM35X SoCs. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | musb-new: am35x backend driverIlya Yanok2012-11-20-0/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM35x. It seems that on AM35X interrupt status registers can be updated _before_ core registers. As we don't use true interrupts in U-Boot and poll interrupt status registers instead this can result in interrupt handler being called with non-updated core registers. This confuses the code and result in hanged transfers. Add a small delay in am35x_interrupt as a workaround. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | am33xx: init OTG hardware and new musb gadget driverIlya Yanok2012-11-20-3/+105
| | | | | | | | | | | | | | | | AM33xx has support for dual port MUSB OTG controller. This patch adds initialization for the controller using new MUSB gadget driver and ether gadget. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | musb-new: dsps backend driverIlya Yanok2012-11-20-0/+25
| | | | | | | | | | | | | | Backend driver for MUSB OTG controllers found on TI AM33xx and TI81xx SoCs (tested with AM33xx only). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* | usb: use linux/usb/ch9.h instead of usbdescriptors.hIlya Yanok2012-11-20-3/+3
|/ | | | | | | | | | | | | | | | | | | | | | Linux usb/ch9.h seems to have all the same information (and more) as usbdescriptors.h so use the former instead of the later one. As a consequense of this change USB_SPEED_* values don't correspond directly to EHCI speed encoding anymore, I've added necessary recoding in EHCI driver. Also there is no point to put speed into pipe anymore so it's removed and a bunch of host drivers fixed to look at usb_device->speed instead. Old usbdescriptors.h included is not removed as it seems to be used by old USB device code. This makes usb.h and usbdevice.h incompatible. Fortunately the only place that tries to include both are the old MUSB code and it needs usb.h only for USB_DMA_MINALIGN used in aligned attribute on musb_regs structure but this attribute seems to be unneeded (old MUSB code doesn't support any DMA at all). Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com>
* Merge branch 'master' of git://git.denx.de/u-boot-videoTom Rini2012-11-19-0/+21
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| * mx51evk: Fix build error when CONFIG_VIDEO is disabledVikram Narayanan2012-11-14-0/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The inclusion of LCD patch into mx51evk breaks the build when CONFIG_VIDEO is disabled. Fix this by splitting the video related stuff to a new file. Also rename the function lcd_iomux to setup_iomux_lcd to make the namings aligned with the other iomux functions. Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Signed-off-by: Anatolij Gustschin <agust@denx.de> Cc: Fabio Estevam <fabio.estevam@freescale.com> Cc: Stefano Babic <sbabic@denx.de>
* | Merge branch 'agust@denx.de' of git://git.denx.de/u-boot-stagingTom Rini2012-11-19-0/+8
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| * | pmic: Introduce power_init_board() method at ./lib/board.c fileŁukasz Majewski2012-11-14-0/+8
| |/ | | | | | | | | | | | | | | | | | | | | | | | | | | It is necessary to introduce a new system wide function- power_init_board() It turns out, that power initialization must be done as early as possible. In the case of PMIC framework redesign, which aims to support multiple instances of PMIC devices the initialization shall be performed just after malloc configuration. The power_init_board function is a weak function with default implementation. Signed-off-by: Lukasz Majewski <l.majewski@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com>
* | nios2: remove asm/status_led.hThomas Chou2012-11-10-31/+0
| | | | | | | | | | | | | | | | | | The file has a wrong inline keyword of __led_toggle(), which causes compilation error. And its content is defined in common status_led.h. So define CONFIG_BOARD_SPECIFIC_LED in board config files and remove this header file. Signed-off-by: Thomas Chou <thomas@wytron.com.tw>
* | microblaze: Fix compilation failure because of missing libdtsMichal Simek2012-11-08-0/+2
| | | | | | | | | | | | | | | | | | | | Microblaze platform can use CONFIG_OF_EMBED option but also it is necessary to support boards which don't want to use this option. U-Boot doesn't compile dts/libdts.o for #undef CONFIG_OF_EMBED case that's why it should be guarded by ifdef. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | microblaze: Remove asm/bitops.h from asm/posix_types.hMichal Simek2012-11-07-3/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The patch "include/linux/byteorder: import latest endian definitions from linux" (sha1: eef1cf2d5cf1cae5fb76713e912263dedf110aeb) Introduced a lot of compilation failures with unknow types. include/linux/byteorder/big_endian.h:45:1: error: unknown type name '__le64' include/linux/byteorder/big_endian.h: In function '__cpu_to_le64p': include/linux/byteorder/big_endian.h:47:18: error: '__le64' undeclared (first use in this function) include/linux/byteorder/big_endian.h:47:18: note: each undeclared identifier is reported only once for each function it appears in include/linux/byteorder/big_endian.h:47:25: error: expected ';' before '__swab64p' include/linux/byteorder/big_endian.h: At top level: include/linux/byteorder/big_endian.h:49:1: error: unknown type name '__le64' include/linux/byteorder/big_endian.h:53:1: error: unknown type name '__le32' include/linux/byteorder/big_endian.h: In function '__cpu_to_le32p': include/linux/byteorder/big_endian.h:55:18: error: '__le32' undeclared (first use in this function) include/linux/byteorder/big_endian.h:55:25: error: expected ';' before '__swab32p' include/linux/byteorder/big_endian.h: At top level: include/linux/byteorder/big_endian.h:57:1: error: unknown type name '__le32' include/linux/byteorder/big_endian.h:61:1: error: unknown type name '__le16' ... Removing asm/bitops.h solved this problem. Signed-off-by: Michal Simek <monstr@monstr.eu>
* | microblaze: Flush caches before enabling themMichal Simek2012-11-07-10/+6
| | | | | | | | | | | | | | | | Flushing caches is necessary because of soft reset which doesn't clear caches. Signed-off-by: Michal Simek <monstr@monstr.eu> Reviewed-by: Marek Vasut <marex@denx.de>
* | microblaze: Fix byteorder for microblazeMichal Simek2012-11-07-23/+0
| | | | | | | | | | | | | | | | Just remove ancient code. Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net> Reviewed-by: Marek Vasut <marex@denx.de>
* | microblaze: Fix compilation warning in ext2_find_next_zero_bitMichal Simek2012-11-07-1/+2
|/ | | | | | | | | | | | ext2_find_next_zero_bit must be also static if __swab32 is also static. Warning: include/asm/bitops.h:369:22: warning: '__fswab32' is static but used in inline function 'ext2_find_next_zero_bit' which is not static [enabled by default] Signed-off-by: Michal Simek <monstr@monstr.eu> Acked-by: Stephan Linz <linz@li-pro.net>
* Merge branch 'master' of git://git.denx.de/u-boot-armTom Rini2012-11-05-272/+1435
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| * socfpga/spl: Remove malloc.hVikram Narayanan2012-11-04-1/+0
| | | | | | | | | | | | Remove unused header Signed-off-by: Vikram Narayanan <vikram186@gmail.com>
| * socfpga/spl: Remove timer_init from spl_board_initVikram Narayanan2012-11-04-3/+0
| | | | | | | | | | | | | | | | Timer is initialized already in board_init_r function in (common/spl/spl.c) No need to initialize it again Signed-off-by: Vikram Narayanan <vikram186@gmail.com> Cc: Dinh Nguyen <dinguyen@altera.com>
| * Merge remote-tracking branch 'u-boot-ti/master'Albert ARIBAUD2012-11-03-13/+59
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| | * omap3: Rework board.c for !CONFIG_SYS_L2CACHE_OFFTom Rini2012-10-30-13/+15
| | | | | | | | | | | | | | | | | | | | | When CONFIG_SYS_L2CACHE_OFF is defined we end up with a few warnings currently. Re-order functions so that we don't have that anymore. Signed-off-by: Tom Rini <trini@ti.com>
| | * arm bootm: Allow to pass board specified atagsPali Rohár2012-10-30-0/+9
| | | | | | | | | | | | | | | | | | Board can implement function setup_board_tags which is used for adding atags Signed-off-by: Pali Rohár <pali.rohar@gmail.com>
| | * am33xx: Enable UART{1,2,3,4,5} clocksAndrew Bradford2012-10-25-0/+35
| | | | | | | | | | | | | | | | | | | | | | | | If configured to use UART{1,2,3,4,5} such as on the Beaglebone RS232 cape or the am335x_evm daughterboard, enable the required clocks for the UART in use. Signed-off-by: Andrew Bradford <andrew@bradfordembedded.com>
| * | arm720t: add back common.h includeAllen Martin2012-10-29-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add back common.h header that was removed in previous patch so that CONFIG_TEGRA can be evaluated correctly. Signed-off-by: Allen Martin <amartin@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra20: initialize variable to avoid compiler warningAllen Martin2012-10-29-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Initialize this variable to avoid a compiler warning about possible use of uninitialized variable with gcc 4.4.6. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | tegra: move to common SPL frameworkAllen Martin2012-10-29-77/+42
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Change tegra SPL to use common SPL framework. Any tegra specific initialization is now done in spl_board_init() instead of board_init_f()/board_init_r(). Only one SPL boot target is supported on tegra, which is boot to RAM image. jump_to_image_no_args() must be overridden on tegra so the host CPU can be initialized. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@nvidia.com> Tested-by: Stephen Warren <swarren@nvidia.com> Tested-by: Lucas Stach <dev@lynxeye.de> Acked-by: Simon Glass <sjg@chromium.org> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | ARM: enhance u-boot.lds to detect over-sized SPLStephen Warren2012-10-29-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add an ASSERT() to u-boot.lds to detect an SPL that doesn't fit within SPL_TEXT_BASE..SPL_MAX_SIZE. Different .lds files implement this check in two possible ways: 1) An ASSERT() like this 2) Defining a MEMORY region of size SPL_MAX_SIZE, and re-directing all linker output into that region. Since u-boot.lds is used for both SPL and main U-Boot, this would entail only sometimes defining a MEMORY region, and only sometimes performing that redirection, and hence option (1) was deemed much simpler, and hence implemented. Note that this causes build failures at least for NVIDIA Tegra Seaboard and Ventana. However, these are legitimate; the SPL doesn't fit within the required space, and this does cause runtime issues. Signed-off-by: Stephen Warren <swarren@nvidia.com> Acked-by: Simon Glass <sjg@chromium.org> Acked-by: Allen Martin <amartin@nvidia.com> Acked-by: Tom Rini <trini@ti.com> Tested-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
| * | Merge remote-tracking branch 'u-boot-imx/master'Albert ARIBAUD2012-10-27-177/+1327
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| | * | MX5: fix warning in clock.cStefano Babic2012-10-26-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Patch fix warnings compiling with ELDK-4.2: clock.c: In function 'get_standard_pll_sel_clk': clock.c:341: warning: 'freq' may be used uninitialized in this function Reported-by : Marek Vasut <marex@denx.de> Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mx5: Add workaround for ARM erratum ID 468414Fabio Estevam2012-10-17-0/+9
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the software workaround for ARM erratum ID 468414. According to mx53/mx51 errata document: "ENGcm11133 - ARM: NEON load data can be incorrectly forwarded to a subsequent request Description: Under very specific set of conditions, data from a Neon load request can be incorrectly forwarded to a subsequent, unrelated memory request. The conditions are as follows: • Neon loads and stores must be in use • Neon L1 caching must be disabled • Trustzone must be configured and in use • The secure memory address space and the non-secure memory address space both use the same physical addresses, either as an alias or the same memory location or for separate memory locations The issue is reported by ARM, erratum ID 468414, Category 2" Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mx5: lowlevel_init.S: Fix PLL settings for mx53Fabio Estevam2012-10-17-33/+67
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Currently PLL2 is not explicitely configured for mx53 and it runs at 333MHz. Since PLL2 is the parent clock for DDR2, IPU, VPU, we should set it at 400MHz instead. Without doing so, it is not possible to use a 2.6.35 FSL kernel and display HDMI at 1080p because the IPU clock cannot reach the requested frequency. Set PLL2 to 400MHz, so that 1080p can be played and the DDR2 can run at its maximum frequency. Also, setup the other PLL's as done in FSL U-boot and re-arrange the code a little bit to allow easier comparison with the original clock setup from FSL U-boot. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mx5: lowlevel_init.S: Split init_clock macroFabio Estevam2012-10-17-30/+65
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | init_clock is currently shared between mx51 and mx53 and it contains lots of ifdef's which makes it really hard to follow the code. Split the init_clock between mx51 and mx53 to allow easier readability. No functional changes are made. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
| | * | mx25: Clean up imx-regs.hBenoît Thébaudeau2012-10-16-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Clean up i.MX25 imx-regs.h: - Update mx31 imx-regs.h filename. - Test for __KERNEL_STRICT_NAMES just in case. - Define internal RAM size. Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com> Cc: Stefano Babic <sbabic@denx.de>
| | * | i.MX6: add HDMI transmitter register declarations from kernel WIP.Eric Nelson2012-10-16-0/+1053
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Original source from Pengutronix HDMI driver work: http://git.pengutronix.de/?p=imx/linux-2.6.git;a=commitdiff;h=72c31cd67ac880bd90785af86f8e46f8ea7b3bb0 Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | i.MX6: set drive strength for parallel RGB padsEric Nelson2012-10-16-29/+29
| | | | | | | | | | | | | | | | | | | | | | | | Default drive strength is disabled and won't function. Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com>
| | * | i.MX: iomux: input pad array can be constEric Nelson2012-10-16-3/+5
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Eric Nelson <eric.nelson@boundarydevices.com> Signed-off-by: Stefano Babic <sbabic@denx.de>
| | * | mx6qsabreauto: Pass the board revision to the kernelFabio Estevam2012-10-16-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kernel from Freescale expects that the bootloader passes the board revision. Read the board revision and pass it via get_board_rev(). Without passing the board revision the kernel does not operate properly as the initialization of peripherals are different in revA versus revB boards. Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
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