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* arm: rmobile: kzm9g: Add dummy member to struct sh73a0_rwdtTetsuyuki Kobayashi2012-10-03-0/+2
| | | | | | | | Add dummy member to struct sh73a0_rwdt in sh73a0.h. Without this, initializing watch dog timer goes wrong. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Support build with gcc-4.6 or laterNobuhiro Iwamatsu2012-10-03-1/+27
| | | | | | | | | | | Latest rmobile code was tested by using old gcc (gcc-4.4). When we use gcc-4.6 (or later), the build is made, but does not work. This solves a problem not to work by add -march=armv5 to compiple option when we built in gcc-4.6 (or later). I tested by linaro's compiler version 2012.04-20120426. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: enable reset commandTetsuyuki Kobayashi2012-10-03-0/+4
| | | | | | | Do soft power on reset in U-Boot reset command. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: kzm9g: Adjust low level hardware settingTetsuyuki Kobayashi2012-10-03-1/+3
| | | | | | | Adjust low level hardware setting in s_init. Signed-off-by: Tetsuyuki Kobayashi <koba@kmckk.co.jp> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add supoprt for KMC KZM-A9-GT boardNobuhiro Iwamatsu2012-10-03-0/+13
| | | | | | | | | | | | | | | The KZM-A9-GT board has Renesas R-Mobile SH73A0, 512MB DDR2-SDRAM, USB, Ethernet, and more. This patch supports the following functions: - 512MB DDR2-SDRAM - 16MB NOR Flash memory - Serial console (SCIF) - Ethernet (SMSC) - I2C Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support PFC of Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-0/+2817
| | | | | | | | Renesas SH73A0 has GPIO based PFC. This privode framework of PFC. The code included in this base from linux kernel. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add support Renesas SH73A0Nobuhiro Iwamatsu2012-10-03-24/+1067
| | | | | | | | Renesas SH73A0 is CPU with Cortex-A9. This supports the basic register definition and GPIO. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* arm: rmobile: Add basic support for Renesas R-MobileNobuhiro Iwamatsu2012-10-03-0/+227
| | | | | | | | This patch adds minimum support for R-Mobile. Only minimal support with timer. This CPU can uses the peripheral of Renesas SuperH. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* ARMv7: Add register definition of global timerNobuhiro Iwamatsu2012-10-03-0/+36
| | | | | | | ARMv7 has global timer. This provides the register definition of this timer. Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> Signed-off-by: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
* am33xx: Fix fetching of mmc1 bootmode from bootrom for AM33XXJoel A Fernandes2012-10-01-2/+4
| | | | | | | | | | | U-boot should not ignore getting the bootmode passed on from the bootrom. With this, U-boot SPL knows it was loaded from MMC1 and use this info to read full U-boot from MMC1 as well. Cc: pprakash@ti.com Cc: trini@ti.com Signed-off-by: Joel A Fernandes <joelagnel@ti.com> Signed-off-by: Tom Rini <trini@ti.com>
* OMAP: networking support for SPLIlya Yanok2012-10-01-0/+1
| | | | | | | | | | | | | | This patch adds support for networking in SPL. Some devices are capable of loading SPL via network so it makes sense to load the main U-Boot binary via network too. This patch tries to use existing network code as much as possible. Unfortunately, it depends on environment which in turn depends on other code so SPL size is increased significantly. No effort was done to decouple network code and environment so far. Signed-off-by: Ilya Yanok <ilya.yanok@cogentembedded.com> Acked-by: Joe Hershberger <joe.hershberger@ni.com> Signed-off-by: Tom Rini <trini@ti.com>
* Merge remote-tracking branch 'u-boot/master'Albert ARIBAUD2012-09-30-72207/+3379
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| * sandbox: Add asm/errno.hSimon Glass2012-09-29-0/+1
| | | | | | | | | | | | This file is required for all archs. Fixes a sandbox build break on ext4. Signed-off-by: Simon Glass <sjg@chromium.org>
| * Merge branch 'master' of git://git.denx.de/u-boot-netTom Rini2012-09-27-69488/+0
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| | * dm: net: Move IXP NPE to drivers/net/Marek Vasut2012-09-24-69488/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Marek Vasut <marex@denx.de> Cc: Bryan Hundven <bryanhundven@gmail.com> Cc: Michael Schwingen <rincewind@discworld.dascon.de> Cc: Wolfgang Denk <wd@denx.de> Cc: Albert Aribaud <albert.u.boot@aribaud.net> Cc: U-Boot DM <u-boot-dm@lists.denx.de> Cc: Joe Hershberger <joe.hershberger@ni.com>
| * | ARM: SPL: Convert davinci to CONFIG_SPL_FRAMEWORKTom Rini2012-09-27-41/+83
| | | | | | | | | | | | | | | | | | | | | | | | - Convert the non-relocation part of board_init_f to spl_board_init, turn on CONFIG_SPL_BOARD_INIT in the configs. - Remove duplicated code. - Add spl_boot_device() that returns the statically chosen boot device. Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: NAND: Move arch/arm/cpu/armv7/omap-common/spl_nand.c to common/splTom Rini2012-09-27-108/+0
| | | | | | | | | | | | | | | | | | | | | We move the spl_nand_load_image function to common/spl. This will allow for easier integration of SPL-boots-Linux code on other arches. Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: Create arch/arm/lib/spl.c for board_init_f and jump_to_image_linuxTom Rini2012-09-27-11/+90
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In SPL (CONFIG_SPL_FRAMEWORK) board_init_f must setup the stack pointer, clear the BSS and call board_init_r. We mark this as weak as some platforms may need to perform additional initalization at this point. We provide a gd that we know will be in a usable location, once the BSS has been cleared to help with this as well. Finally, we no longer call relocate_code so remove that from the armv7 version. Next, both board_init_f and jump_to_image_linux are going to be inherently arch-specific, so move these versions to arch/arm/lib/spl.c Signed-off-by: Tom Rini <trini@ti.com>
| * | SPL: Move the omap SPL framework to common/splTom Rini2012-09-27-489/+5
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a new flag, CONFIG_SPL_FRAMEWORK to opt into the common/spl SPL framework, enable on all of the previously using boards. We move the spl_ymodem.c portion to common/ and spl_mmc.c to drivers/mmc/. We leave the NAND one in-place as we plan to replace it later in this series. We use common/spl to avoid linker problems with respect to merging constant strings in objects. Otherwise all strings in common/ will be linked in and kept which grows SPL in size too much. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Move gpmc_init() to spl_board_init()Tom Rini2012-09-27-1/+10
| | | | | | | | | | | | | | | | | | | | | | | | This is an OMAP/related-specific function, move calling it to spl_board_init() and turn on CONFIG_SPL_BOARD_INIT on the boards that enabled NAND and didn't enable this already. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Start hooking in the current SPI SPL supportTom Rini2012-09-27-0/+8
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Clean up spl.c / spl_nand.c slightlyTom Rini2012-09-27-16/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Remove includes we don't need - Switch some printf statements to puts - Convert some printf statements to debug, introduce new puts statements - In most cases saying just "No mkimage signature, assuming u-boot.bin" or similar is sufficient. This also means the non-DEBUG case doesn't need printf, in the core of SPL. - The other case here is that PLAIN_VERSION provided what we wanted already, so just use it. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Make spl_mmc.c more genericTom Rini2012-09-27-26/+38
| | | | | | | | | | | | | | | | | | | | | | | | Move the default omap/related-centric board_mmc_init to arch/arm/cpu/armv7/omap-common/boot-common.c and move the type defines to <asm/spl.h>. Also use mmc->read_bl_len rather than MMCSD_SECTOR_SIZE Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Add <asm/spl.h> and <asm/arch/spl.h>Tom Rini2012-09-27-76/+203
| | | | | | | | | | | | | | | | | | | | | Move the SPL prototypes from <asm/omap_common.h> into <asm/spl.h> and add <asm/arch/spl.h> for arch specific portions of CONFIG_SPL_FRAMEWORK. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Only call mem_malloc_init if configuredTom Rini2012-09-27-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | We can only attempt to setup a malloc pool if CONFIG_SYS_SPL_MALLOC_START is defined, and not all boards require it. Make the call depend on the define. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Remove NAND_MODE_HW_ECC from spl_nand.cTom Rini2012-09-27-14/+3
| | | | | | | | | | | | | | | | | | | | | This detection code doesn't (and can't) do anything currently, so remove. Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Rename omap_boot_mode to spl_boot_mode()Tom Rini2012-09-27-5/+5
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | ARM: SPL: Rename omap_boot_device to spl_boot_deviceTom Rini2012-09-27-8/+8
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | omap-common: SPL: Fix whitespace in omap-common/u-boot-spl.lds.Pavel Machek2012-09-27-3/+3
| | | | | | | | | | | | | | | Signed-off-by: Pavel Machek <pavel@denx.de> Signed-off-by: Tom Rini <trini@ti.com>
| * | omap-common: Fix typo in save_boot_params() in lowlevel_init.STom Rini2012-09-27-1/+1
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | omap-common: SPL: Add CONFIG_SPL_DISPLAY_PRINT / spl_display_print()Tom Rini2012-09-27-9/+9
| | | | | | | | | | | | | | | | | | | | | | | | Only omap4/5 currently have a meaningful set of display text and overo had been adding a function to display nothing. Change how this works to be opt-in and only turned on for omap4/5 now. Signed-off-by: Tom Rini <trini@ti.com>
| * | spl_mmc: Make FAT checks / calls guarded with CONFIG_SPL_FAT_SUPPORTTom Rini2012-09-27-0/+4
| | | | | | | | | | | | Signed-off-by: Tom Rini <trini@ti.com>
| * | malloc: remove extern declarations of malloc_bin_reloc() in board.c filesDaniel Schwierzeck2012-09-26-6/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Declare malloc_bin_reloc() in malloc.h and remove all extern declarations in various board.c files to get rid of one checkpatch.pl warning. Signed-off-by: Daniel Schwierzeck <daniel.schwierzeck@googlemail.com> Cc: Wolfgang Denk <wd@denx.de> Cc: Andreas Bießmann <andreas.devel@gmail.com> Cc: Jason Jin <Jason.jin@freescale.com> Cc: Macpaul Lin <macpaul@andestech.com> Cc: Daniel Hellstrom <daniel@gaisler.com> Acked-by: Andreas Bießmann <andreas.devel@gmail.com>
| * | ARM: arm1176: Define arch_cpu_init() at the SoC levelStephen Warren2012-09-25-8/+25
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Commit 86c6326 "ARM: arm1176: enable instruction cache in arch_cpu_init()" defined arch_cpu_init() in a file that is shared across all arm1176 SoCs. tnetv107x already implemented this function, which caused linking to break. Move the new conflicting arch_cpu_init() into arm1176/bcm2835/init.c so that it doesn't conflict; grep indicates this function is usually defined at the SoC-level, not the CPU-level, at least for ARM. Signed-off-by: Stephen Warren <swarren@wwwdotorg.org> Acked-by: Marek Vasut <marex@denx.de>
| * | Merge branch 'master' of git://git.denx.de/u-boot-mpc85xxTom Rini2012-09-25-926/+1359
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| | * Revert "powerpc: Fix declaration type for I/O functions"Andy Fleming2012-08-23-10/+10
| | | | | | | | | | | | This reverts commit 20959471b5d07fdeb8603b918d80385aa2954711.
| | * powerpc/85xx: clear out TLB on bootScott Wood2012-08-23-33/+48
| | | | | | | | | | | | | | | | | | | | | | | | Instead of just shooting down the entry that covers CCSR, clear out every TLB entry that isn't the one that we're executing out of. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: Move HWCONFIG_BUFFER_SIZE into config.hYork Sun2012-08-23-5/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Before proper environment is setup, we extract hwconfig and put it into a buffer with size HWCONFIG_BUFFER_SIZE. We need to enlarge the buffer to accommodate longer string. Since this macro is used in multiple files, we move it into arch/powerpc/include/asm/config.h. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx DDR: Fix interactive DDR debuggingYork Sun2012-08-23-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | Add one more argument to call function readline_into_buffer(). Fix print SPD format for negative values. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx DDR: Fall back to raw timing for first controller onlyYork Sun2012-08-23-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Only the first DIMM of first controller should fall back to raw timing parameters if SPD is missing or corrupted. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx DDR: Fix CAS latency calculationYork Sun2012-08-23-2/+4
| | | | | | | | | | | | | | | | | | | | | Empty slot should be skipped when calculating CAS latency. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: Fix bug for extended DDR timingYork Sun2012-08-23-20/+43
| | | | | | | | | | | | | | | | | | | | | | | | Faster DDR3 timing requires parameters exceeding previously defined range. Extended parameters are fixed. Added some debug messages. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: Enable 3-way and 4-way DDR interleavingYork Sun2012-08-23-318/+455
| | | | | | | | | | | | | | | | | | | | | | | | Restructure DDR interleaving option to support 3 and 4 DDR controllers for 2-, 3- and 4-way interleaving. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: Add support for cas latency 12 and aboveYork Sun2012-08-23-7/+21
| | | | | | | | | | | | | | | | | | | | | | | | Required by JEDEC 79-3E for high speed DDR3. Also change "CSn disabled" message to debug. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: Add fine timing support for DDR3York Sun2012-08-23-12/+36
| | | | | | | | | | | | | | | | | | | | | | | | When the DDR3 speed goes higher, we need to utilize fine offset from SPD. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc85xx: Skip zero values for DDR debug registersYork Sun2012-08-23-3/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some debug registers have non-zero default out of reset. If software is not setting debug registers, skip writing to them to avoid unnecessary overriding. Also add debug messages for workarounds and debug registers. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * powerpc/mpc8xxx: fix core id for multicore bootingYork Sun2012-08-23-6/+53
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | For the cores with multiple threads, we need to figure out which physical core a thread belongs. To match the core ids, update PIR registers and spin tables. Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * Added new ext fields to IFCKumar Gala2012-08-23-6/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In case more than 32 bit address is used, the EXT bit should be set. Need to fix up address map for IFC #CS for 4, also need to move # of IFC banks into config_mpc85xx.h Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * Add IFC offset for DPAA/Corenet platformsKumar Gala2012-08-23-0/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
| | * Add e6500 processor detectionKumar Gala2012-08-23-0/+4
| | | | | | | | | | | | | | | Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com>
generated by cgit v1.1 at 2024-12-25 21:39:39 +0000